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GET /api/patches/1424990/?format=api
{ "id": 1424990, "url": "http://patchwork.ozlabs.org/api/patches/1424990/?format=api", "web_url": "http://patchwork.ozlabs.org/project/openbmc/patch/1610358177-3874-1-git-send-email-willie_thai@compal.com/", "project": { "id": 56, "url": "http://patchwork.ozlabs.org/api/projects/56/?format=api", "name": "OpenBMC development", "link_name": "openbmc", "list_id": "openbmc.lists.ozlabs.org", "list_email": "openbmc@lists.ozlabs.org", "web_url": "http://github.com/openbmc/", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1610358177-3874-1-git-send-email-willie_thai@compal.com>", "list_archive_url": null, "date": "2021-01-11T09:42:57", "name": "ARM: dts: aspeed: Add device tree for Liwu2 BMC", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "9b8a820b950d2b2dde10bbd8ade2678decf9db9b", "submitter": { "id": 80904, "url": "http://patchwork.ozlabs.org/api/people/80904/?format=api", "name": "Willie Thai", "email": "williethaitu@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/openbmc/patch/1610358177-3874-1-git-send-email-willie_thai@compal.com/mbox/", "series": [ { "id": 223817, "url": "http://patchwork.ozlabs.org/api/series/223817/?format=api", "web_url": "http://patchwork.ozlabs.org/project/openbmc/list/?series=223817", "date": "2021-01-11T09:42:57", "name": "ARM: dts: aspeed: Add device tree for Liwu2 BMC", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/223817/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1424990/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1424990/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "openbmc@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "openbmc@lists.ozlabs.org" ], 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"Message-Id": "<1610358177-3874-1-git-send-email-willie_thai@compal.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "\n <CACPK8Xd0aMcXrUD4YLWHMSz9rb7p0KKQGVCHRxFWdajGXcgLZg@mail.gmail.com>", "References": "\n <CACPK8Xd0aMcXrUD4YLWHMSz9rb7p0KKQGVCHRxFWdajGXcgLZg@mail.gmail.com>", "X-Mailman-Approved-At": "Tue, 12 Jan 2021 16:17:18 +1100", "X-BeenThere": "openbmc@lists.ozlabs.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Development list for OpenBMC <openbmc.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/openbmc>,\n <mailto:openbmc-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/openbmc/>", "List-Post": "<mailto:openbmc@lists.ozlabs.org>", "List-Help": "<mailto:openbmc-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/openbmc>,\n <mailto:openbmc-request@lists.ozlabs.org?subject=subscribe>", "Cc": "Willie Thai <willie_thai@compal.com>", "Errors-To": "openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org", "Sender": "\"openbmc\"\n <openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>" }, "content": "The Liwu2 is a server platform with an ASPEED AST2500 based BMC.\n---\n arch/arm/boot/dts/Makefile | 1 +\n arch/arm/boot/dts/aspeed-bmc-compal-liwu2.dts | 320 ++++++++++++++++++++++++++\n 2 files changed, 321 insertions(+)\n create mode 100755 arch/arm/boot/dts/aspeed-bmc-compal-liwu2.dts", "diff": "diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile\nindex 5a14adc..16fc64d 100644\n--- a/arch/arm/boot/dts/Makefile\n+++ b/arch/arm/boot/dts/Makefile\n@@ -1354,6 +1354,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \\\n \taspeed-bmc-arm-centriq2400-rep.dtb \\\n \taspeed-bmc-arm-stardragon4800-rep2.dtb \\\n \taspeed-bmc-bytedance-g220a.dtb \\\n+\taspeed-bmc-compal-liwu2.dts \\\n \taspeed-bmc-facebook-cmm.dtb \\\n \taspeed-bmc-facebook-minipack.dtb \\\n \taspeed-bmc-facebook-tiogapass.dtb \\\ndiff --git a/arch/arm/boot/dts/aspeed-bmc-compal-liwu2.dts b/arch/arm/boot/dts/aspeed-bmc-compal-liwu2.dts\nnew file mode 100755\nindex 0000000..a93af32\n--- /dev/null\n+++ b/arch/arm/boot/dts/aspeed-bmc-compal-liwu2.dts\n@@ -0,0 +1,320 @@\n+// SPDX-License-Identifier: GPL-2.0+\n+/dts-v1/;\n+\n+#include \"aspeed-g5.dtsi\"\n+#include <dt-bindings/gpio/aspeed-gpio.h>\n+\n+/ {\n+\tmodel = \"AST2500 liwu2\";\n+\tcompatible = \"aspeed,ast2500\";\n+\n+\taliases {\n+\t\tserial4 = &uart5;\n+\t};\n+\n+\tchosen {\n+\t\tstdout-path = &uart5;\n+\t\tbootargs = \"console=tty0 console=ttyS4,115200 earlyprintk\";\n+\t};\n+\n+\tmemory@80000000 {\n+\t\treg = <0x80000000 0x20000000>;\n+\t};\n+\n+\treserved-memory {\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <1>;\n+\t\tranges;\n+\n+\t\tgfx_memory: framebuffer {\n+\t\t\tsize = <0x01000000>;\n+\t\t\talignment = <0x01000000>;\n+\t\t\tcompatible = \"shared-dma-pool\";\n+\t\t\treusable;\n+\t\t};\n+\t};\n+\n+\tiio-hwmon {\n+\t\tcompatible = \"iio-hwmon\";\n+\t\tio-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,\n+\t\t\t <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,\n+\t\t\t <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,\n+\t\t\t <&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>;\n+\t};\n+\n+\tleds {\n+\t\tcompatible = \"gpio-leds\";\n+\n+\t\tLED_FAN0_FAULT {\n+\t\t\tlabel = \"LED_FAN0_FAULT\";\n+\t\t\tgpios = <&gpio ASPEED_GPIO(F, 4) GPIO_ACTIVE_LOW>;\n+\t\t};\n+\n+\t\tLED_FAN1_FAULT {\n+\t\t\tlabel = \"LED_FAN1_FAULT\";\n+\t\t\tgpios = <&gpio ASPEED_GPIO(F, 5) GPIO_ACTIVE_LOW>;\n+\t\t};\n+\n+\t\tLED_FAN2_FAULT {\n+\t\t\tlabel = \"LED_FAN2_FAULT\";\n+\t\t\tgpios = <&gpio ASPEED_GPIO(H, 2) GPIO_ACTIVE_LOW>;\n+\t\t};\n+\n+\t\tLED_FAN3_FAULT {\n+\t\t\tlabel = \"LED_FAN3_FAULT\";\n+\t\t\tgpios = <&gpio ASPEED_GPIO(H, 5) GPIO_ACTIVE_LOW>;\n+\t\t};\n+\n+\t\tLED_FAN4_FAULT {\n+\t\t\tlabel = \"LED_FAN4_FAULT\";\n+\t\t\tgpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_LOW>;\n+\t\t};\n+\n+\t\tLED_FAN5_FAULT {\n+\t\t\tlabel = \"LED_FAN5_FAULT\";\n+\t\t\tgpios = <&gpio ASPEED_GPIO(H, 7) GPIO_ACTIVE_LOW>;\n+\t\t};\n+\n+\t\tFP_LED_STATUS_AMBER_N {\n+\t\t\tlabel = \"FP_LED_STATUS_AMBER_N\";\n+\t\t\tgpios = <&gpio ASPEED_GPIO(S, 5) GPIO_ACTIVE_LOW>;\n+\t\t};\n+\n+\t\tREAR_ID_LED_N {\n+\t\t\tlabel = \"REAR_ID_LED_N\";\n+\t\t\tgpios = <&gpio ASPEED_GPIO(S, 6) GPIO_ACTIVE_LOW>;\n+\t\t};\n+\t};\n+};\n+\n+&fmc {\n+\tstatus = \"okay\";\n+\tflash@0 {\n+\t\tstatus = \"okay\";\n+\t\tm25p,fast-read;\n+\t\tlabel = \"bmc\";\n+\t\tspi-max-frequency = <50000000>;\n+#include \"openbmc-flash-layout.dtsi\"\n+\t};\n+};\n+\n+&spi1 {\n+\tstatus = \"okay\";\n+\tflash@0 {\n+\t\tstatus = \"okay\";\n+\t\tm25p,fast-read;\n+\t\tlabel = \"pnor\";\n+\t\tspi-max-frequency = <100000000>;\n+\t};\n+};\n+\n+&spi2 {\n+\tstatus = \"okay\";\n+};\n+\n+&uart5 {\n+\tstatus = \"okay\";\n+};\n+\n+&mac0 {\n+\tstatus = \"okay\";\n+\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;\n+};\n+\n+&mac1 {\n+\tstatus = \"okay\";\n+\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;\n+};\n+\n+&adc {\n+\tstatus = \"okay\";\n+};\n+\n+&i2c0 {\n+\tstatus = \"okay\";\n+};\n+\n+&i2c1 {\n+\tstatus = \"okay\";\n+\n+\teeprom@54 {\n+\t\tcompatible = \"atmel,24c64\";\n+\t\treg = <0x54>;\n+\t\tpagesize = <32>;\n+\t};\n+};\n+\n+&i2c2 {\n+\tstatus = \"okay\";\n+};\n+\n+&i2c3 {\n+\tstatus = \"okay\";\n+\n+\ttmp75@48 {\n+\t\tcompatible = \"ti,tmp75\";\n+\t\treg = <0x48>;\n+\t};\t\n+\n+\ttmp75@4b {\n+\t\tcompatible = \"ti,tmp75\";\n+\t\treg = <0x4b>;\n+\t};\t\n+\n+\ttmp75@4c {\n+\t\tcompatible = \"ti,tmp75\";\n+\t\treg = <0x4c>;\n+\t};\n+\n+\ttmp75@4d {\n+\t\tcompatible = \"ti,tmp75\";\n+\t\treg = <0x4d>;\n+\t};\n+\n+\tvr-controller@5a {\n+\t\tcompatible = \"ti,tps53679\";\n+\t\treg = <0x5a>;\n+\t};\t\n+\n+\tvr-controller@5d {\n+\t\tcompatible = \"ti,tps53679\";\n+\t\treg = <0x5d>;\n+\t};\t\n+\n+\tvr-controller@68 {\n+\t\tcompatible = \"ti,tps53679\";\n+\t\treg = <0x68>;\n+\t};\t\n+\n+\tvr-controller@6a {\n+\t\tcompatible = \"ti,tps53679\";\n+\t\treg = <0x6a>;\n+\t};\t\n+\t\n+\tvr-controller@6c {\n+\t\tcompatible = \"ti,tps53679\";\n+\t\treg = <0x6c>;\n+\t};\t\n+\t\n+\tvr-controller@6e {\n+\t\tcompatible = \"ti,tps53679\";\n+\t\treg = <0x6e>;\n+\t};\t\n+\n+};\n+\n+&i2c4 {\n+\tstatus = \"okay\";\n+\n+\teeprom@51 {\n+ compatible = \"atmel,24c64\";\n+ reg = <0x51>;\n+ pagesize = <32>;\n+ };\n+};\n+\n+&i2c5 {\n+\tstatus = \"okay\";\n+};\n+\n+&i2c6 {\n+\tstatus = \"okay\";\n+};\n+\n+&i2c7 {\n+\tstatus = \"okay\";\n+\t\n+\tpower-supply@58 {\n+\t\tcompatible = \"pmbus\";\n+\t\treg = <0x58>;\n+\t};\n+\n+\tpower-supply@59 {\n+\t\tcompatible = \"pmbus\";\n+\t\treg = <0x59>;\n+\t};\n+};\n+\n+\n+&sdmmc {\n+\tstatus = \"okay\";\n+};\n+\n+&sdhci0 {\n+\tstatus = \"okay\";\n+\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_sd1_default>;\n+};\n+\n+&vhub {\n+\tstatus = \"okay\";\n+};\n+\n+&ehci1 {\n+\tstatus = \"okay\";\n+};\n+\n+&uhci {\n+\tstatus = \"okay\";\n+};\n+\n+&gfx {\n+ status = \"okay\";\n+ memory-region = <&gfx_memory>;\n+};\n+\n+&pwm_tacho {\n+\tstatus = \"okay\";\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default\n+\t\t&pinctrl_pwm2_default &pinctrl_pwm3_default\n+\t\t&pinctrl_pwm4_default &pinctrl_pwm5_default\n+\t\t&pinctrl_pwm6_default &pinctrl_pwm7_default>;\n+\n+\tfan@0 {\n+\t\treg = <0x00>;\n+\t\taspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>;\n+\t};\n+\n+\tfan@1 {\n+\t\treg = <0x01>;\n+\t\taspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>;\n+\t};\n+\n+\tfan@2 {\n+\t\treg = <0x02>;\n+\t\taspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>;\n+\t};\n+\n+\tfan@3 {\n+\t\treg = <0x03>;\n+\t\taspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>;\n+\t};\n+\n+\tfan@4 {\n+\t\treg = <0x04>;\n+\t\taspeed,fan-tach-ch = /bits/ 8 <0x08 0x09>;\n+\t};\n+\n+\tfan@5 {\n+\t\treg = <0x05>;\n+\t\taspeed,fan-tach-ch = /bits/ 8 <0x0a 0x0b>;\n+\t};\n+\n+\tfan@6 {\n+\t\treg = <0x06>;\n+\t\taspeed,fan-tach-ch = /bits/ 8 <0x0c 0x0d>;\n+\t};\n+\n+\tfan@7 {\n+\t\treg = <0x07>;\n+\t\taspeed,fan-tach-ch = /bits/ 8 <0x0e 0x0f>;\n+\t};\n+\n+};\n+\n", "prefixes": [] }