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GET /api/patches/1421833/?format=api
{ "id": 1421833, "url": "http://patchwork.ozlabs.org/api/patches/1421833/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20210103092633.36226-18-jernej.skrabec@siol.net/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20210103092633.36226-18-jernej.skrabec@siol.net>", "list_archive_url": null, "date": "2021-01-03T09:26:33", "name": "[17/17] sunxi: Add support for OrangePi Zero2", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "20e2efcae8821a004cc7bb6fc14bf12b8a4729af", "submitter": { "id": 70601, "url": "http://patchwork.ozlabs.org/api/people/70601/?format=api", "name": "Jernej Škrabec", "email": "jernej.skrabec@siol.net" }, "delegate": { "id": 114289, "url": "http://patchwork.ozlabs.org/api/users/114289/?format=api", "username": "apritzel", "first_name": "Andre", "last_name": "Przywara", "email": "andre.przywara@arm.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20210103092633.36226-18-jernej.skrabec@siol.net/mbox/", "series": [ { "id": 222511, "url": "http://patchwork.ozlabs.org/api/series/222511/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=222511", "date": "2021-01-03T09:26:16", "name": "sunxi: Introduce H616 support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/222511/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1421833/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1421833/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=<UNKNOWN>)", "ozlabs.org;\n dmarc=fail (p=none dis=none) header.from=siol.net", "phobos.denx.de;\n dmarc=fail (p=none dis=none) header.from=siol.net", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n dmarc=pass (p=none dis=none) header.from=siol.net", "phobos.denx.de;\n spf=pass smtp.mailfrom=jernej.skrabec@siol.net" ], "Received": [ "from phobos.denx.de (phobos.denx.de [85.214.62.61])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (4096 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 4D7tlP29ryz9sVn\n\tfor <incoming@patchwork.ozlabs.org>; Sun, 3 Jan 2021 20:30:09 +1100 (AEDT)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 2162982644;\n\tSun, 3 Jan 2021 10:27:34 +0100 (CET)", "by phobos.denx.de (Postfix, from userid 109)\n id 57290826CA; Sun, 3 Jan 2021 10:27:32 +0100 (CET)", "from mail.siol.net (mailoutvs24.siol.net [185.57.226.215])\n (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id AD078826BA\n for <u-boot@lists.denx.de>; Sun, 3 Jan 2021 10:27:28 +0100 (CET)", "from localhost (localhost [127.0.0.1])\n by mail.siol.net (Zimbra) with ESMTP id 563B6522E3F;\n Sun, 3 Jan 2021 10:27:28 +0100 (CET)", "from mail.siol.net ([127.0.0.1])\n by localhost (psrvmta12.zcs-production.pri [127.0.0.1]) (amavisd-new,\n port 10032)\n with ESMTP id fOs_EBaMosXT; Sun, 3 Jan 2021 10:27:27 +0100 (CET)", "from mail.siol.net (localhost [127.0.0.1])\n by mail.siol.net (Zimbra) with ESMTPS id E0025522E11;\n Sun, 3 Jan 2021 10:27:27 +0100 (CET)", "from localhost.localdomain (89-212-178-211.dynamic.t-2.net\n [89.212.178.211]) (Authenticated sender: 031275009)\n by mail.siol.net (Zimbra) with ESMTPSA id 9E1E5522DE2;\n Sun, 3 Jan 2021 10:27:25 +0100 (CET)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.6 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_LOW,\n SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2", "From": "Jernej Skrabec <jernej.skrabec@siol.net>", "To": "jagan@amarulasolutions.com,\n\tandre.przywara@arm.com", "Cc": "hdegoede@redhat.com, jernej.skrabec@siol.net, lukma@denx.de, hs@denx.de,\n peng.fan@nxp.com, joe.hershberger@ni.com, jh80.chung@samsung.com,\n u-boot@lists.denx.de, linux-sunxi@googlegroups.com", "Subject": "[PATCH 17/17] sunxi: Add support for OrangePi Zero2", "Date": "Sun, 3 Jan 2021 10:26:33 +0100", "Message-Id": "<20210103092633.36226-18-jernej.skrabec@siol.net>", "X-Mailer": "git-send-email 2.30.0", "In-Reply-To": "<20210103092633.36226-1-jernej.skrabec@siol.net>", "References": "<20210103092633.36226-1-jernej.skrabec@siol.net>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "quoted-printable", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.102.3 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "OrangePi Zero2 is SBC based on Allwinner H616 with 1 GiB of RAM, SD card\nsupport, gigabit ethernet, micro HDMI, WIFI, Bluetooth and 1 USB 2.0\nport. It also has two GPIO headers which allows further peripherals to\nbe used.\n\nDevice Tree file is taken from initial OrangePi Zero2 Linux submission\nand it's not yet merged.\n\nSigned-off-by: Jernej Skrabec <jernej.skrabec@siol.net>\n---\n arch/arm/dts/Makefile | 2 +\n arch/arm/dts/sun50i-h616-orangepi-zero2.dts | 240 ++++++++++++++++++++\n board/sunxi/MAINTAINERS | 5 +\n configs/orangepi_zero2_defconfig | 15 ++\n 4 files changed, 262 insertions(+)\n create mode 100644 arch/arm/dts/sun50i-h616-orangepi-zero2.dts\n create mode 100644 configs/orangepi_zero2_defconfig", "diff": "diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile\nindex fd47e408f826..483502a1bd3c 100644\n--- a/arch/arm/dts/Makefile\n+++ b/arch/arm/dts/Makefile\n@@ -608,6 +608,8 @@ dtb-$(CONFIG_MACH_SUN50I_H6) += \\\n \tsun50i-h6-orangepi-lite2.dtb \\\n \tsun50i-h6-orangepi-one-plus.dtb \\\n \tsun50i-h6-pine-h64.dtb\n+dtb-$(CONFIG_MACH_SUN50I_H616) += \\\n+\tsun50i-h616-orangepi-zero2.dtb\n dtb-$(CONFIG_MACH_SUN50I) += \\\n \tsun50i-a64-amarula-relic.dtb \\\n \tsun50i-a64-bananapi-m64.dtb \\\ndiff --git a/arch/arm/dts/sun50i-h616-orangepi-zero2.dts b/arch/arm/dts/sun50i-h616-orangepi-zero2.dts\nnew file mode 100644\nindex 000000000000..2afc036059b4\n--- /dev/null\n+++ b/arch/arm/dts/sun50i-h616-orangepi-zero2.dts\n@@ -0,0 +1,240 @@\n+// SPDX-License-Identifier: (GPL-2.0+ or MIT)\n+/*\n+ * Copyright (C) 2020 Arm Ltd.\n+ */\n+\n+/dts-v1/;\n+\n+#include \"sun50i-h616.dtsi\"\n+\n+#include <dt-bindings/gpio/gpio.h>\n+#include <dt-bindings/interrupt-controller/arm-gic.h>\n+#include <dt-bindings/leds/common.h>\n+\n+/ {\n+\tmodel = \"OrangePi Zero2\";\n+\tcompatible = \"xunlong,orangepi-zero2\", \"allwinner,sun50i-h616\";\n+\n+\taliases {\n+\t\tethernet0 = &emac0;\n+\t\tserial0 = &uart0;\n+\t};\n+\n+\tchosen {\n+\t\tstdout-path = \"serial0:115200n8\";\n+\t};\n+\n+\tleds {\n+\t\tcompatible = \"gpio-leds\";\n+\n+\t\tpower {\n+\t\t\tfunction = LED_FUNCTION_POWER;\n+\t\t\tcolor = <LED_COLOR_ID_RED>;\n+\t\t\tgpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */\n+\t\t\tdefault-state = \"on\";\n+\t\t};\n+\n+\t\tstatus {\n+\t\t\tfunction = LED_FUNCTION_STATUS;\n+\t\t\tcolor = <LED_COLOR_ID_GREEN>;\n+\t\t\tgpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */\n+\t\t};\n+\t};\n+\n+\treg_vcc5v: vcc5v {\n+\t\t/* board wide 5V supply directly from the USB-C socket */\n+\t\tcompatible = \"regulator-fixed\";\n+\t\tregulator-name = \"vcc-5v\";\n+\t\tregulator-min-microvolt = <5000000>;\n+\t\tregulator-max-microvolt = <5000000>;\n+\t\tregulator-always-on;\n+\t};\n+\n+\treg_usb1_vbus: usb1-vbus {\n+\t\tcompatible = \"regulator-fixed\";\n+\t\tregulator-name = \"usb1-vbus\";\n+\t\tregulator-min-microvolt = <5000000>;\n+\t\tregulator-max-microvolt = <5000000>;\n+\t\tvin-supply = <®_vcc5v>;\n+\t\tenable-active-high;\n+\t\tgpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */\n+\t\tstatus = \"okay\";\n+\t};\n+};\n+\n+&ehci0 {\n+\tstatus = \"okay\";\n+};\n+\n+&ehci1 {\n+\tstatus = \"okay\";\n+};\n+\n+/* USB 2 & 3 are on headers only. */\n+\n+&emac0 {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&ext_rgmii_pins>;\n+\tphy-mode = \"rgmii\";\n+\tphy-handle = <&ext_rgmii_phy>;\n+\tphy-supply = <®_dcdce>;\n+\tallwinner,rx-delay-ps = <3100>;\n+\tallwinner,tx-delay-ps = <700>;\n+\tstatus = \"okay\";\n+};\n+\n+&mdio0 {\n+\text_rgmii_phy: ethernet-phy@1 {\n+\t\tcompatible = \"ethernet-phy-ieee802.3-c22\";\n+\t\treg = <1>;\n+\t};\n+};\n+\n+&mmc0 {\n+\tvmmc-supply = <®_dcdce>;\n+\tcd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;\t/* PF6 */\n+\tbus-width = <4>;\n+\tstatus = \"okay\";\n+};\n+\n+&ohci0 {\n+\tstatus = \"okay\";\n+};\n+\n+&ohci1 {\n+\tstatus = \"okay\";\n+};\n+\n+&r_i2c {\n+\tstatus = \"okay\";\n+\n+\taxp305: pmic@36 {\n+\t\tcompatible = \"x-powers,axp305\", \"x-powers,axp805\",\n+\t\t\t \"x-powers,axp806\";\n+\t\treg = <0x36>;\n+\n+\t\tx-powers,self-working-mode;\n+\t\tvina-supply = <®_vcc5v>;\n+\t\tvinb-supply = <®_vcc5v>;\n+\t\tvinc-supply = <®_vcc5v>;\n+\t\tvind-supply = <®_vcc5v>;\n+\t\tvine-supply = <®_vcc5v>;\n+\t\taldoin-supply = <®_vcc5v>;\n+\t\tbldoin-supply = <®_vcc5v>;\n+\t\tcldoin-supply = <®_vcc5v>;\n+\n+\t\tregulators {\n+\t\t\treg_aldo1: aldo1 {\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-min-microvolt = <3300000>;\n+\t\t\t\tregulator-max-microvolt = <3300000>;\n+\t\t\t\tregulator-name = \"vcc-sys\";\n+\t\t\t};\n+\n+\t\t\treg_aldo2: aldo2 {\t/* 3.3V on headers */\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-min-microvolt = <3300000>;\n+\t\t\t\tregulator-max-microvolt = <3300000>;\n+\t\t\t\tregulator-name = \"vcc3v3-ext\";\n+\t\t\t};\n+\n+\t\t\treg_aldo3: aldo3 {\t/* 3.3V on headers */\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-min-microvolt = <3300000>;\n+\t\t\t\tregulator-max-microvolt = <3300000>;\n+\t\t\t\tregulator-name = \"vcc3v3-ext2\";\n+\t\t\t};\n+\n+\t\t\treg_bldo1: bldo1 {\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-min-microvolt = <1800000>;\n+\t\t\t\tregulator-max-microvolt = <1800000>;\n+\t\t\t\tregulator-name = \"vcc1v8\";\n+\t\t\t};\n+\n+\t\t\tbldo2 {\n+\t\t\t\t/* unused */\n+\t\t\t};\n+\n+\t\t\tbldo3 {\n+\t\t\t\t/* unused */\n+\t\t\t};\n+\n+\t\t\tbldo4 {\n+\t\t\t\t/* unused */\n+\t\t\t};\n+\n+\t\t\tcldo1 {\n+\t\t\t\t/* reserved */\n+\t\t\t};\n+\n+\t\t\tcldo2 {\n+\t\t\t\t/* unused */\n+\t\t\t};\n+\n+\t\t\tcldo3 {\n+\t\t\t\t/* unused */\n+\t\t\t};\n+\n+\t\t\treg_dcdca: dcdca {\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-min-microvolt = <810000>;\n+\t\t\t\tregulator-max-microvolt = <1080000>;\n+\t\t\t\tregulator-name = \"vdd-cpu\";\n+\t\t\t};\n+\n+\t\t\treg_dcdcc: dcdcc {\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-min-microvolt = <810000>;\n+\t\t\t\tregulator-max-microvolt = <1080000>;\n+\t\t\t\tregulator-name = \"vdd-gpu-sys\";\n+\t\t\t};\n+\n+\t\t\treg_dcdcd: dcdcd {\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-min-microvolt = <1500000>;\n+\t\t\t\tregulator-max-microvolt = <1500000>;\n+\t\t\t\tregulator-name = \"vdd-dram\";\n+\t\t\t};\n+\n+\t\t\treg_dcdce: dcdce {\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-min-microvolt = <3300000>;\n+\t\t\t\tregulator-max-microvolt = <3300000>;\n+\t\t\t\tregulator-name = \"vcc-eth-mmc\";\n+\t\t\t};\n+\n+\t\t\tsw {\n+\t\t\t\t/* unused */\n+\t\t\t};\n+\t\t};\n+\t};\n+};\n+\n+&spi0 {\n+\tstatus = \"okay\";\n+\n+\tflash@0 {\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <1>;\n+\t\tcompatible = \"jedec,spi-nor\";\n+\t\treg = <0>;\n+\t\tspi-max-frequency = <40000000>;\n+\t};\n+};\n+\n+&uart0 {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&uart0_ph_pins>;\n+\tstatus = \"okay\";\n+};\n+\n+&usbotg {\n+\tdr_mode = \"peripheral\";\n+\tstatus = \"okay\";\n+};\n+\n+&usbphy {\n+\tusb1_vbus-supply = <®_usb1_vbus>;\n+\tstatus = \"okay\";\n+};\ndiff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS\nindex d3755ae41a9d..90b9456ef80d 100644\n--- a/board/sunxi/MAINTAINERS\n+++ b/board/sunxi/MAINTAINERS\n@@ -420,6 +420,11 @@ M:\tDiego Rondini <diego.rondini@kynetics.com>\n S:\tMaintained\n F:\tconfigs/orangepi_zero_plus2_h3_defconfig\n \n+ORANGEPI ZERO 2 BOARD\n+M:\tJernej Skrabec <jernej.skrabec@siol.net>\n+S:\tMaintained\n+F:\tconfigs/orangepi_zero2_defconfig\n+\n ORANGEPI PC 2 BOARD\n M:\tAndre Przywara <andre.przywara@arm.com>\n S:\tMaintained\ndiff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig\nnew file mode 100644\nindex 000000000000..5af964bf100a\n--- /dev/null\n+++ b/configs/orangepi_zero2_defconfig\n@@ -0,0 +1,15 @@\n+CONFIG_ARM=y\n+CONFIG_ARCH_SUNXI=y\n+CONFIG_SPL=y\n+CONFIG_DRAM_SUN50I_H616_WRITE_LEVELING=y\n+CONFIG_DRAM_SUN50I_H616_READ_CALIBRATION=y\n+CONFIG_DRAM_SUN50I_H616_READ_TRAINING=y\n+CONFIG_DRAM_SUN50I_H616_WRITE_TRAINING=y\n+CONFIG_MACH_SUN50I_H616=y\n+CONFIG_MMC0_CD_PIN=\"PF6\"\n+CONFIG_R_I2C_ENABLE=y\n+CONFIG_DEFAULT_DEVICE_TREE=\"sun50i-h616-orangepi-zero2\"\n+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set\n+CONFIG_SPL_I2C_SUPPORT=y\n+CONFIG_PHY_REALTEK=y\n+CONFIG_SUN8I_EMAC=y\n", "prefixes": [ "17/17" ] }