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GET /api/patches/1421821/?format=api
{ "id": 1421821, "url": "http://patchwork.ozlabs.org/api/patches/1421821/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20210103092633.36226-7-jernej.skrabec@siol.net/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20210103092633.36226-7-jernej.skrabec@siol.net>", "list_archive_url": null, "date": "2021-01-03T09:26:22", "name": "[06/17] sunxi: Add support for I2C on H6 like SoCs", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "92d72f0b8890c09081c10b07b3750194bf4d6e35", "submitter": { "id": 70601, "url": "http://patchwork.ozlabs.org/api/people/70601/?format=api", "name": "Jernej Škrabec", "email": "jernej.skrabec@siol.net" }, "delegate": { "id": 114289, "url": "http://patchwork.ozlabs.org/api/users/114289/?format=api", "username": "apritzel", "first_name": "Andre", "last_name": "Przywara", "email": "andre.przywara@arm.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20210103092633.36226-7-jernej.skrabec@siol.net/mbox/", "series": [ { "id": 222511, "url": "http://patchwork.ozlabs.org/api/series/222511/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=222511", "date": "2021-01-03T09:26:16", "name": "sunxi: Introduce H616 support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/222511/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1421821/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1421821/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=<UNKNOWN>)", "ozlabs.org;\n dmarc=fail (p=none dis=none) header.from=siol.net", "phobos.denx.de;\n dmarc=fail (p=none dis=none) header.from=siol.net", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n dmarc=pass (p=none dis=none) header.from=siol.net", "phobos.denx.de;\n spf=pass smtp.mailfrom=jernej.skrabec@siol.net" ], "Received": [ "from phobos.denx.de (phobos.denx.de [85.214.62.61])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (4096 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 4D7tht4Bkrz9sVn\n\tfor <incoming@patchwork.ozlabs.org>; Sun, 3 Jan 2021 20:27:58 +1100 (AEDT)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 6743482649;\n\tSun, 3 Jan 2021 10:27:07 +0100 (CET)", "by phobos.denx.de (Postfix, from userid 109)\n id A45CA82668; Sun, 3 Jan 2021 10:27:06 +0100 (CET)", "from mail.siol.net (mailoutvs31.siol.net [185.57.226.222])\n (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 648FD82657\n for <u-boot@lists.denx.de>; Sun, 3 Jan 2021 10:27:03 +0100 (CET)", "from localhost (localhost [127.0.0.1])\n by mail.siol.net (Zimbra) with ESMTP id 14D98522B84;\n Sun, 3 Jan 2021 10:27:03 +0100 (CET)", "from mail.siol.net ([127.0.0.1])\n by localhost (psrvmta12.zcs-production.pri [127.0.0.1]) (amavisd-new,\n port 10032)\n with ESMTP id LI69kZ-uX1KX; Sun, 3 Jan 2021 10:27:02 +0100 (CET)", "from mail.siol.net (localhost [127.0.0.1])\n by mail.siol.net (Zimbra) with ESMTPS id C5D20522B8D;\n Sun, 3 Jan 2021 10:27:02 +0100 (CET)", "from localhost.localdomain (89-212-178-211.dynamic.t-2.net\n [89.212.178.211]) (Authenticated sender: 031275009)\n by mail.siol.net (Zimbra) with ESMTPSA id 7A1E4522B84;\n Sun, 3 Jan 2021 10:27:00 +0100 (CET)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.6 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_LOW,\n SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2", "From": "Jernej Skrabec <jernej.skrabec@siol.net>", "To": "jagan@amarulasolutions.com,\n\tandre.przywara@arm.com", "Cc": "hdegoede@redhat.com, jernej.skrabec@siol.net, lukma@denx.de, hs@denx.de,\n peng.fan@nxp.com, joe.hershberger@ni.com, jh80.chung@samsung.com,\n u-boot@lists.denx.de, linux-sunxi@googlegroups.com", "Subject": "[PATCH 06/17] sunxi: Add support for I2C on H6 like SoCs", "Date": "Sun, 3 Jan 2021 10:26:22 +0100", "Message-Id": "<20210103092633.36226-7-jernej.skrabec@siol.net>", "X-Mailer": "git-send-email 2.30.0", "In-Reply-To": "<20210103092633.36226-1-jernej.skrabec@siol.net>", "References": "<20210103092633.36226-1-jernej.skrabec@siol.net>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "quoted-printable", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.102.3 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "I2C support, especially R_I2C port, will be needed in future. Upcoming\nsupport for H616 will need R_I2C to adjust DRAM voltage.\n\nSigned-off-by: Jernej Skrabec <jernej.skrabec@siol.net>\n---\n .../include/asm/arch-sunxi/clock_sun50i_h6.h | 1 +\n arch/arm/mach-sunxi/Kconfig | 2 +-\n arch/arm/mach-sunxi/clock_sun50i_h6.c | 29 +++++++++++++++++++\n 3 files changed, 31 insertions(+), 1 deletion(-)", "diff": "diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h b/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h\nindex 426069fc69a4..e83e84ab6cab 100644\n--- a/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h\n+++ b/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h\n@@ -297,6 +297,7 @@ struct sunxi_ccm_reg {\n \n /* Module gate/reset shift*/\n #define RESET_SHIFT\t\t\t(16)\n+#define GATE_SHIFT\t\t\t(0)\n \n /* DRAM clock bit field */\n #define DRAM_MOD_RESET\t\t\tBIT(30)\ndiff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig\nindex 1cf79bad7cf6..69ab670abf39 100644\n--- a/arch/arm/mach-sunxi/Kconfig\n+++ b/arch/arm/mach-sunxi/Kconfig\n@@ -728,7 +728,7 @@ config I2C3_ENABLE\n \tSee I2C0_ENABLE help text.\n endif\n \n-if SUNXI_GEN_SUN6I\n+if SUNXI_GEN_SUN6I || SUN50I_GEN_H6\n config R_I2C_ENABLE\n \tbool \"Enable the PRCM I2C/TWI controller\"\n \t# This is used for the pmic on H3\ndiff --git a/arch/arm/mach-sunxi/clock_sun50i_h6.c b/arch/arm/mach-sunxi/clock_sun50i_h6.c\nindex ba8a26eb0d36..6bd466915c11 100644\n--- a/arch/arm/mach-sunxi/clock_sun50i_h6.c\n+++ b/arch/arm/mach-sunxi/clock_sun50i_h6.c\n@@ -2,6 +2,7 @@\n #include <asm/io.h>\n #include <asm/arch/cpu.h>\n #include <asm/arch/clock.h>\n+#include <asm/arch/prcm.h>\n \n #ifdef CONFIG_SPL_BUILD\n void clock_init_safe(void)\n@@ -92,3 +93,31 @@ unsigned int clock_get_pll6(void)\n \t/* The register defines PLL6-4X, not plain PLL6 */\n \treturn 24000000 / 4 * n / div1 / div2;\n }\n+\n+int clock_twi_onoff(int port, int state)\n+{\n+\tstruct sunxi_ccm_reg *const ccm =\n+\t\t(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;\n+\tstruct sunxi_prcm_reg *const prcm =\n+\t\t(struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;\n+\tu32 value, *ptr;\n+\tint shift;\n+\n+\tvalue = BIT(GATE_SHIFT) | BIT (RESET_SHIFT);\n+\n+\tif (port == 5) {\n+\t\tshift = 0;\n+\t\tptr = &prcm->twi_gate_reset;\n+\t} else {\n+\t\tshift = port;\n+\t\tptr = &ccm->twi_gate_reset;\n+\t}\n+\n+\t/* set the apb clock gate and reset for twi */\n+\tif (state)\n+\t\tsetbits_le32(ptr, value << shift);\n+\telse\n+\t\tclrbits_le32(ptr, value << shift);\n+\n+\treturn 0;\n+}\n", "prefixes": [ "06/17" ] }