Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/1421817/?format=api
{ "id": 1421817, "url": "http://patchwork.ozlabs.org/api/patches/1421817/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20210103092633.36226-3-jernej.skrabec@siol.net/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20210103092633.36226-3-jernej.skrabec@siol.net>", "list_archive_url": null, "date": "2021-01-03T09:26:18", "name": "[02/17] sunxi: Introduce common symbol for H6 like SoCs", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "cfa3e53a022a941ae350d73ec62a0cf9f12fb83c", "submitter": { "id": 70601, "url": "http://patchwork.ozlabs.org/api/people/70601/?format=api", "name": "Jernej Škrabec", "email": "jernej.skrabec@siol.net" }, "delegate": { "id": 114289, "url": "http://patchwork.ozlabs.org/api/users/114289/?format=api", "username": "apritzel", "first_name": "Andre", "last_name": "Przywara", "email": "andre.przywara@arm.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20210103092633.36226-3-jernej.skrabec@siol.net/mbox/", "series": [ { "id": 222511, "url": "http://patchwork.ozlabs.org/api/series/222511/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=222511", "date": "2021-01-03T09:26:16", "name": "sunxi: Introduce H616 support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/222511/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1421817/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1421817/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=<UNKNOWN>)", "ozlabs.org;\n dmarc=fail (p=none dis=none) header.from=siol.net", "phobos.denx.de;\n dmarc=fail (p=none dis=none) header.from=siol.net", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n dmarc=pass (p=none dis=none) header.from=siol.net", "phobos.denx.de;\n spf=pass smtp.mailfrom=jernej.skrabec@siol.net" ], "Received": [ "from phobos.denx.de (phobos.denx.de [85.214.62.61])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (4096 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 4D7thC735Bz9sVn\n\tfor <incoming@patchwork.ozlabs.org>; Sun, 3 Jan 2021 20:27:23 +1100 (AEDT)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id E44A08240E;\n\tSun, 3 Jan 2021 10:26:59 +0100 (CET)", "by phobos.denx.de (Postfix, from userid 109)\n id B2ADF82440; Sun, 3 Jan 2021 10:26:57 +0100 (CET)", "from mail.siol.net (mailoutvs34.siol.net [185.57.226.225])\n (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 684848006D\n for <u-boot@lists.denx.de>; Sun, 3 Jan 2021 10:26:54 +0100 (CET)", "from localhost (localhost [127.0.0.1])\n by mail.siol.net (Zimbra) with ESMTP id 26905522A3E;\n Sun, 3 Jan 2021 10:26:54 +0100 (CET)", "from mail.siol.net ([127.0.0.1])\n by localhost (psrvmta12.zcs-production.pri [127.0.0.1]) (amavisd-new,\n port 10032)\n with ESMTP id rbnEgPaAS_pC; Sun, 3 Jan 2021 10:26:53 +0100 (CET)", "from mail.siol.net (localhost [127.0.0.1])\n by mail.siol.net (Zimbra) with ESMTPS id A7D8A522A92;\n Sun, 3 Jan 2021 10:26:53 +0100 (CET)", "from localhost.localdomain (89-212-178-211.dynamic.t-2.net\n [89.212.178.211]) (Authenticated sender: 031275009)\n by mail.siol.net (Zimbra) with ESMTPSA id 67EBA522A5A;\n Sun, 3 Jan 2021 10:26:51 +0100 (CET)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.6 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_LOW,\n SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2", "From": "Jernej Skrabec <jernej.skrabec@siol.net>", "To": "jagan@amarulasolutions.com,\n\tandre.przywara@arm.com", "Cc": "hdegoede@redhat.com, jernej.skrabec@siol.net, lukma@denx.de, hs@denx.de,\n peng.fan@nxp.com, joe.hershberger@ni.com, jh80.chung@samsung.com,\n u-boot@lists.denx.de, linux-sunxi@googlegroups.com", "Subject": "[PATCH 02/17] sunxi: Introduce common symbol for H6 like SoCs", "Date": "Sun, 3 Jan 2021 10:26:18 +0100", "Message-Id": "<20210103092633.36226-3-jernej.skrabec@siol.net>", "X-Mailer": "git-send-email 2.30.0", "In-Reply-To": "<20210103092633.36226-1-jernej.skrabec@siol.net>", "References": "<20210103092633.36226-1-jernej.skrabec@siol.net>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "quoted-printable", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.102.3 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "It turns out that there are at least 2 other SoCs which have basically\nthe same memory map, similar clocks and other features as H6. It's very\nlikely that we'll see more such SoCs in the future. In order to ease\nporting to new SoCs and lower ifdef clutter, introduce common symbol for\nthem.\n\nSigned-off-by: Jernej Skrabec <jernej.skrabec@siol.net>\n---\n arch/arm/include/asm/arch-sunxi/boot0.h | 2 +-\n arch/arm/include/asm/arch-sunxi/clock.h | 2 +-\n arch/arm/include/asm/arch-sunxi/cpu.h | 2 +-\n arch/arm/include/asm/arch-sunxi/timer.h | 2 +-\n arch/arm/mach-sunxi/Kconfig | 21 +++++++++++++--------\n arch/arm/mach-sunxi/Makefile | 2 +-\n arch/arm/mach-sunxi/board.c | 4 ++--\n arch/arm/mach-sunxi/rmr_switch.S | 2 +-\n common/spl/Kconfig | 4 ++--\n include/configs/sun50i.h | 2 +-\n 10 files changed, 24 insertions(+), 19 deletions(-)", "diff": "diff --git a/arch/arm/include/asm/arch-sunxi/boot0.h b/arch/arm/include/asm/arch-sunxi/boot0.h\nindex 46d0f0666c2b..e8e8e38f0556 100644\n--- a/arch/arm/include/asm/arch-sunxi/boot0.h\n+++ b/arch/arm/include/asm/arch-sunxi/boot0.h\n@@ -39,7 +39,7 @@\n \t.word\t0xf57ff06f\t// isb sy\n \t.word\t0xe320f003\t// wfi\n \t.word\t0xeafffffd\t// b @wfi\n-#ifndef CONFIG_MACH_SUN50I_H6\n+#ifndef CONFIG_SUN50I_GEN_H6\n \t.word\t0x017000a0\t// writeable RVBAR mapping address\n #else\n \t.word\t0x09010040\t// writeable RVBAR mapping address\ndiff --git a/arch/arm/include/asm/arch-sunxi/clock.h b/arch/arm/include/asm/arch-sunxi/clock.h\nindex 5994130e6b54..cbbe5c7a1e68 100644\n--- a/arch/arm/include/asm/arch-sunxi/clock.h\n+++ b/arch/arm/include/asm/arch-sunxi/clock.h\n@@ -16,7 +16,7 @@\n /* clock control module regs definition */\n #if defined(CONFIG_MACH_SUN8I_A83T)\n #include <asm/arch/clock_sun8i_a83t.h>\n-#elif defined(CONFIG_MACH_SUN50I_H6)\n+#elif defined(CONFIG_SUN50I_GEN_H6)\n #include <asm/arch/clock_sun50i_h6.h>\n #elif defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN8I) || \\\n defined(CONFIG_MACH_SUN50I)\ndiff --git a/arch/arm/include/asm/arch-sunxi/cpu.h b/arch/arm/include/asm/arch-sunxi/cpu.h\nindex 8b57d24e2f0c..b08f2023748c 100644\n--- a/arch/arm/include/asm/arch-sunxi/cpu.h\n+++ b/arch/arm/include/asm/arch-sunxi/cpu.h\n@@ -8,7 +8,7 @@\n \n #if defined(CONFIG_MACH_SUN9I)\n #include <asm/arch/cpu_sun9i.h>\n-#elif defined(CONFIG_MACH_SUN50I_H6)\n+#elif defined(CONFIG_SUN50I_GEN_H6)\n #include <asm/arch/cpu_sun50i_h6.h>\n #else\n #include <asm/arch/cpu_sun4i.h>\ndiff --git a/arch/arm/include/asm/arch-sunxi/timer.h b/arch/arm/include/asm/arch-sunxi/timer.h\nindex 6f138d04b806..bb5626d893bb 100644\n--- a/arch/arm/include/asm/arch-sunxi/timer.h\n+++ b/arch/arm/include/asm/arch-sunxi/timer.h\n@@ -76,7 +76,7 @@ struct sunxi_timer_reg {\n \tstruct sunxi_tgp tgp[4];\n \tu8 res5[8];\n \tu32 cpu_cfg;\n-#elif defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_MACH_SUN50I_H6)\n+#elif defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6)\n \tu8 res3[16];\n \tstruct sunxi_wdog wdog[5];\t/* We have 5 watchdogs */\n #endif\ndiff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig\nindex 49ef217f08c0..1cf79bad7cf6 100644\n--- a/arch/arm/mach-sunxi/Kconfig\n+++ b/arch/arm/mach-sunxi/Kconfig\n@@ -82,7 +82,7 @@ config SUN8I_RSB\n config SUNXI_SRAM_ADDRESS\n \thex\n \tdefault 0x10000 if MACH_SUN9I || MACH_SUN50I || MACH_SUN50I_H5\n-\tdefault 0x20000 if MACH_SUN50I_H6\n+\tdefault 0x20000 if SUN50I_GEN_H6\n \tdefault 0x0\n \t---help---\n \tOlder Allwinner SoCs have their mask boot ROM mapped just below 4GB,\n@@ -108,6 +108,15 @@ config SUNXI_GEN_SUN6I\n \tseparate ahb reset control registers, custom pmic bus, new style\n \twatchdog, etc.\n \n+config SUN50I_GEN_H6\n+\tbool\n+\tselect FIT\n+\tselect SPL_LOAD_FIT\n+\tselect SUPPORT_SPL\n+\t---help---\n+\tSelect this for sunxi SoCs which have H6 like peripherals, clocks\n+\tand memory map.\n+\n config SUNXI_DRAM_DW\n \tbool\n \t---help---\n@@ -302,10 +311,7 @@ config MACH_SUN50I_H5\n config MACH_SUN50I_H6\n \tbool \"sun50i (Allwinner H6)\"\n \tselect ARM64\n-\tselect SUPPORT_SPL\n-\tselect FIT\n \tselect PHY_SUN4I_USB\n-\tselect SPL_LOAD_FIT\n \tselect DRAM_SUN50I_H6\n \n endchoice\n@@ -540,7 +546,6 @@ config SYS_CLK_FREQ\n \tdefault 816000000 if MACH_SUN50I || MACH_SUN50I_H5\n \tdefault 1008000000 if MACH_SUN8I\n \tdefault 1008000000 if MACH_SUN9I\n-\tdefault 888000000 if MACH_SUN50I_H6\n \n config SYS_CONFIG_NAME\n \tdefault \"sun4i\" if MACH_SUN4I\n@@ -756,7 +761,7 @@ config VIDEO_SUNXI\n \tdepends on !MACH_SUN8I_V3S\n \tdepends on !MACH_SUN9I\n \tdepends on !MACH_SUN50I\n-\tdepends on !MACH_SUN50I_H6\n+\tdepends on !SUN50I_GEN_H6\n \tselect VIDEO\n \timply VIDEO_DT_SIMPLEFB\n \tdefault y\n@@ -989,11 +994,11 @@ config SPL_STACK_R_ADDR\n \tdefault 0x4fe00000 if MACH_SUN8I\n \tdefault 0x2fe00000 if MACH_SUN9I\n \tdefault 0x4fe00000 if MACH_SUN50I\n-\tdefault 0x4fe00000 if MACH_SUN50I_H6\n+\tdefault 0x4fe00000 if SUN50I_GEN_H6\n \n config SPL_SPI_SUNXI\n \tbool \"Support for SPI Flash on Allwinner SoCs in SPL\"\n-\tdepends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40 || MACH_SUN50I_H6\n+\tdepends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40 || SUN50I_GEN_H6\n \thelp\n \t Enable support for SPI Flash. This option allows SPL to read from\n \t sunxi SPI Flash. It uses the same method as the boot ROM, so does\ndiff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile\nindex d129f334798b..b8aca43d6630 100644\n--- a/arch/arm/mach-sunxi/Makefile\n+++ b/arch/arm/mach-sunxi/Makefile\n@@ -26,7 +26,7 @@ else\n obj-$(CONFIG_MACH_SUN8I)\t+= clock_sun6i.o\n endif\n obj-$(CONFIG_MACH_SUN9I)\t+= clock_sun9i.o gtbus_sun9i.o\n-obj-$(CONFIG_MACH_SUN50I_H6)\t+= clock_sun50i_h6.o\n+obj-$(CONFIG_SUN50I_GEN_H6)\t+= clock_sun50i_h6.o\n \n ifdef CONFIG_SPL_BUILD\n obj-$(CONFIG_DRAM_SUN4I)\t+= dram_sun4i.o\ndiff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c\nindex f40fccd8f8b9..7a8b303f233c 100644\n--- a/arch/arm/mach-sunxi/board.c\n+++ b/arch/arm/mach-sunxi/board.c\n@@ -144,7 +144,7 @@ static int gpio_init(void)\n #error Unsupported console port number. Please fix pin mux settings in board.c\n #endif\n \n-#ifdef CONFIG_MACH_SUN50I_H6\n+#ifdef CONFIG_SUN50I_GEN_H6\n \t/* Update PIO power bias configuration by copy hardware detected value */\n \tval = readl(SUNXI_PIO_BASE + SUN50I_H6_GPIO_POW_MOD_VAL);\n \twritel(val, SUNXI_PIO_BASE + SUN50I_H6_GPIO_POW_MOD_SEL);\n@@ -329,7 +329,7 @@ void reset_cpu(ulong addr)\n \t\t/* sun5i sometimes gets stuck without this */\n \t\twritel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode);\n \t}\n-#elif defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_MACH_SUN50I_H6)\n+#elif defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6)\n #if defined(CONFIG_MACH_SUN50I_H6)\n \t/* WDOG is broken for some H6 rev. use the R_WDOG instead */\n \tstatic const struct sunxi_wdog *wdog =\ndiff --git a/arch/arm/mach-sunxi/rmr_switch.S b/arch/arm/mach-sunxi/rmr_switch.S\nindex fafd306f95b1..33e55d496865 100644\n--- a/arch/arm/mach-sunxi/rmr_switch.S\n+++ b/arch/arm/mach-sunxi/rmr_switch.S\n@@ -30,7 +30,7 @@\n \n .text\n \n-#ifndef CONFIG_MACH_SUN50I_H6\n+#ifndef CONFIG_SUN50I_GEN_H6\n \tldr\tr1, =0x017000a0\t\t@ MMIO mapped RVBAR[0] register\n #else\n \tldr\tr1, =0x09010040\t\t@ MMIO mapped RVBAR[0] register\ndiff --git a/common/spl/Kconfig b/common/spl/Kconfig\nindex d8086bd9e874..bed715774d81 100644\n--- a/common/spl/Kconfig\n+++ b/common/spl/Kconfig\n@@ -150,7 +150,7 @@ config SPL_TEXT_BASE\n \thex \"SPL Text Base\"\n \tdefault ISW_ENTRY_ADDR if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE\n \tdefault 0x10060 if MACH_SUN50I || MACH_SUN50I_H5 || MACH_SUN9I\n-\tdefault 0x20060 if MACH_SUN50I_H6\n+\tdefault 0x20060 if SUN50I_GEN_H6\n \tdefault 0x00060 if ARCH_SUNXI\n \tdefault 0xfffc0000 if ARCH_ZYNQMP\n \tdefault 0x0\n@@ -459,7 +459,7 @@ config SPL_SHA512_SUPPORT\n config SPL_FIT_IMAGE_TINY\n \tbool \"Remove functionality from SPL FIT loading to reduce size\"\n \tdepends on SPL_FIT\n-\tdefault y if MACH_SUN50I || MACH_SUN50I_H5 || MACH_SUN50I_H6\n+\tdefault y if MACH_SUN50I || MACH_SUN50I_H5 || SUN50I_GEN_H6\n \tdefault y if ARCH_IMX8M\n \thelp\n \t Enable this to reduce the size of the FIT image loading code\ndiff --git a/include/configs/sun50i.h b/include/configs/sun50i.h\nindex e050a5299f3b..bc2e3a3d0088 100644\n--- a/include/configs/sun50i.h\n+++ b/include/configs/sun50i.h\n@@ -10,7 +10,7 @@\n * A64 specific configuration\n */\n \n-#ifndef CONFIG_MACH_SUN50I_H6\n+#ifndef CONFIG_SUN50I_GEN_H6\n #define GICD_BASE\t\t0x1c81000\n #define GICC_BASE\t\t0x1c82000\n #else\n", "prefixes": [ "02/17" ] }