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GET /api/patches/1414998/?format=api
{ "id": 1414998, "url": "http://patchwork.ozlabs.org/api/patches/1414998/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20201211160612.1498780-32-sr@denx.de/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20201211160612.1498780-32-sr@denx.de>", "list_archive_url": null, "date": "2020-12-11T16:05:53", "name": "[v1,31/50] mips: octeon: Add cvmx-sriox-defs.h header file", "commit_ref": "0ad3593fca6bb2e9dcf8f1b093247197e7c7d79e", "pull_url": null, "state": "accepted", "archived": false, "hash": "07380b76b60d50fbefe68234e1e4ccde9184b716", "submitter": { "id": 13, "url": "http://patchwork.ozlabs.org/api/people/13/?format=api", "name": "Stefan Roese", "email": "sr@denx.de" }, "delegate": { "id": 4307, "url": "http://patchwork.ozlabs.org/api/users/4307/?format=api", "username": "danielschwierzeck", "first_name": "Daniel", "last_name": "Schwierzeck", "email": "daniel.schwierzeck@googlemail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20201211160612.1498780-32-sr@denx.de/mbox/", "series": [ { "id": 220054, "url": "http://patchwork.ozlabs.org/api/series/220054/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=220054", "date": "2020-12-11T16:05:23", "name": "mips: octeon: Add serdes and device helper support incl. DM PCIe driver", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/220054/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1414998/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1414998/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=<UNKNOWN>)", "ozlabs.org;\n dmarc=none (p=none dis=none) header.from=denx.de", "ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=denx.de header.i=@denx.de header.a=rsa-sha256\n header.s=phobos-20191101 header.b=zBnlD2G8;\n\tdkim-atps=neutral", "phobos.denx.de;\n dmarc=none (p=none dis=none) header.from=denx.de", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n dmarc=none (p=none dis=none) header.from=denx.de", "phobos.denx.de; spf=none smtp.mailfrom=sr@denx.de" ], "Received": [ "from phobos.denx.de (phobos.denx.de [85.214.62.61])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (4096 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 4Cswk962kfz9sSs\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 12 Dec 2020 03:10:41 +1100 (AEDT)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 0ABE282697;\n\tFri, 11 Dec 2020 17:07:51 +0100 (CET)", "by phobos.denx.de (Postfix, from userid 109)\n id 6FA7782790; Fri, 11 Dec 2020 17:07:19 +0100 (CET)", "from mx2.mailbox.org (mx2.mailbox.org [80.241.60.215])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 754F582745\n for <u-boot@lists.denx.de>; Fri, 11 Dec 2020 17:06:26 +0100 (CET)", "from smtp1.mailbox.org (smtp1.mailbox.org [80.241.60.240])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest\n SHA256) (No client certificate requested)\n by mx2.mailbox.org (Postfix) with ESMTPS id CCCE6A0E1C;\n Fri, 11 Dec 2020 17:06:25 +0100 (CET)", "from smtp1.mailbox.org ([80.241.60.240])\n by spamfilter01.heinlein-hosting.de (spamfilter01.heinlein-hosting.de\n [80.241.56.115]) (amavisd-new, port 10030)\n with ESMTP id w2ugFm9dFL0r; Fri, 11 Dec 2020 17:06:22 +0100 (CET)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de;\n\ts=phobos-20191101; t=1607702871;\n\tbh=AS9j+ioWBZXZGsfs/OsZSsc0eQB8rb3dXf4ghkxmllM=;\n\th=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id:\n\t List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe:\n\t From;\n\tb=zBnlD2G8/XbZqzuQLPw8b8fh0OScA9TW49oXoG3VDE/4aOHD91C/4Fk3Mapc2rcfA\n\t aac4dW3hv60yq23Nv56UYp/5xoQkgIDDUf51qed3fUUhmsgS+DCIUiHj2hKKCylchi\n\t WfcEL1MJA4IpyJjdAfxUZM88u+xHpiRaJ3c3J2IsD+FCq+6X+j6rryeu/f1erMBEJ3\n\t lXjB76whhkOTfXkp6ONcPtFWvcd7VyQkMdbU7dUlO6kW1Yrrhc6+x/iN4TDDKKS3Bh\n\t Ts/u6znTQLDa1LwOqfrgityx/aKmVSJcvLtFuvVQlL7Tvcpdcwq8i7saIqM+0Lfdd4\n\t 3CkseTRAQLIrg==", "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.6 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_LOW,\n SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2", "From": "Stefan Roese <sr@denx.de>", "To": "u-boot@lists.denx.de", "Cc": "daniel.schwierzeck@gmail.com, awilliams@marvell.com, cchavva@marvell.com", "Subject": "[PATCH v1 31/50] mips: octeon: Add cvmx-sriox-defs.h header file", "Date": "Fri, 11 Dec 2020 17:05:53 +0100", "Message-Id": "<20201211160612.1498780-32-sr@denx.de>", "In-Reply-To": "<20201211160612.1498780-1-sr@denx.de>", "References": "<20201211160612.1498780-1-sr@denx.de>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-MBO-SPAM-Probability": "", "X-Rspamd-Score": "-0.56 / 15.00 / 15.00", "X-Rspamd-Queue-Id": "C1C331897", "X-Rspamd-UID": "cf25da", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.102.3 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "From: Aaron Williams <awilliams@marvell.com>\n\nImport cvmx-sriox-defs.h header file from 2013 U-Boot. It will be used\nby the later added drivers to support PCIe and networking on the MIPS\nOcteon II / III platforms.\n\nSigned-off-by: Aaron Williams <awilliams@marvell.com>\nSigned-off-by: Stefan Roese <sr@denx.de>\n---\n\n .../include/mach/cvmx-sriox-defs.h | 44 +++++++++++++++++++\n 1 file changed, 44 insertions(+)\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-sriox-defs.h", "diff": "diff --git a/arch/mips/mach-octeon/include/mach/cvmx-sriox-defs.h b/arch/mips/mach-octeon/include/mach/cvmx-sriox-defs.h\nnew file mode 100644\nindex 0000000000..ac988609a1\n--- /dev/null\n+++ b/arch/mips/mach-octeon/include/mach/cvmx-sriox-defs.h\n@@ -0,0 +1,44 @@\n+/* SPDX-License-Identifier: GPL-2.0 */\n+/*\n+ * Copyright (C) 2020 Marvell International Ltd.\n+ */\n+\n+#ifndef __CVMX_SRIOX_DEFS_H__\n+#define __CVMX_SRIOX_DEFS_H__\n+\n+#define CVMX_SRIOX_STATUS_REG(offset) (0x00011800C8000100ull + ((offset) & 3) * 0x1000000ull)\n+\n+/**\n+ * cvmx_srio#_status_reg\n+ *\n+ * The SRIO field displays if the port has been configured for SRIO operation. This register\n+ * can be read regardless of whether the SRIO is selected or being reset. Although some other\n+ * registers can be accessed while the ACCESS bit is zero (see individual registers for details),\n+ * the majority of SRIO registers and all the SRIOMAINT registers can be used only when the\n+ * ACCESS bit is asserted.\n+ *\n+ * This register is reset by the coprocessor-clock reset.\n+ */\n+union cvmx_sriox_status_reg {\n+\tu64 u64;\n+\tstruct cvmx_sriox_status_reg_s {\n+\t\tu64 reserved_9_63 : 55;\n+\t\tu64 host : 1;\n+\t\tu64 spd : 4;\n+\t\tu64 run_type : 2;\n+\t\tu64 access : 1;\n+\t\tu64 srio : 1;\n+\t} s;\n+\tstruct cvmx_sriox_status_reg_cn63xx {\n+\t\tu64 reserved_2_63 : 62;\n+\t\tu64 access : 1;\n+\t\tu64 srio : 1;\n+\t} cn63xx;\n+\tstruct cvmx_sriox_status_reg_cn63xx cn63xxp1;\n+\tstruct cvmx_sriox_status_reg_cn63xx cn66xx;\n+\tstruct cvmx_sriox_status_reg_s cnf75xx;\n+};\n+\n+typedef union cvmx_sriox_status_reg cvmx_sriox_status_reg_t;\n+\n+#endif\n", "prefixes": [ "v1", "31/50" ] }