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{
    "id": 1414996,
    "url": "http://patchwork.ozlabs.org/api/patches/1414996/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20201211160612.1498780-22-sr@denx.de/",
    "project": {
        "id": 18,
        "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api",
        "name": "U-Boot",
        "link_name": "uboot",
        "list_id": "u-boot.lists.denx.de",
        "list_email": "u-boot@lists.denx.de",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
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    },
    "msgid": "<20201211160612.1498780-22-sr@denx.de>",
    "list_archive_url": null,
    "date": "2020-12-11T16:05:43",
    "name": "[v1,21/50] mips: octeon: Add cvmx-pepx-defs.h header file",
    "commit_ref": "bbd0e2c75d9573d66602f8756f11968dfb1a4de6",
    "pull_url": null,
    "state": "accepted",
    "archived": false,
    "hash": "c02efb6909921a5209994c1a9a2158b275456063",
    "submitter": {
        "id": 13,
        "url": "http://patchwork.ozlabs.org/api/people/13/?format=api",
        "name": "Stefan Roese",
        "email": "sr@denx.de"
    },
    "delegate": {
        "id": 4307,
        "url": "http://patchwork.ozlabs.org/api/users/4307/?format=api",
        "username": "danielschwierzeck",
        "first_name": "Daniel",
        "last_name": "Schwierzeck",
        "email": "daniel.schwierzeck@googlemail.com"
    },
    "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20201211160612.1498780-22-sr@denx.de/mbox/",
    "series": [
        {
            "id": 220054,
            "url": "http://patchwork.ozlabs.org/api/series/220054/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=220054",
            "date": "2020-12-11T16:05:23",
            "name": "mips: octeon: Add serdes and device helper support incl. DM PCIe driver",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/220054/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/1414996/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/1414996/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Stefan Roese <sr@denx.de>",
        "To": "u-boot@lists.denx.de",
        "Cc": "daniel.schwierzeck@gmail.com, awilliams@marvell.com, cchavva@marvell.com",
        "Subject": "[PATCH v1 21/50] mips: octeon: Add cvmx-pepx-defs.h header file",
        "Date": "Fri, 11 Dec 2020 17:05:43 +0100",
        "Message-Id": "<20201211160612.1498780-22-sr@denx.de>",
        "In-Reply-To": "<20201211160612.1498780-1-sr@denx.de>",
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    "content": "From: Aaron Williams <awilliams@marvell.com>\n\nImport cvmx-pepx-defs.h header file from 2013 U-Boot. It will be used\nby the later added drivers to support PCIe and networking on the MIPS\nOcteon II / III platforms.\n\nSigned-off-by: Aaron Williams <awilliams@marvell.com>\nSigned-off-by: Stefan Roese <sr@denx.de>\n---\n\n .../mach-octeon/include/mach/cvmx-pexp-defs.h | 1382 +++++++++++++++++\n 1 file changed, 1382 insertions(+)\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pexp-defs.h",
    "diff": "diff --git a/arch/mips/mach-octeon/include/mach/cvmx-pexp-defs.h b/arch/mips/mach-octeon/include/mach/cvmx-pexp-defs.h\nnew file mode 100644\nindex 0000000000..333c2caee1\n--- /dev/null\n+++ b/arch/mips/mach-octeon/include/mach/cvmx-pexp-defs.h\n@@ -0,0 +1,1382 @@\n+/* SPDX-License-Identifier: GPL-2.0 */\n+/*\n+ * Copyright (C) 2020 Marvell International Ltd.\n+ *\n+ * Configuration and status register (CSR) definitions for\n+ * OCTEON PEXP.\n+ */\n+\n+#ifndef __CVMX_PEXP_DEFS_H__\n+#define __CVMX_PEXP_DEFS_H__\n+\n+#define CVMX_PEXP_NPEI_BAR1_INDEXX(offset)\t(0x00011F0000008000ull + ((offset) & 31) * 16)\n+#define CVMX_PEXP_NPEI_BIST_STATUS\t\t(0x00011F0000008580ull)\n+#define CVMX_PEXP_NPEI_BIST_STATUS2\t\t(0x00011F0000008680ull)\n+#define CVMX_PEXP_NPEI_CTL_PORT0\t\t(0x00011F0000008250ull)\n+#define CVMX_PEXP_NPEI_CTL_PORT1\t\t(0x00011F0000008260ull)\n+#define CVMX_PEXP_NPEI_CTL_STATUS\t\t(0x00011F0000008570ull)\n+#define CVMX_PEXP_NPEI_CTL_STATUS2\t\t(0x00011F000000BC00ull)\n+#define CVMX_PEXP_NPEI_DATA_OUT_CNT\t\t(0x00011F00000085F0ull)\n+#define CVMX_PEXP_NPEI_DBG_DATA\t\t\t(0x00011F0000008510ull)\n+#define CVMX_PEXP_NPEI_DBG_SELECT\t\t(0x00011F0000008500ull)\n+#define CVMX_PEXP_NPEI_DMA0_INT_LEVEL\t\t(0x00011F00000085C0ull)\n+#define CVMX_PEXP_NPEI_DMA1_INT_LEVEL\t\t(0x00011F00000085D0ull)\n+#define CVMX_PEXP_NPEI_DMAX_COUNTS(offset)\t(0x00011F0000008450ull + ((offset) & 7) * 16)\n+#define CVMX_PEXP_NPEI_DMAX_DBELL(offset)\t(0x00011F00000083B0ull + ((offset) & 7) * 16)\n+#define CVMX_PEXP_NPEI_DMAX_IBUFF_SADDR(offset) (0x00011F0000008400ull + ((offset) & 7) * 16)\n+#define CVMX_PEXP_NPEI_DMAX_NADDR(offset)\t(0x00011F00000084A0ull + ((offset) & 7) * 16)\n+#define CVMX_PEXP_NPEI_DMA_CNTS\t\t\t(0x00011F00000085E0ull)\n+#define CVMX_PEXP_NPEI_DMA_CONTROL\t\t(0x00011F00000083A0ull)\n+#define CVMX_PEXP_NPEI_DMA_PCIE_REQ_NUM\t\t(0x00011F00000085B0ull)\n+#define CVMX_PEXP_NPEI_DMA_STATE1\t\t(0x00011F00000086C0ull)\n+#define CVMX_PEXP_NPEI_DMA_STATE1_P1\t\t(0x00011F0000008680ull)\n+#define CVMX_PEXP_NPEI_DMA_STATE2\t\t(0x00011F00000086D0ull)\n+#define CVMX_PEXP_NPEI_DMA_STATE2_P1\t\t(0x00011F0000008690ull)\n+#define CVMX_PEXP_NPEI_DMA_STATE3_P1\t\t(0x00011F00000086A0ull)\n+#define CVMX_PEXP_NPEI_DMA_STATE4_P1\t\t(0x00011F00000086B0ull)\n+#define CVMX_PEXP_NPEI_DMA_STATE5_P1\t\t(0x00011F00000086C0ull)\n+#define CVMX_PEXP_NPEI_INT_A_ENB\t\t(0x00011F0000008560ull)\n+#define CVMX_PEXP_NPEI_INT_A_ENB2\t\t(0x00011F000000BCE0ull)\n+#define CVMX_PEXP_NPEI_INT_A_SUM\t\t(0x00011F0000008550ull)\n+#define CVMX_PEXP_NPEI_INT_ENB\t\t\t(0x00011F0000008540ull)\n+#define CVMX_PEXP_NPEI_INT_ENB2\t\t\t(0x00011F000000BCD0ull)\n+#define CVMX_PEXP_NPEI_INT_INFO\t\t\t(0x00011F0000008590ull)\n+#define CVMX_PEXP_NPEI_INT_SUM\t\t\t(0x00011F0000008530ull)\n+#define CVMX_PEXP_NPEI_INT_SUM2\t\t\t(0x00011F000000BCC0ull)\n+#define CVMX_PEXP_NPEI_LAST_WIN_RDATA0\t\t(0x00011F0000008600ull)\n+#define CVMX_PEXP_NPEI_LAST_WIN_RDATA1\t\t(0x00011F0000008610ull)\n+#define CVMX_PEXP_NPEI_MEM_ACCESS_CTL\t\t(0x00011F00000084F0ull)\n+#define CVMX_PEXP_NPEI_MEM_ACCESS_SUBIDX(offset)                                                   \\\n+\t(0x00011F0000008280ull + ((offset) & 31) * 16 - 16 * 12)\n+#define CVMX_PEXP_NPEI_MSI_ENB0\t\t\t      (0x00011F000000BC50ull)\n+#define CVMX_PEXP_NPEI_MSI_ENB1\t\t\t      (0x00011F000000BC60ull)\n+#define CVMX_PEXP_NPEI_MSI_ENB2\t\t\t      (0x00011F000000BC70ull)\n+#define CVMX_PEXP_NPEI_MSI_ENB3\t\t\t      (0x00011F000000BC80ull)\n+#define CVMX_PEXP_NPEI_MSI_RCV0\t\t\t      (0x00011F000000BC10ull)\n+#define CVMX_PEXP_NPEI_MSI_RCV1\t\t\t      (0x00011F000000BC20ull)\n+#define CVMX_PEXP_NPEI_MSI_RCV2\t\t\t      (0x00011F000000BC30ull)\n+#define CVMX_PEXP_NPEI_MSI_RCV3\t\t\t      (0x00011F000000BC40ull)\n+#define CVMX_PEXP_NPEI_MSI_RD_MAP\t\t      (0x00011F000000BCA0ull)\n+#define CVMX_PEXP_NPEI_MSI_W1C_ENB0\t\t      (0x00011F000000BCF0ull)\n+#define CVMX_PEXP_NPEI_MSI_W1C_ENB1\t\t      (0x00011F000000BD00ull)\n+#define CVMX_PEXP_NPEI_MSI_W1C_ENB2\t\t      (0x00011F000000BD10ull)\n+#define CVMX_PEXP_NPEI_MSI_W1C_ENB3\t\t      (0x00011F000000BD20ull)\n+#define CVMX_PEXP_NPEI_MSI_W1S_ENB0\t\t      (0x00011F000000BD30ull)\n+#define CVMX_PEXP_NPEI_MSI_W1S_ENB1\t\t      (0x00011F000000BD40ull)\n+#define CVMX_PEXP_NPEI_MSI_W1S_ENB2\t\t      (0x00011F000000BD50ull)\n+#define CVMX_PEXP_NPEI_MSI_W1S_ENB3\t\t      (0x00011F000000BD60ull)\n+#define CVMX_PEXP_NPEI_MSI_WR_MAP\t\t      (0x00011F000000BC90ull)\n+#define CVMX_PEXP_NPEI_PCIE_CREDIT_CNT\t\t      (0x00011F000000BD70ull)\n+#define CVMX_PEXP_NPEI_PCIE_MSI_RCV\t\t      (0x00011F000000BCB0ull)\n+#define CVMX_PEXP_NPEI_PCIE_MSI_RCV_B1\t\t      (0x00011F0000008650ull)\n+#define CVMX_PEXP_NPEI_PCIE_MSI_RCV_B2\t\t      (0x00011F0000008660ull)\n+#define CVMX_PEXP_NPEI_PCIE_MSI_RCV_B3\t\t      (0x00011F0000008670ull)\n+#define CVMX_PEXP_NPEI_PKTX_CNTS(offset)\t      (0x00011F000000A400ull + ((offset) & 31) * 16)\n+#define CVMX_PEXP_NPEI_PKTX_INSTR_BADDR(offset)\t      (0x00011F000000A800ull + ((offset) & 31) * 16)\n+#define CVMX_PEXP_NPEI_PKTX_INSTR_BAOFF_DBELL(offset) (0x00011F000000AC00ull + ((offset) & 31) * 16)\n+#define CVMX_PEXP_NPEI_PKTX_INSTR_FIFO_RSIZE(offset)  (0x00011F000000B000ull + ((offset) & 31) * 16)\n+#define CVMX_PEXP_NPEI_PKTX_INSTR_HEADER(offset)      (0x00011F000000B400ull + ((offset) & 31) * 16)\n+#define CVMX_PEXP_NPEI_PKTX_IN_BP(offset)\t      (0x00011F000000B800ull + ((offset) & 31) * 16)\n+#define CVMX_PEXP_NPEI_PKTX_SLIST_BADDR(offset)\t      (0x00011F0000009400ull + ((offset) & 31) * 16)\n+#define CVMX_PEXP_NPEI_PKTX_SLIST_BAOFF_DBELL(offset) (0x00011F0000009800ull + ((offset) & 31) * 16)\n+#define CVMX_PEXP_NPEI_PKTX_SLIST_FIFO_RSIZE(offset)  (0x00011F0000009C00ull + ((offset) & 31) * 16)\n+#define CVMX_PEXP_NPEI_PKT_CNT_INT\t\t      (0x00011F0000009110ull)\n+#define CVMX_PEXP_NPEI_PKT_CNT_INT_ENB\t\t      (0x00011F0000009130ull)\n+#define CVMX_PEXP_NPEI_PKT_DATA_OUT_ES\t\t      (0x00011F00000090B0ull)\n+#define CVMX_PEXP_NPEI_PKT_DATA_OUT_NS\t\t      (0x00011F00000090A0ull)\n+#define CVMX_PEXP_NPEI_PKT_DATA_OUT_ROR\t\t      (0x00011F0000009090ull)\n+#define CVMX_PEXP_NPEI_PKT_DPADDR\t\t      (0x00011F0000009080ull)\n+#define CVMX_PEXP_NPEI_PKT_INPUT_CONTROL\t      (0x00011F0000009150ull)\n+#define CVMX_PEXP_NPEI_PKT_INSTR_ENB\t\t      (0x00011F0000009000ull)\n+#define CVMX_PEXP_NPEI_PKT_INSTR_RD_SIZE\t      (0x00011F0000009190ull)\n+#define CVMX_PEXP_NPEI_PKT_INSTR_SIZE\t\t      (0x00011F0000009020ull)\n+#define CVMX_PEXP_NPEI_PKT_INT_LEVELS\t\t      (0x00011F0000009100ull)\n+#define CVMX_PEXP_NPEI_PKT_IN_BP\t\t      (0x00011F00000086B0ull)\n+#define CVMX_PEXP_NPEI_PKT_IN_DONEX_CNTS(offset)      (0x00011F000000A000ull + ((offset) & 31) * 16)\n+#define CVMX_PEXP_NPEI_PKT_IN_INSTR_COUNTS\t      (0x00011F00000086A0ull)\n+#define CVMX_PEXP_NPEI_PKT_IN_PCIE_PORT\t\t      (0x00011F00000091A0ull)\n+#define CVMX_PEXP_NPEI_PKT_IPTR\t\t\t      (0x00011F0000009070ull)\n+#define CVMX_PEXP_NPEI_PKT_OUTPUT_WMARK\t\t      (0x00011F0000009160ull)\n+#define CVMX_PEXP_NPEI_PKT_OUT_BMODE\t\t      (0x00011F00000090D0ull)\n+#define CVMX_PEXP_NPEI_PKT_OUT_ENB\t\t      (0x00011F0000009010ull)\n+#define CVMX_PEXP_NPEI_PKT_PCIE_PORT\t\t      (0x00011F00000090E0ull)\n+#define CVMX_PEXP_NPEI_PKT_PORT_IN_RST\t\t      (0x00011F0000008690ull)\n+#define CVMX_PEXP_NPEI_PKT_SLIST_ES\t\t      (0x00011F0000009050ull)\n+#define CVMX_PEXP_NPEI_PKT_SLIST_ID_SIZE\t      (0x00011F0000009180ull)\n+#define CVMX_PEXP_NPEI_PKT_SLIST_NS\t\t      (0x00011F0000009040ull)\n+#define CVMX_PEXP_NPEI_PKT_SLIST_ROR\t\t      (0x00011F0000009030ull)\n+#define CVMX_PEXP_NPEI_PKT_TIME_INT\t\t      (0x00011F0000009120ull)\n+#define CVMX_PEXP_NPEI_PKT_TIME_INT_ENB\t\t      (0x00011F0000009140ull)\n+#define CVMX_PEXP_NPEI_RSL_INT_BLOCKS\t\t      (0x00011F0000008520ull)\n+#define CVMX_PEXP_NPEI_SCRATCH_1\t\t      (0x00011F0000008270ull)\n+#define CVMX_PEXP_NPEI_STATE1\t\t\t      (0x00011F0000008620ull)\n+#define CVMX_PEXP_NPEI_STATE2\t\t\t      (0x00011F0000008630ull)\n+#define CVMX_PEXP_NPEI_STATE3\t\t\t      (0x00011F0000008640ull)\n+#define CVMX_PEXP_NPEI_WINDOW_CTL\t\t      (0x00011F0000008380ull)\n+#define CVMX_PEXP_NQM_VFX_ACQ(offset)\t\t      (0x0001450000000030ull + ((offset) & 2047) * 0x20000ull)\n+#define CVMX_PEXP_NQM_VFX_AQA(offset)\t\t      (0x0001450000000024ull + ((offset) & 2047) * 0x20000ull)\n+#define CVMX_PEXP_NQM_VFX_ASQ(offset)\t\t      (0x0001450000000028ull + ((offset) & 2047) * 0x20000ull)\n+#define CVMX_PEXP_NQM_VFX_CAP(offset)\t\t      (0x0001450000000000ull + ((offset) & 2047) * 0x20000ull)\n+#define CVMX_PEXP_NQM_VFX_CC(offset)\t\t      (0x0001450000000014ull + ((offset) & 2047) * 0x20000ull)\n+#define CVMX_PEXP_NQM_VFX_CQX_HDBL(offset, block_id)                                               \\\n+\t(0x0001450000001004ull + (((offset) & 31) + ((block_id) & 2047) * 0x4000ull) * 8)\n+#define CVMX_PEXP_NQM_VFX_CSTS(offset)\t   (0x000145000000001Cull + ((offset) & 2047) * 0x20000ull)\n+#define CVMX_PEXP_NQM_VFX_INTMC(offset)\t   (0x0001450000000010ull + ((offset) & 2047) * 0x20000ull)\n+#define CVMX_PEXP_NQM_VFX_INTMS(offset)\t   (0x000145000000000Cull + ((offset) & 2047) * 0x20000ull)\n+#define CVMX_PEXP_NQM_VFX_MSIX_PBA(offset) (0x0001450000010200ull + ((offset) & 2047) * 0x20000ull)\n+#define CVMX_PEXP_NQM_VFX_NSSR(offset)\t   (0x0001450000000020ull + ((offset) & 2047) * 0x20000ull)\n+#define CVMX_PEXP_NQM_VFX_SQX_TDBL(offset, block_id)                                               \\\n+\t(0x0001450000001000ull + (((offset) & 31) + ((block_id) & 2047) * 0x4000ull) * 8)\n+#define CVMX_PEXP_NQM_VFX_VECX_MSIX_ADDR(offset, block_id)                                         \\\n+\t(0x0001450000010000ull + (((offset) & 31) + ((block_id) & 2047) * 0x2000ull) * 16)\n+#define CVMX_PEXP_NQM_VFX_VECX_MSIX_CTL(offset, block_id)                                          \\\n+\t(0x0001450000010008ull + (((offset) & 31) + ((block_id) & 2047) * 0x2000ull) * 16)\n+#define CVMX_PEXP_NQM_VFX_VS(offset)\t\t (0x0001450000000008ull + ((offset) & 2047) * 0x20000ull)\n+#define CVMX_PEXP_SLITB_MSIXX_TABLE_ADDR(offset) (0x00011F0000004000ull + ((offset) & 127) * 16)\n+#define CVMX_PEXP_SLITB_MSIXX_TABLE_DATA(offset) (0x00011F0000004008ull + ((offset) & 127) * 16)\n+#define CVMX_PEXP_SLITB_MSIX_MACX_PFX_TABLE_ADDR(offset, block_id)                                 \\\n+\t(0x00011F0000002000ull + ((offset) & 1) * 4096 + ((block_id) & 3) * 0x10ull)\n+#define CVMX_PEXP_SLITB_MSIX_MACX_PFX_TABLE_DATA(offset, block_id)                                 \\\n+\t(0x00011F0000002008ull + ((offset) & 1) * 4096 + ((block_id) & 3) * 0x10ull)\n+#define CVMX_PEXP_SLITB_PFX_PKT_CNT_INT(offset)\t (0x00011F0000008000ull + ((offset) & 7) * 16)\n+#define CVMX_PEXP_SLITB_PFX_PKT_INT(offset)\t (0x00011F0000008300ull + ((offset) & 7) * 16)\n+#define CVMX_PEXP_SLITB_PFX_PKT_IN_INT(offset)\t (0x00011F0000008200ull + ((offset) & 7) * 16)\n+#define CVMX_PEXP_SLITB_PFX_PKT_RING_RST(offset) (0x00011F0000008400ull + ((offset) & 7) * 16)\n+#define CVMX_PEXP_SLITB_PFX_PKT_TIME_INT(offset) (0x00011F0000008100ull + ((offset) & 7) * 16)\n+#define CVMX_PEXP_SLITB_PKTX_PF_VF_MBOX_SIGX(offset, block_id)                                     \\\n+\t(0x00011F0000011000ull + (((offset) & 1) + ((block_id) & 127) * 0x4000ull) * 8)\n+#define CVMX_PEXP_SLI_BIST_STATUS CVMX_PEXP_SLI_BIST_STATUS_FUNC()\n+static inline u64 CVMX_PEXP_SLI_BIST_STATUS_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010580ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000010580ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000028580ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000028580ull;\n+\t}\n+\treturn 0x00011F0000028580ull;\n+}\n+\n+static inline u64 CVMX_PEXP_SLI_CTL_PORTX(unsigned long offset)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010050ull + (offset) * 16;\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010050ull + (offset) * 16;\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010050ull + (offset) * 16;\n+\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F00000106E0ull + (offset) * 16;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F00000286E0ull + (offset) * 16;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F00000286E0ull + (offset) * 16;\n+\t}\n+\treturn 0x00011F00000286E0ull + (offset) * 16;\n+}\n+\n+#define CVMX_PEXP_SLI_CTL_STATUS CVMX_PEXP_SLI_CTL_STATUS_FUNC()\n+static inline u64 CVMX_PEXP_SLI_CTL_STATUS_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010570ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000010570ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000028570ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000028570ull;\n+\t}\n+\treturn 0x00011F0000028570ull;\n+}\n+\n+#define CVMX_PEXP_SLI_DATA_OUT_CNT CVMX_PEXP_SLI_DATA_OUT_CNT_FUNC()\n+static inline u64 CVMX_PEXP_SLI_DATA_OUT_CNT_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F00000105F0ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F00000105F0ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F00000285F0ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F00000285F0ull;\n+\t}\n+\treturn 0x00011F00000285F0ull;\n+}\n+\n+#define CVMX_PEXP_SLI_DBG_DATA\t (0x00011F0000010310ull)\n+#define CVMX_PEXP_SLI_DBG_SELECT (0x00011F0000010300ull)\n+static inline u64 CVMX_PEXP_SLI_DMAX_CNT(unsigned long offset)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010400ull + (offset) * 16;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000010400ull + (offset) * 16;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000028400ull + (offset) * 16;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000028400ull + (offset) * 16;\n+\t}\n+\treturn 0x00011F0000028400ull + (offset) * 16;\n+}\n+\n+static inline u64 CVMX_PEXP_SLI_DMAX_INT_LEVEL(unsigned long offset)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F00000103E0ull + (offset) * 16;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F00000103E0ull + (offset) * 16;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F00000283E0ull + (offset) * 16;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F00000283E0ull + (offset) * 16;\n+\t}\n+\treturn 0x00011F00000283E0ull + (offset) * 16;\n+}\n+\n+static inline u64 CVMX_PEXP_SLI_DMAX_TIM(unsigned long offset)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010420ull + (offset) * 16;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000010420ull + (offset) * 16;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000028420ull + (offset) * 16;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000028420ull + (offset) * 16;\n+\t}\n+\treturn 0x00011F0000028420ull + (offset) * 16;\n+}\n+\n+#define CVMX_PEXP_SLI_INT_ENB_CIU\t    (0x00011F0000013CD0ull)\n+#define CVMX_PEXP_SLI_INT_ENB_PORTX(offset) (0x00011F0000010340ull + ((offset) & 3) * 16)\n+#define CVMX_PEXP_SLI_INT_SUM\t\t    (0x00011F0000010330ull)\n+#define CVMX_PEXP_SLI_LAST_WIN_RDATA0\t    (0x00011F0000010600ull)\n+#define CVMX_PEXP_SLI_LAST_WIN_RDATA1\t    (0x00011F0000010610ull)\n+#define CVMX_PEXP_SLI_LAST_WIN_RDATA2\t    (0x00011F00000106C0ull)\n+#define CVMX_PEXP_SLI_LAST_WIN_RDATA3\t    (0x00011F00000106D0ull)\n+#define CVMX_PEXP_SLI_MACX_PFX_DMA_VF_INT(offset, block_id)                                        \\\n+\t(0x00011F0000027280ull + (((offset) & 1) + ((block_id) & 3) * 0x2ull) * 16)\n+#define CVMX_PEXP_SLI_MACX_PFX_DMA_VF_INT_ENB(offset, block_id)                                    \\\n+\t(0x00011F0000027500ull + (((offset) & 1) + ((block_id) & 3) * 0x2ull) * 16)\n+#define CVMX_PEXP_SLI_MACX_PFX_FLR_VF_INT(offset, block_id)                                        \\\n+\t(0x00011F0000027400ull + (((offset) & 1) + ((block_id) & 3) * 0x2ull) * 16)\n+#define CVMX_PEXP_SLI_MACX_PFX_INT_ENB(offset, block_id)                                           \\\n+\t(0x00011F0000027080ull + (((offset) & 1) + ((block_id) & 3) * 0x2ull) * 16)\n+#define CVMX_PEXP_SLI_MACX_PFX_INT_SUM(offset, block_id)                                           \\\n+\t(0x00011F0000027000ull + (((offset) & 1) + ((block_id) & 3) * 0x2ull) * 16)\n+#define CVMX_PEXP_SLI_MACX_PFX_MBOX_INT(offset, block_id)                                          \\\n+\t(0x00011F0000027380ull + (((offset) & 1) + ((block_id) & 3) * 0x2ull) * 16)\n+#define CVMX_PEXP_SLI_MACX_PFX_PKT_VF_INT(offset, block_id)                                        \\\n+\t(0x00011F0000027300ull + (((offset) & 1) + ((block_id) & 3) * 0x2ull) * 16)\n+#define CVMX_PEXP_SLI_MACX_PFX_PKT_VF_INT_ENB(offset, block_id)                                    \\\n+\t(0x00011F0000027580ull + (((offset) & 1) + ((block_id) & 3) * 0x2ull) * 16)\n+#define CVMX_PEXP_SLI_MACX_PFX_PP_VF_INT(offset, block_id)                                         \\\n+\t(0x00011F0000027200ull + (((offset) & 1) + ((block_id) & 3) * 0x2ull) * 16)\n+#define CVMX_PEXP_SLI_MACX_PFX_PP_VF_INT_ENB(offset, block_id)                                     \\\n+\t(0x00011F0000027480ull + (((offset) & 1) + ((block_id) & 3) * 0x2ull) * 16)\n+#define CVMX_PEXP_SLI_MAC_CREDIT_CNT CVMX_PEXP_SLI_MAC_CREDIT_CNT_FUNC()\n+static inline u64 CVMX_PEXP_SLI_MAC_CREDIT_CNT_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000013D70ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000013D70ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000023D70ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000023D70ull;\n+\t}\n+\treturn 0x00011F0000023D70ull;\n+}\n+\n+#define CVMX_PEXP_SLI_MAC_CREDIT_CNT2 CVMX_PEXP_SLI_MAC_CREDIT_CNT2_FUNC()\n+static inline u64 CVMX_PEXP_SLI_MAC_CREDIT_CNT2_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000013E10ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000013E10ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000023E10ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000023E10ull;\n+\t}\n+\treturn 0x00011F0000023E10ull;\n+}\n+\n+#define CVMX_PEXP_SLI_MEM_ACCESS_CTL CVMX_PEXP_SLI_MEM_ACCESS_CTL_FUNC()\n+static inline u64 CVMX_PEXP_SLI_MEM_ACCESS_CTL_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F00000102F0ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F00000102F0ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F00000282F0ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F00000282F0ull;\n+\t}\n+\treturn 0x00011F00000282F0ull;\n+}\n+\n+static inline u64 CVMX_PEXP_SLI_MEM_ACCESS_SUBIDX(unsigned long offset)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F00000100E0ull + (offset) * 16 - 16 * 12;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F00000100E0ull + (offset) * 16 - 16 * 12;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F00000280E0ull + (offset) * 16 - 16 * 12;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F00000280E0ull + (offset) * 16 - 16 * 12;\n+\t}\n+\treturn 0x00011F00000280E0ull + (offset) * 16 - 16 * 12;\n+}\n+\n+#define CVMX_PEXP_SLI_MEM_CTL CVMX_PEXP_SLI_MEM_CTL_FUNC()\n+static inline u64 CVMX_PEXP_SLI_MEM_CTL_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F00000105E0ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F00000285E0ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F00000285E0ull;\n+\t}\n+\treturn 0x00011F00000285E0ull;\n+}\n+\n+#define CVMX_PEXP_SLI_MEM_INT_SUM CVMX_PEXP_SLI_MEM_INT_SUM_FUNC()\n+static inline u64 CVMX_PEXP_SLI_MEM_INT_SUM_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F00000105D0ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F00000285D0ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F00000285D0ull;\n+\t}\n+\treturn 0x00011F00000285D0ull;\n+}\n+\n+static inline u64 CVMX_PEXP_SLI_MSIXX_TABLE_ADDR(unsigned long offset)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000016000ull + (offset) * 16;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000000000ull + (offset) * 16;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000000000ull + (offset) * 16;\n+\t}\n+\treturn 0x00011F0000000000ull + (offset) * 16;\n+}\n+\n+static inline u64 CVMX_PEXP_SLI_MSIXX_TABLE_DATA(unsigned long offset)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000016008ull + (offset) * 16;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000000008ull + (offset) * 16;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000000008ull + (offset) * 16;\n+\t}\n+\treturn 0x00011F0000000008ull + (offset) * 16;\n+}\n+\n+#define CVMX_PEXP_SLI_MSIX_MACX_PF_TABLE_ADDR(offset) (0x00011F0000017C00ull + ((offset) & 3) * 16)\n+#define CVMX_PEXP_SLI_MSIX_MACX_PF_TABLE_DATA(offset) (0x00011F0000017C08ull + ((offset) & 3) * 16)\n+#define CVMX_PEXP_SLI_MSIX_PBA0\t\t\t      CVMX_PEXP_SLI_MSIX_PBA0_FUNC()\n+static inline u64 CVMX_PEXP_SLI_MSIX_PBA0_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000017000ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000001000ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000001000ull;\n+\t}\n+\treturn 0x00011F0000001000ull;\n+}\n+\n+#define CVMX_PEXP_SLI_MSIX_PBA1 CVMX_PEXP_SLI_MSIX_PBA1_FUNC()\n+static inline u64 CVMX_PEXP_SLI_MSIX_PBA1_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000017010ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000001008ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000001008ull;\n+\t}\n+\treturn 0x00011F0000001008ull;\n+}\n+\n+#define CVMX_PEXP_SLI_MSI_ENB0 (0x00011F0000013C50ull)\n+#define CVMX_PEXP_SLI_MSI_ENB1 (0x00011F0000013C60ull)\n+#define CVMX_PEXP_SLI_MSI_ENB2 (0x00011F0000013C70ull)\n+#define CVMX_PEXP_SLI_MSI_ENB3 (0x00011F0000013C80ull)\n+#define CVMX_PEXP_SLI_MSI_RCV0 CVMX_PEXP_SLI_MSI_RCV0_FUNC()\n+static inline u64 CVMX_PEXP_SLI_MSI_RCV0_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000013C10ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000013C10ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000023C10ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000023C10ull;\n+\t}\n+\treturn 0x00011F0000023C10ull;\n+}\n+\n+#define CVMX_PEXP_SLI_MSI_RCV1 CVMX_PEXP_SLI_MSI_RCV1_FUNC()\n+static inline u64 CVMX_PEXP_SLI_MSI_RCV1_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000013C20ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000013C20ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000023C20ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000023C20ull;\n+\t}\n+\treturn 0x00011F0000023C20ull;\n+}\n+\n+#define CVMX_PEXP_SLI_MSI_RCV2 CVMX_PEXP_SLI_MSI_RCV2_FUNC()\n+static inline u64 CVMX_PEXP_SLI_MSI_RCV2_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000013C30ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000013C30ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000023C30ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000023C30ull;\n+\t}\n+\treturn 0x00011F0000023C30ull;\n+}\n+\n+#define CVMX_PEXP_SLI_MSI_RCV3 CVMX_PEXP_SLI_MSI_RCV3_FUNC()\n+static inline u64 CVMX_PEXP_SLI_MSI_RCV3_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000013C40ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000013C40ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000023C40ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000023C40ull;\n+\t}\n+\treturn 0x00011F0000023C40ull;\n+}\n+\n+#define CVMX_PEXP_SLI_MSI_RD_MAP CVMX_PEXP_SLI_MSI_RD_MAP_FUNC()\n+static inline u64 CVMX_PEXP_SLI_MSI_RD_MAP_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000013CA0ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000013CA0ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000023CA0ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000023CA0ull;\n+\t}\n+\treturn 0x00011F0000023CA0ull;\n+}\n+\n+#define CVMX_PEXP_SLI_MSI_W1C_ENB0 (0x00011F0000013CF0ull)\n+#define CVMX_PEXP_SLI_MSI_W1C_ENB1 (0x00011F0000013D00ull)\n+#define CVMX_PEXP_SLI_MSI_W1C_ENB2 (0x00011F0000013D10ull)\n+#define CVMX_PEXP_SLI_MSI_W1C_ENB3 (0x00011F0000013D20ull)\n+#define CVMX_PEXP_SLI_MSI_W1S_ENB0 (0x00011F0000013D30ull)\n+#define CVMX_PEXP_SLI_MSI_W1S_ENB1 (0x00011F0000013D40ull)\n+#define CVMX_PEXP_SLI_MSI_W1S_ENB2 (0x00011F0000013D50ull)\n+#define CVMX_PEXP_SLI_MSI_W1S_ENB3 (0x00011F0000013D60ull)\n+#define CVMX_PEXP_SLI_MSI_WR_MAP   CVMX_PEXP_SLI_MSI_WR_MAP_FUNC()\n+static inline u64 CVMX_PEXP_SLI_MSI_WR_MAP_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000013C90ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000013C90ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000023C90ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000023C90ull;\n+\t}\n+\treturn 0x00011F0000023C90ull;\n+}\n+\n+#define CVMX_PEXP_SLI_PCIE_MSI_RCV CVMX_PEXP_SLI_PCIE_MSI_RCV_FUNC()\n+static inline u64 CVMX_PEXP_SLI_PCIE_MSI_RCV_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000013CB0ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000013CB0ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000023CB0ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000023CB0ull;\n+\t}\n+\treturn 0x00011F0000023CB0ull;\n+}\n+\n+#define CVMX_PEXP_SLI_PCIE_MSI_RCV_B1 CVMX_PEXP_SLI_PCIE_MSI_RCV_B1_FUNC()\n+static inline u64 CVMX_PEXP_SLI_PCIE_MSI_RCV_B1_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010650ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000010650ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000028650ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000028650ull;\n+\t}\n+\treturn 0x00011F0000028650ull;\n+}\n+\n+#define CVMX_PEXP_SLI_PCIE_MSI_RCV_B2 CVMX_PEXP_SLI_PCIE_MSI_RCV_B2_FUNC()\n+static inline u64 CVMX_PEXP_SLI_PCIE_MSI_RCV_B2_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010660ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000010660ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000028660ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000028660ull;\n+\t}\n+\treturn 0x00011F0000028660ull;\n+}\n+\n+#define CVMX_PEXP_SLI_PCIE_MSI_RCV_B3 CVMX_PEXP_SLI_PCIE_MSI_RCV_B3_FUNC()\n+static inline u64 CVMX_PEXP_SLI_PCIE_MSI_RCV_B3_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010670ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000010670ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000028670ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000028670ull;\n+\t}\n+\treturn 0x00011F0000028670ull;\n+}\n+\n+static inline u64 CVMX_PEXP_SLI_PKTX_CNTS(unsigned long offset)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000012400ull + (offset) * 16;\n+\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000012400ull + (offset) * 16;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F00000100B0ull + (offset) * 0x20000ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F00000100B0ull + (offset) * 0x20000ull;\n+\t}\n+\treturn 0x00011F00000100B0ull + (offset) * 0x20000ull;\n+}\n+\n+#define CVMX_PEXP_SLI_PKTX_ERROR_INFO(offset) (0x00011F00000100C0ull + ((offset) & 63) * 0x20000ull)\n+static inline u64 CVMX_PEXP_SLI_PKTX_INPUT_CONTROL(unsigned long offset)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000014000ull + (offset) * 16;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000010000ull + (offset) * 0x20000ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010000ull + (offset) * 0x20000ull;\n+\t}\n+\treturn 0x00011F0000010000ull + (offset) * 0x20000ull;\n+}\n+\n+static inline u64 CVMX_PEXP_SLI_PKTX_INSTR_BADDR(unsigned long offset)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000012800ull + (offset) * 16;\n+\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000012800ull + (offset) * 16;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000010010ull + (offset) * 0x20000ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010010ull + (offset) * 0x20000ull;\n+\t}\n+\treturn 0x00011F0000010010ull + (offset) * 0x20000ull;\n+}\n+\n+static inline u64 CVMX_PEXP_SLI_PKTX_INSTR_BAOFF_DBELL(unsigned long offset)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000012C00ull + (offset) * 16;\n+\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000012C00ull + (offset) * 16;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000010020ull + (offset) * 0x20000ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010020ull + (offset) * 0x20000ull;\n+\t}\n+\treturn 0x00011F0000010020ull + (offset) * 0x20000ull;\n+}\n+\n+static inline u64 CVMX_PEXP_SLI_PKTX_INSTR_FIFO_RSIZE(unsigned long offset)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000013000ull + (offset) * 16;\n+\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000013000ull + (offset) * 16;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000010030ull + (offset) * 0x20000ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010030ull + (offset) * 0x20000ull;\n+\t}\n+\treturn 0x00011F0000010030ull + (offset) * 0x20000ull;\n+}\n+\n+#define CVMX_PEXP_SLI_PKTX_INSTR_HEADER(offset) (0x00011F0000013400ull + ((offset) & 31) * 16)\n+static inline u64 CVMX_PEXP_SLI_PKTX_INT_LEVELS(unsigned long offset)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000014400ull + (offset) * 16;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F00000100A0ull + (offset) * 0x20000ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F00000100A0ull + (offset) * 0x20000ull;\n+\t}\n+\treturn 0x00011F00000100A0ull + (offset) * 0x20000ull;\n+}\n+\n+#define CVMX_PEXP_SLI_PKTX_IN_BP(offset)    (0x00011F0000013800ull + ((offset) & 31) * 16)\n+#define CVMX_PEXP_SLI_PKTX_MBOX_INT(offset) (0x00011F0000010210ull + ((offset) & 63) * 0x20000ull)\n+static inline u64 CVMX_PEXP_SLI_PKTX_OUTPUT_CONTROL(unsigned long offset)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000014800ull + (offset) * 16;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000010050ull + (offset) * 0x20000ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010050ull + (offset) * 0x20000ull;\n+\t}\n+\treturn 0x00011F0000010050ull + (offset) * 0x20000ull;\n+}\n+\n+static inline u64 CVMX_PEXP_SLI_PKTX_OUT_SIZE(unsigned long offset)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010C00ull + (offset) * 16;\n+\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000010C00ull + (offset) * 16;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000010060ull + (offset) * 0x20000ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010060ull + (offset) * 0x20000ull;\n+\t}\n+\treturn 0x00011F0000010060ull + (offset) * 0x20000ull;\n+}\n+\n+#define CVMX_PEXP_SLI_PKTX_PF_VF_MBOX_SIGX(offset, block_id)                                       \\\n+\t(0x00011F0000010200ull + (((offset) & 1) + ((block_id) & 63) * 0x4000ull) * 8)\n+static inline u64 CVMX_PEXP_SLI_PKTX_SLIST_BADDR(unsigned long offset)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000011400ull + (offset) * 16;\n+\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000011400ull + (offset) * 16;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000010070ull + (offset) * 0x20000ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010070ull + (offset) * 0x20000ull;\n+\t}\n+\treturn 0x00011F0000010070ull + (offset) * 0x20000ull;\n+}\n+\n+static inline u64 CVMX_PEXP_SLI_PKTX_SLIST_BAOFF_DBELL(unsigned long offset)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000011800ull + (offset) * 16;\n+\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000011800ull + (offset) * 16;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000010080ull + (offset) * 0x20000ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010080ull + (offset) * 0x20000ull;\n+\t}\n+\treturn 0x00011F0000010080ull + (offset) * 0x20000ull;\n+}\n+\n+static inline u64 CVMX_PEXP_SLI_PKTX_SLIST_FIFO_RSIZE(unsigned long offset)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000011C00ull + (offset) * 16;\n+\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000011C00ull + (offset) * 16;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000010090ull + (offset) * 0x20000ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010090ull + (offset) * 0x20000ull;\n+\t}\n+\treturn 0x00011F0000010090ull + (offset) * 0x20000ull;\n+}\n+\n+#define CVMX_PEXP_SLI_PKTX_VF_INT_SUM(offset) (0x00011F00000100D0ull + ((offset) & 63) * 0x20000ull)\n+#define CVMX_PEXP_SLI_PKTX_VF_SIG(offset)     (0x00011F0000014C00ull + ((offset) & 63) * 16)\n+#define CVMX_PEXP_SLI_PKT_BIST_STATUS\t      (0x00011F0000029220ull)\n+#define CVMX_PEXP_SLI_PKT_CNT_INT\t      CVMX_PEXP_SLI_PKT_CNT_INT_FUNC()\n+static inline u64 CVMX_PEXP_SLI_PKT_CNT_INT_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000011130ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000011130ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000029130ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000029130ull;\n+\t}\n+\treturn 0x00011F0000029130ull;\n+}\n+\n+#define CVMX_PEXP_SLI_PKT_CNT_INT_ENB\t(0x00011F0000011150ull)\n+#define CVMX_PEXP_SLI_PKT_CTL\t\t(0x00011F0000011220ull)\n+#define CVMX_PEXP_SLI_PKT_DATA_OUT_ES\t(0x00011F00000110B0ull)\n+#define CVMX_PEXP_SLI_PKT_DATA_OUT_NS\t(0x00011F00000110A0ull)\n+#define CVMX_PEXP_SLI_PKT_DATA_OUT_ROR\t(0x00011F0000011090ull)\n+#define CVMX_PEXP_SLI_PKT_DPADDR\t(0x00011F0000011080ull)\n+#define CVMX_PEXP_SLI_PKT_GBL_CONTROL\t(0x00011F0000029210ull)\n+#define CVMX_PEXP_SLI_PKT_INPUT_CONTROL (0x00011F0000011170ull)\n+#define CVMX_PEXP_SLI_PKT_INSTR_ENB\t(0x00011F0000011000ull)\n+#define CVMX_PEXP_SLI_PKT_INSTR_RD_SIZE (0x00011F00000111A0ull)\n+#define CVMX_PEXP_SLI_PKT_INSTR_SIZE\t(0x00011F0000011020ull)\n+#define CVMX_PEXP_SLI_PKT_INT\t\tCVMX_PEXP_SLI_PKT_INT_FUNC()\n+static inline u64 CVMX_PEXP_SLI_PKT_INT_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000011160ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000029160ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000029160ull;\n+\t}\n+\treturn 0x00011F0000029160ull;\n+}\n+\n+#define CVMX_PEXP_SLI_PKT_INT_LEVELS (0x00011F0000011120ull)\n+#define CVMX_PEXP_SLI_PKT_IN_BP\t     (0x00011F0000011210ull)\n+static inline u64 CVMX_PEXP_SLI_PKT_IN_DONEX_CNTS(unsigned long offset)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000012000ull + (offset) * 16;\n+\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000012000ull + (offset) * 16;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000010040ull + (offset) * 0x20000ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010040ull + (offset) * 0x20000ull;\n+\t}\n+\treturn 0x00011F0000010040ull + (offset) * 0x20000ull;\n+}\n+\n+#define CVMX_PEXP_SLI_PKT_IN_INSTR_COUNTS CVMX_PEXP_SLI_PKT_IN_INSTR_COUNTS_FUNC()\n+static inline u64 CVMX_PEXP_SLI_PKT_IN_INSTR_COUNTS_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000011200ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000011200ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000029200ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000029200ull;\n+\t}\n+\treturn 0x00011F0000029200ull;\n+}\n+\n+#define CVMX_PEXP_SLI_PKT_IN_INT CVMX_PEXP_SLI_PKT_IN_INT_FUNC()\n+static inline u64 CVMX_PEXP_SLI_PKT_IN_INT_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000011150ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000029150ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000029150ull;\n+\t}\n+\treturn 0x00011F0000029150ull;\n+}\n+\n+#define CVMX_PEXP_SLI_PKT_IN_JABBER    (0x00011F0000029170ull)\n+#define CVMX_PEXP_SLI_PKT_IN_PCIE_PORT (0x00011F00000111B0ull)\n+#define CVMX_PEXP_SLI_PKT_IPTR\t       (0x00011F0000011070ull)\n+#define CVMX_PEXP_SLI_PKT_MAC0_SIG0    (0x00011F0000011300ull)\n+#define CVMX_PEXP_SLI_PKT_MAC0_SIG1    (0x00011F0000011310ull)\n+#define CVMX_PEXP_SLI_PKT_MAC1_SIG0    (0x00011F0000011320ull)\n+#define CVMX_PEXP_SLI_PKT_MAC1_SIG1    (0x00011F0000011330ull)\n+#define CVMX_PEXP_SLI_PKT_MACX_PFX_RINFO(offset, block_id)                                         \\\n+\t(0x00011F0000029030ull + (((offset) & 1) + ((block_id) & 3) * 0x2ull) * 16)\n+#define CVMX_PEXP_SLI_PKT_MACX_RINFO(offset) (0x00011F0000011030ull + ((offset) & 3) * 16)\n+#define CVMX_PEXP_SLI_PKT_MEM_CTL\t     CVMX_PEXP_SLI_PKT_MEM_CTL_FUNC()\n+static inline u64 CVMX_PEXP_SLI_PKT_MEM_CTL_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000011120ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000029120ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000029120ull;\n+\t}\n+\treturn 0x00011F0000029120ull;\n+}\n+\n+#define CVMX_PEXP_SLI_PKT_OUTPUT_WMARK CVMX_PEXP_SLI_PKT_OUTPUT_WMARK_FUNC()\n+static inline u64 CVMX_PEXP_SLI_PKT_OUTPUT_WMARK_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000011180ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000011180ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000029180ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000029180ull;\n+\t}\n+\treturn 0x00011F0000029180ull;\n+}\n+\n+#define CVMX_PEXP_SLI_PKT_OUT_BMODE\t (0x00011F00000110D0ull)\n+#define CVMX_PEXP_SLI_PKT_OUT_BP_EN\t (0x00011F0000011240ull)\n+#define CVMX_PEXP_SLI_PKT_OUT_BP_EN2_W1C (0x00011F0000029290ull)\n+#define CVMX_PEXP_SLI_PKT_OUT_BP_EN2_W1S (0x00011F0000029270ull)\n+#define CVMX_PEXP_SLI_PKT_OUT_BP_EN_W1C\t (0x00011F0000029280ull)\n+#define CVMX_PEXP_SLI_PKT_OUT_BP_EN_W1S\t (0x00011F0000029260ull)\n+#define CVMX_PEXP_SLI_PKT_OUT_ENB\t (0x00011F0000011010ull)\n+#define CVMX_PEXP_SLI_PKT_PCIE_PORT\t (0x00011F00000110E0ull)\n+#define CVMX_PEXP_SLI_PKT_PKIND_VALID\t (0x00011F0000029190ull)\n+#define CVMX_PEXP_SLI_PKT_PORT_IN_RST\t (0x00011F00000111F0ull)\n+#define CVMX_PEXP_SLI_PKT_RING_RST\t CVMX_PEXP_SLI_PKT_RING_RST_FUNC()\n+static inline u64 CVMX_PEXP_SLI_PKT_RING_RST_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F00000111E0ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F00000291E0ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F00000291E0ull;\n+\t}\n+\treturn 0x00011F00000291E0ull;\n+}\n+\n+#define CVMX_PEXP_SLI_PKT_SLIST_ES  (0x00011F0000011050ull)\n+#define CVMX_PEXP_SLI_PKT_SLIST_NS  (0x00011F0000011040ull)\n+#define CVMX_PEXP_SLI_PKT_SLIST_ROR (0x00011F0000011030ull)\n+#define CVMX_PEXP_SLI_PKT_TIME_INT  CVMX_PEXP_SLI_PKT_TIME_INT_FUNC()\n+static inline u64 CVMX_PEXP_SLI_PKT_TIME_INT_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000011140ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000011140ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000029140ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000029140ull;\n+\t}\n+\treturn 0x00011F0000029140ull;\n+}\n+\n+#define CVMX_PEXP_SLI_PKT_TIME_INT_ENB\t  (0x00011F0000011160ull)\n+#define CVMX_PEXP_SLI_PORTX_PKIND(offset) (0x00011F0000010800ull + ((offset) & 31) * 16)\n+static inline u64 CVMX_PEXP_SLI_S2M_PORTX_CTL(unsigned long offset)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000013D80ull + (offset) * 16;\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000013D80ull + (offset) * 16;\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000013D80ull + (offset) * 16;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000013D80ull + (offset) * 16;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000023D80ull + (offset) * 16;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000023D80ull + (offset) * 16;\n+\t}\n+\treturn 0x00011F0000023D80ull + (offset) * 16;\n+}\n+\n+#define CVMX_PEXP_SLI_SCRATCH_1 CVMX_PEXP_SLI_SCRATCH_1_FUNC()\n+static inline u64 CVMX_PEXP_SLI_SCRATCH_1_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F00000103C0ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F00000103C0ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F00000283C0ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F00000283C0ull;\n+\t}\n+\treturn 0x00011F00000283C0ull;\n+}\n+\n+#define CVMX_PEXP_SLI_SCRATCH_2 CVMX_PEXP_SLI_SCRATCH_2_FUNC()\n+static inline u64 CVMX_PEXP_SLI_SCRATCH_2_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F00000103D0ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F00000103D0ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F00000283D0ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F00000283D0ull;\n+\t}\n+\treturn 0x00011F00000283D0ull;\n+}\n+\n+#define CVMX_PEXP_SLI_STATE1 CVMX_PEXP_SLI_STATE1_FUNC()\n+static inline u64 CVMX_PEXP_SLI_STATE1_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010620ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000010620ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000028620ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000028620ull;\n+\t}\n+\treturn 0x00011F0000028620ull;\n+}\n+\n+#define CVMX_PEXP_SLI_STATE2 CVMX_PEXP_SLI_STATE2_FUNC()\n+static inline u64 CVMX_PEXP_SLI_STATE2_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010630ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000010630ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000028630ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000028630ull;\n+\t}\n+\treturn 0x00011F0000028630ull;\n+}\n+\n+#define CVMX_PEXP_SLI_STATE3 CVMX_PEXP_SLI_STATE3_FUNC()\n+static inline u64 CVMX_PEXP_SLI_STATE3_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000010640ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F0000010640ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F0000028640ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F0000028640ull;\n+\t}\n+\treturn 0x00011F0000028640ull;\n+}\n+\n+#define CVMX_PEXP_SLI_TX_PIPE\t (0x00011F0000011230ull)\n+#define CVMX_PEXP_SLI_WINDOW_CTL CVMX_PEXP_SLI_WINDOW_CTL_FUNC()\n+static inline u64 CVMX_PEXP_SLI_WINDOW_CTL_FUNC(void)\n+{\n+\tswitch (cvmx_get_octeon_family()) {\n+\tcase OCTEON_CNF71XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN61XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN70XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN66XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN63XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN68XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F00000102E0ull;\n+\tcase OCTEON_CNF75XX & OCTEON_FAMILY_MASK:\n+\tcase OCTEON_CN78XX & OCTEON_FAMILY_MASK:\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))\n+\t\t\treturn 0x00011F00000102E0ull;\n+\t\tif (OCTEON_IS_MODEL(OCTEON_CN78XX))\n+\t\t\treturn 0x00011F00000282E0ull;\n+\tcase OCTEON_CN73XX & OCTEON_FAMILY_MASK:\n+\t\treturn 0x00011F00000282E0ull;\n+\t}\n+\treturn 0x00011F00000282E0ull;\n+}\n+\n+#endif\n",
    "prefixes": [
        "v1",
        "21/50"
    ]
}