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GET /api/patches/1407823/?format=api
{ "id": 1407823, "url": "http://patchwork.ozlabs.org/api/patches/1407823/?format=api", "web_url": "http://patchwork.ozlabs.org/project/netdev/patch/20201129125407.1391557-5-idosch@idosch.org/", "project": { "id": 7, "url": "http://patchwork.ozlabs.org/api/projects/7/?format=api", "name": "Linux network development", "link_name": "netdev", "list_id": "netdev.vger.kernel.org", "list_email": "netdev@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20201129125407.1391557-5-idosch@idosch.org>", "list_archive_url": null, "date": "2020-11-29T12:54:02", "name": "[net-next,4/9] mlxsw: Make EtherType configurable when pushing VLAN at ingress", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "c0aa860edc269d5639e3e9ce1a62ee430ab33a9d", "submitter": { "id": 69679, "url": "http://patchwork.ozlabs.org/api/people/69679/?format=api", "name": "Ido Schimmel", "email": "idosch@idosch.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/netdev/patch/20201129125407.1391557-5-idosch@idosch.org/mbox/", "series": [ { "id": 217375, "url": "http://patchwork.ozlabs.org/api/series/217375/?format=api", "web_url": "http://patchwork.ozlabs.org/project/netdev/list/?series=217375", "date": "2020-11-29T12:54:00", "name": "mlxsw: Add support for 802.1ad bridging", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/217375/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1407823/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1407823/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<netdev-owner@vger.kernel.org>", "X-Original-To": "patchwork-incoming-netdev@ozlabs.org", "Delivered-To": "patchwork-incoming-netdev@ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=23.128.96.18; helo=vger.kernel.org;\n envelope-from=netdev-owner@vger.kernel.org; receiver=<UNKNOWN>)", "ozlabs.org;\n dmarc=none (p=none dis=none) header.from=idosch.org", "ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=messagingengine.com header.i=@messagingengine.com\n header.a=rsa-sha256 header.s=fm1 header.b=VLIO6L8G;\n\tdkim-atps=neutral" ], "Received": [ "from vger.kernel.org (vger.kernel.org [23.128.96.18])\n\tby ozlabs.org (Postfix) with ESMTP id 4CkSzK4fQkz9s1l\n\tfor <patchwork-incoming-netdev@ozlabs.org>;\n Sun, 29 Nov 2020 23:56:13 +1100 (AEDT)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n id S2387437AbgK2Mz4 (ORCPT\n <rfc822;patchwork-incoming-netdev@ozlabs.org>);\n Sun, 29 Nov 2020 07:55:56 -0500", "from new1-smtp.messagingengine.com ([66.111.4.221]:58845 \"EHLO\n new1-smtp.messagingengine.com\" rhost-flags-OK-OK-OK-OK)\n by vger.kernel.org with ESMTP id S2387411AbgK2Mzz (ORCPT\n <rfc822;netdev@vger.kernel.org>); Sun, 29 Nov 2020 07:55:55 -0500", "from compute3.internal (compute3.nyi.internal [10.202.2.43])\n by mailnew.nyi.internal (Postfix) with ESMTP id 1379A5806C5;\n Sun, 29 Nov 2020 07:54:49 -0500 (EST)", "from mailfrontend2 ([10.202.2.163])\n by compute3.internal (MEProxy); Sun, 29 Nov 2020 07:54:49 -0500", "from shredder.lan (igld-84-229-154-147.inter.net.il\n [84.229.154.147])\n by mail.messagingengine.com (Postfix) with ESMTPA id E53143064AAE;\n Sun, 29 Nov 2020 07:54:46 -0500 (EST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=\n messagingengine.com; h=cc:content-transfer-encoding:date:from\n :in-reply-to:message-id:mime-version:references:subject:to\n :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=\n fm1; bh=DiRbdTs7WQxon9fAX7daVlgR40z9HvnDPEM/WIWV2hw=; b=VLIO6L8G\n KGul0TSBqVcqKsJMgzFAuWN8kVbPNBUAgp4rakgx3u0ysYPUm2qTGXLPRuj+LcqX\n P17iSxJqWMHLYE1o13ZrbF/2UlgLAvuM3uPtA4pH9Ai7hjQ0hR0+b8WDuhr1Ty4L\n /zXwyJnz6XqjR8pVO7SG36PlkR2miGduzovSMnXkuMOsrnP1mNuh47CZqpB0io/3\n 2LC86c2OV0VQaWoSoSFA7cELM0PbF6grHPcKTDRFIdy6+cpYfx86xByC/6+wyC9i\n XbnTr3+lXyBE+0BV3B9dYqjcsbMvfDVPpRXKGpmq47meO/ypS7unTaOKDNH7m68l\n lD66uclLuuUi4Q==", "X-ME-Sender": "<xms:GJrDX1UIkHglL8-f-7BlZNlZ1IYwDrmaI8mT1Wc70V1I157neC52fg>\n <xme:GJrDX1kGImlMEqBLkvpMzWbii-mhgGg5w24QnabfNa69yeefCMelZUOwieqxvLLlF\n os2s7jd8bpx5Kk>", "X-ME-Proxy-Cause": "\n gggruggvucftvghtrhhoucdtuddrgedujedrudehkedggeeiucetufdoteggodetrfdotf\n fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen\n uceurghilhhouhhtmecufedttdenucenucfjughrpefhvffufffkofgjfhgggfestdekre\n dtredttdenucfhrhhomhepkfguohcuufgthhhimhhmvghluceoihguohhstghhsehiugho\n shgthhdrohhrgheqnecuggftrfgrthhtvghrnhepudetieevffffveelkeeljeffkefhke\n ehgfdtffethfelvdejgffghefgveejkefhnecukfhppeekgedrvddvledrudehgedrudeg\n jeenucevlhhushhtvghrufhiiigvpeefnecurfgrrhgrmhepmhgrihhlfhhrohhmpehiug\n hoshgthhesihguohhstghhrdhorhhg", "X-ME-Proxy": "<xmx:GJrDXxYCnVShTUmUGtBpVl-Jc-9Wx76GuUQA6Cqs6Z8LNnxDZHRCMQ>\n <xmx:GJrDX4UT5VsSLyoJgf-e9fMcmuuEj53JeGKrwXnbhCj-opXjIlZ4Pw>\n <xmx:GJrDX_mR8oAKiGtXYQ8ucsSz5A0Qymi7quJMQeUQDzIZjn9XBpDQ5w>\n <xmx:GZrDX4gfqvQuHgx4lCsuTuu6hoCQklCHoTTWQFShS-vu-ls-MlgUCA>", "From": "Ido Schimmel <idosch@idosch.org>", "To": "netdev@vger.kernel.org, bridge@lists.linux-foundation.org", "Cc": "davem@davemloft.net, kuba@kernel.org, jiri@nvidia.com,\n ivecera@redhat.com, roopa@nvidia.com, nikolay@nvidia.com,\n amcohen@nvidia.com, danieller@nvidia.com, petrm@nvidia.com,\n mlxsw@nvidia.com, Ido Schimmel <idosch@nvidia.com>", "Subject": "[PATCH net-next 4/9] mlxsw: Make EtherType configurable when pushing\n VLAN at ingress", "Date": "Sun, 29 Nov 2020 14:54:02 +0200", "Message-Id": "<20201129125407.1391557-5-idosch@idosch.org>", "X-Mailer": "git-send-email 2.28.0", "In-Reply-To": "<20201129125407.1391557-1-idosch@idosch.org>", "References": "<20201129125407.1391557-1-idosch@idosch.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Precedence": "bulk", "List-ID": "<netdev.vger.kernel.org>", "X-Mailing-List": "netdev@vger.kernel.org" }, "content": "From: Amit Cohen <amcohen@nvidia.com>\n\nCurrently, when pushing a PVID at ingress, mlxsw always uses 802.1q\nEtherType.\n\nMake this EtherType configurable by extending mlxsw_sp_port_pvid_set()\nwith an EtherType argument.\n\nThis is a preparation for QinQ support, that needs to push a PVID with\n802.1ad EtherType.\n\nSigned-off-by: Amit Cohen <amcohen@nvidia.com>\nReviewed-by: Petr Machata <petrm@nvidia.com>\nSigned-off-by: Ido Schimmel <idosch@nvidia.com>\n---\n drivers/net/ethernet/mellanox/mlxsw/reg.h | 4 +-\n .../net/ethernet/mellanox/mlxsw/spectrum.c | 41 +++++++++++++++----\n .../net/ethernet/mellanox/mlxsw/spectrum.h | 3 +-\n .../mellanox/mlxsw/spectrum_switchdev.c | 13 ++++--\n 4 files changed, 48 insertions(+), 13 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h\nindex bea919b92f76..1077ed2046fe 100644\n--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h\n+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h\n@@ -851,11 +851,13 @@ MLXSW_ITEM32(reg, spvid, et_vlan, 0x04, 16, 2);\n */\n MLXSW_ITEM32(reg, spvid, pvid, 0x04, 0, 12);\n \n-static inline void mlxsw_reg_spvid_pack(char *payload, u8 local_port, u16 pvid)\n+static inline void mlxsw_reg_spvid_pack(char *payload, u8 local_port, u16 pvid,\n+\t\t\t\t\tu8 et_vlan)\n {\n \tMLXSW_REG_ZERO(spvid, payload);\n \tmlxsw_reg_spvid_local_port_set(payload, local_port);\n \tmlxsw_reg_spvid_pvid_set(payload, pvid);\n+\tmlxsw_reg_spvid_et_vlan_set(payload, et_vlan);\n }\n \n /* SPVM - Switch Port VLAN Membership\ndiff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum.c\nindex ee0c4d098c78..6ecd9a4dceee 100644\n--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum.c\n+++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum.c\n@@ -384,13 +384,37 @@ int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid,\n \treturn err;\n }\n \n+static int mlxsw_sp_ethtype_to_sver_type(u16 ethtype, u8 *p_sver_type)\n+{\n+\tswitch (ethtype) {\n+\tcase ETH_P_8021Q:\n+\t\t*p_sver_type = 0;\n+\t\tbreak;\n+\tcase ETH_P_8021AD:\n+\t\t*p_sver_type = 1;\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+\n+\treturn 0;\n+}\n+\n static int __mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port,\n-\t\t\t\t u16 vid)\n+\t\t\t\t u16 vid, u16 ethtype)\n {\n \tstruct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;\n \tchar spvid_pl[MLXSW_REG_SPVID_LEN];\n+\tu8 sver_type;\n+\tint err;\n+\n+\terr = mlxsw_sp_ethtype_to_sver_type(ethtype, &sver_type);\n+\tif (err)\n+\t\treturn err;\n+\n+\tmlxsw_reg_spvid_pack(spvid_pl, mlxsw_sp_port->local_port, vid,\n+\t\t\t sver_type);\n \n-\tmlxsw_reg_spvid_pack(spvid_pl, mlxsw_sp_port->local_port, vid);\n \treturn mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvid), spvid_pl);\n }\n \n@@ -404,7 +428,8 @@ static int mlxsw_sp_port_allow_untagged_set(struct mlxsw_sp_port *mlxsw_sp_port,\n \treturn mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spaft), spaft_pl);\n }\n \n-int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)\n+int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid,\n+\t\t\t u16 ethtype)\n {\n \tint err;\n \n@@ -413,7 +438,7 @@ int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)\n \t\tif (err)\n \t\t\treturn err;\n \t} else {\n-\t\terr = __mlxsw_sp_port_pvid_set(mlxsw_sp_port, vid);\n+\t\terr = __mlxsw_sp_port_pvid_set(mlxsw_sp_port, vid, ethtype);\n \t\tif (err)\n \t\t\treturn err;\n \t\terr = mlxsw_sp_port_allow_untagged_set(mlxsw_sp_port, true);\n@@ -425,7 +450,7 @@ int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)\n \treturn 0;\n \n err_port_allow_untagged_set:\n-\t__mlxsw_sp_port_pvid_set(mlxsw_sp_port, mlxsw_sp_port->pvid);\n+\t__mlxsw_sp_port_pvid_set(mlxsw_sp_port, mlxsw_sp_port->pvid, ethtype);\n \treturn err;\n }\n \n@@ -1588,7 +1613,8 @@ static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,\n \t\tgoto err_port_nve_init;\n \t}\n \n-\terr = mlxsw_sp_port_pvid_set(mlxsw_sp_port, MLXSW_SP_DEFAULT_VID);\n+\terr = mlxsw_sp_port_pvid_set(mlxsw_sp_port, MLXSW_SP_DEFAULT_VID,\n+\t\t\t\t ETH_P_8021Q);\n \tif (err) {\n \t\tdev_err(mlxsw_sp->bus_info->dev, \"Port %d: Failed to set PVID\\n\",\n \t\t\tmlxsw_sp_port->local_port);\n@@ -3644,7 +3670,8 @@ static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,\n \tlag->ref_count--;\n \n \t/* Make sure untagged frames are allowed to ingress */\n-\tmlxsw_sp_port_pvid_set(mlxsw_sp_port, MLXSW_SP_DEFAULT_VID);\n+\tmlxsw_sp_port_pvid_set(mlxsw_sp_port, MLXSW_SP_DEFAULT_VID,\n+\t\t\t ETH_P_8021Q);\n }\n \n static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,\ndiff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum.h b/drivers/net/ethernet/mellanox/mlxsw/spectrum.h\nindex 642099fee380..338a4c9e329c 100644\n--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum.h\n+++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum.h\n@@ -580,7 +580,8 @@ int mlxsw_sp_port_vid_stp_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid,\n int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port, bool enable);\n int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid,\n \t\t\t\t bool learn_enable);\n-int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid);\n+int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid,\n+\t\t\t u16 ethtype);\n struct mlxsw_sp_port_vlan *\n mlxsw_sp_port_vlan_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid);\n void mlxsw_sp_port_vlan_destroy(struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan);\ndiff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c\nindex 6501ce94ace5..a4aa2f620066 100644\n--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c\n+++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c\n@@ -1129,6 +1129,7 @@ mlxsw_sp_bridge_port_vlan_add(struct mlxsw_sp_port *mlxsw_sp_port,\n \tu16 pvid = mlxsw_sp_port_pvid_determine(mlxsw_sp_port, vid, is_pvid);\n \tstruct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan;\n \tu16 old_pvid = mlxsw_sp_port->pvid;\n+\tu16 proto;\n \tint err;\n \n \t/* The only valid scenario in which a port-vlan already exists, is if\n@@ -1152,7 +1153,8 @@ mlxsw_sp_bridge_port_vlan_add(struct mlxsw_sp_port *mlxsw_sp_port,\n \tif (err)\n \t\tgoto err_port_vlan_set;\n \n-\terr = mlxsw_sp_port_pvid_set(mlxsw_sp_port, pvid);\n+\tbr_vlan_get_proto(bridge_port->bridge_device->dev, &proto);\n+\terr = mlxsw_sp_port_pvid_set(mlxsw_sp_port, pvid, proto);\n \tif (err)\n \t\tgoto err_port_pvid_set;\n \n@@ -1164,7 +1166,7 @@ mlxsw_sp_bridge_port_vlan_add(struct mlxsw_sp_port *mlxsw_sp_port,\n \treturn 0;\n \n err_port_vlan_bridge_join:\n-\tmlxsw_sp_port_pvid_set(mlxsw_sp_port, old_pvid);\n+\tmlxsw_sp_port_pvid_set(mlxsw_sp_port, old_pvid, proto);\n err_port_pvid_set:\n \tmlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid, false, false);\n err_port_vlan_set:\n@@ -1821,13 +1823,15 @@ mlxsw_sp_bridge_port_vlan_del(struct mlxsw_sp_port *mlxsw_sp_port,\n {\n \tu16 pvid = mlxsw_sp_port->pvid == vid ? 0 : mlxsw_sp_port->pvid;\n \tstruct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan;\n+\tu16 proto;\n \n \tmlxsw_sp_port_vlan = mlxsw_sp_port_vlan_find_by_vid(mlxsw_sp_port, vid);\n \tif (WARN_ON(!mlxsw_sp_port_vlan))\n \t\treturn;\n \n \tmlxsw_sp_port_vlan_bridge_leave(mlxsw_sp_port_vlan);\n-\tmlxsw_sp_port_pvid_set(mlxsw_sp_port, pvid);\n+\tbr_vlan_get_proto(bridge_port->bridge_device->dev, &proto);\n+\tmlxsw_sp_port_pvid_set(mlxsw_sp_port, pvid, proto);\n \tmlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid, false, false);\n \tmlxsw_sp_port_vlan_destroy(mlxsw_sp_port_vlan);\n }\n@@ -1998,7 +2002,8 @@ mlxsw_sp_bridge_8021q_port_leave(struct mlxsw_sp_bridge_device *bridge_device,\n \t\t\t\t struct mlxsw_sp_port *mlxsw_sp_port)\n {\n \t/* Make sure untagged frames are allowed to ingress */\n-\tmlxsw_sp_port_pvid_set(mlxsw_sp_port, MLXSW_SP_DEFAULT_VID);\n+\tmlxsw_sp_port_pvid_set(mlxsw_sp_port, MLXSW_SP_DEFAULT_VID,\n+\t\t\t ETH_P_8021Q);\n }\n \n static int\n", "prefixes": [ "net-next", "4/9" ] }