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GET /api/patches/1378399/?format=api
{ "id": 1378399, "url": "http://patchwork.ozlabs.org/api/patches/1378399/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20201008051250.25784-12-faiz_abbas@ti.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20201008051250.25784-12-faiz_abbas@ti.com>", "list_archive_url": null, "date": "2020-10-08T05:12:44", "name": "[11/17] arm: dts: k3-am65: Fix mmc nodes", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "47e6f26c174b8b6b07c61f6941f34408ff3cefbe", "submitter": { "id": 72140, "url": "http://patchwork.ozlabs.org/api/people/72140/?format=api", "name": "Faiz Abbas", "email": "faiz_abbas@ti.com" }, "delegate": { "id": 19261, "url": "http://patchwork.ozlabs.org/api/users/19261/?format=api", "username": "lokeshvutla", "first_name": "Lokesh", "last_name": "Vutla", "email": "lokeshvutla@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20201008051250.25784-12-faiz_abbas@ti.com/mbox/", "series": [ { "id": 206622, "url": "http://patchwork.ozlabs.org/api/series/206622/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=206622", "date": "2020-10-08T05:12:33", "name": "Add support for MMC higher speed modes for TI's am65x, j721e and j7200 platforms", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/206622/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1378399/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1378399/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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Thu, 8 Oct 2020 16:15:21 +1100 (AEDT)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 0D30B823F8;\n\tThu, 8 Oct 2020 07:13:49 +0200 (CEST)", "by phobos.denx.de (Postfix, from userid 109)\n id 369CC823F6; Thu, 8 Oct 2020 07:13:48 +0200 (CEST)", "from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141])\n (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id EA0D9823F8\n for <u-boot@lists.denx.de>; Thu, 8 Oct 2020 07:13:42 +0200 (CEST)", "from fllv0035.itg.ti.com ([10.64.41.0])\n by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0985Dfrf003264;\n Thu, 8 Oct 2020 00:13:41 -0500", "from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33])\n by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0985DfXW049468\n (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL);\n Thu, 8 Oct 2020 00:13:41 -0500", "from DFLE109.ent.ti.com (10.64.6.30) by DFLE112.ent.ti.com\n (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 8 Oct\n 2020 00:13:41 -0500", "from lelv0327.itg.ti.com (10.180.67.183) by DFLE109.ent.ti.com\n (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via\n Frontend Transport; Thu, 8 Oct 2020 00:13:41 -0500", "from a0230074-Latitude-E7470.ent.ti.com (ileax41-snat.itg.ti.com\n [10.172.224.153])\n by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0985Cpxn022642;\n Thu, 8 Oct 2020 00:13:38 -0500" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,\n DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,SPF_HELO_NONE,URIBL_BLOCKED\n autolearn=ham autolearn_force=no version=3.4.2", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com;\n s=ti-com-17Q1; t=1602134021;\n bh=6hsusqim0R7B5lTLejUllXBZAt7cs1oZwwrTGTl9k/A=;\n h=From:To:CC:Subject:Date:In-Reply-To:References;\n b=IZaJU9jZlhsXm8GxFlczk5TpjFRD6IqNRVPAvZbvOY5JVRzW/cBkrKNhVGJozwMkH\n gR4paJFThU4yX9g6LOMZljZDosVz77L0kNkK3FWZQxH1vq9Kd0IXVkm6Nt8PdWLJEi\n dDGZyKxBkweOgYFEw/+xnmgB0Bz22ZEahy0zSDvU=", "From": "Faiz Abbas <faiz_abbas@ti.com>", "To": "<u-boot@lists.denx.de>, <peng.fan@nxp.com>, <lokeshvutla@ti.com>", "CC": "<faiz_abbas@ti.com>", "Subject": "[PATCH 11/17] arm: dts: k3-am65: Fix mmc nodes", "Date": "Thu, 8 Oct 2020 10:42:44 +0530", "Message-ID": "<20201008051250.25784-12-faiz_abbas@ti.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20201008051250.25784-1-faiz_abbas@ti.com>", "References": "<20201008051250.25784-1-faiz_abbas@ti.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-EXCLAIMER-MD-CONFIG": "e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.102.3 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "Because of fundamental interface issues in am65x pg1, only the\ninitial sdhci1 node at 25 MHz was added in the u-boot.dtsi\nfrom which both the base-board.dts and r5-base-board.dts\ninherit the node. Move the node out to k3-am65-main.dtsi\nwhere it belongs and add the board specific properties\nin base-board.dts and r5-base-board.dts\n\nThis ensures dts compatibility with the kernel dts in the\nbase-board.dts and enables the SD card interface at 50 MHz\nand High Speed mode\n\nWhile we are here, also fix the main_mmc0_pins_default\nproperty to be included and inherit from the base-board.dts\ninstead of the u-boot.dtsi\n\nSigned-off-by: Faiz Abbas <faiz_abbas@ti.com>\n---\n arch/arm/dts/k3-am65-main.dtsi | 22 +++++++\n arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 67 +++-----------------\n arch/arm/dts/k3-am654-base-board.dts | 25 ++++++++\n arch/arm/dts/k3-am654-r5-base-board.dts | 20 +++++-\n 4 files changed, 74 insertions(+), 60 deletions(-)", "diff": "diff --git a/arch/arm/dts/k3-am65-main.dtsi b/arch/arm/dts/k3-am65-main.dtsi\nindex 028f57379b..d151e27028 100644\n--- a/arch/arm/dts/k3-am65-main.dtsi\n+++ b/arch/arm/dts/k3-am65-main.dtsi\n@@ -113,6 +113,28 @@\n \t\tdma-coherent;\n \t};\n \n+\tsdhci1: sdhci@4fa0000 {\n+\t\tcompatible = \"ti,am654-sdhci-5.1\";\n+\t\treg = <0x0 0x4fa0000 0x0 0x260>, <0x0 0x4fb0000 0x0 0x134>;\n+\t\tpower-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;\n+\t\tclocks = <&k3_clks 48 0>, <&k3_clks 48 1>;\n+\t\tclock-names = \"clk_ahb\", \"clk_xin\";\n+\t\tinterrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;\n+\t\tti,otap-del-sel-legacy = <0x0>;\n+\t\tti,otap-del-sel-mmc-hs = <0x0>;\n+\t\tti,otap-del-sel-sd-hs = <0x0>;\n+\t\tti,otap-del-sel-sdr12 = <0x0>;\n+\t\tti,otap-del-sel-sdr25 = <0x0>;\n+\t\tti,otap-del-sel-sdr50 = <0x8>;\n+\t\tti,otap-del-sel-sdr104 = <0x7>;\n+\t\tti,otap-del-sel-ddr50 = <0x4>;\n+\t\tti,otap-del-sel-ddr52 = <0x4>;\n+\t\tti,otap-del-sel-hs200 = <0x7>;\n+\t\tti,clkbuf-sel = <0x7>;\n+\t\tti,trm-icp = <0x8>;\n+\t\tdma-coherent;\n+\t};\n+\n \tmain_i2c0: i2c@2000000 {\n \t\tcompatible = \"ti,am654-i2c\", \"ti,omap4-i2c\";\n \t\treg = <0x0 0x2000000 0x0 0x100>;\ndiff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi\nindex d75d1b1c28..88fab99698 100644\n--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi\n+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi\n@@ -19,28 +19,6 @@\n \n &cbass_main{\n \tu-boot,dm-spl;\n-\n-\tsdhci1: sdhci@04FA0000 {\n-\t\tcompatible = \"ti,am654-sdhci-5.1\";\n-\t\treg = <0x0 0x4FA0000 0x0 0x1000>,\n-\t\t <0x0 0x4FB0000 0x0 0x400>;\n-\t\tclocks =<&k3_clks 48 0>, <&k3_clks 48 1>;\n-\t\tclock-names = \"clk_ahb\", \"clk_xin\";\n-\t\tpower-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;\n-\t\tmax-frequency = <25000000>;\n-\t\tti,otap-del-sel-legacy = <0x0>;\n-\t\tti,otap-del-sel-mmc-hs = <0x0>;\n-\t\tti,otap-del-sel-sd-hs = <0x0>;\n-\t\tti,otap-del-sel-sdr12 = <0x0>;\n-\t\tti,otap-del-sel-sdr25 = <0x0>;\n-\t\tti,otap-del-sel-sdr50 = <0x8>;\n-\t\tti,otap-del-sel-sdr104 = <0x7>;\n-\t\tti,otap-del-sel-ddr50 = <0x4>;\n-\t\tti,otap-del-sel-ddr52 = <0x4>;\n-\t\tti,otap-del-sel-hs200 = <0x7>;\n-\t\tti,trm-icp = <0x8>;\n-\t};\n-\n };\n \n &cbass_mcu {\n@@ -107,38 +85,6 @@\n \t\tu-boot,dm-spl;\n \t};\n \n-\tmain_mmc0_pins_default: main_mmc0_pins_default {\n-\t\tpinctrl-single,pins = <\n-\t\t\tAM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0)\t/* (B25) MMC0_CLK */\n-\t\t\tAM65X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0)\t/* (B27) MMC0_CMD */\n-\t\t\tAM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0)\t/* (A26) MMC0_DAT0 */\n-\t\t\tAM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0)\t/* (E25) MMC0_DAT1 */\n-\t\t\tAM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0)\t/* (C26) MMC0_DAT2 */\n-\t\t\tAM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0)\t/* (A25) MMC0_DAT3 */\n-\t\t\tAM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0)\t/* (E24) MMC0_DAT4 */\n-\t\t\tAM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0)\t/* (A24) MMC0_DAT5 */\n-\t\t\tAM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0)\t/* (B26) MMC0_DAT6 */\n-\t\t\tAM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0)\t/* (D25) MMC0_DAT7 */\n-\t\t\tAM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0)\t/* (A23) MMC0_SDCD */\n-\t\t\tAM65X_IOPAD(0x01b0, PIN_INPUT, 0)\t\t/* (C25) MMC0_DS */\n-\t\t>;\n-\t\tu-boot,dm-spl;\n-\t};\n-\n-\tmain_mmc1_pins_default: main_mmc1_pins_default {\n-\t\tpinctrl-single,pins = <\n-\t\t\tAM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0)\t/* (C27) MMC1_CLK */\n-\t\t\tAM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0)\t/* (C28) MMC1_CMD */\n-\t\t\tAM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0)\t/* (D28) MMC1_DAT0 */\n-\t\t\tAM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0)\t/* (E27) MMC1_DAT1 */\n-\t\t\tAM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0)\t/* (D26) MMC1_DAT2 */\n-\t\t\tAM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0)\t/* (D27) MMC1_DAT3 */\n-\t\t\tAM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0)\t/* (B24) MMC1_SDCD */\n-\t\t\tAM65X_IOPAD(0x02e0, PIN_INPUT, 0)\t\t\t/* (C24) MMC1_SDWP */\n-\t\t>;\n-\t\tu-boot,dm-spl;\n-\t};\n-\n \tusb0_pins_default: usb0_pins_default {\n \t\tpinctrl-single,pins = <\n \t\t\tAM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */\n@@ -188,17 +134,20 @@\n \tstatus = \"okay\";\n };\n \n+&main_mmc0_pins_default {\n+\tu-boot,dm-spl;\n+};\n+\n+&main_mmc1_pins_default {\n+\tu-boot,dm-spl;\n+};\n+\n &sdhci0 {\n \tu-boot,dm-spl;\n };\n \n &sdhci1 {\n \tu-boot,dm-spl;\n-\tstatus = \"okay\";\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&main_mmc1_pins_default>;\n-\tsdhci-caps-mask = <0x7 0x0>;\n-\tti,driver-strength-ohm = <50>;\n };\n \n &mcu_cpsw {\ndiff --git a/arch/arm/dts/k3-am654-base-board.dts b/arch/arm/dts/k3-am654-base-board.dts\nindex 3ebf4af5e4..33a1b9fdc4 100644\n--- a/arch/arm/dts/k3-am654-base-board.dts\n+++ b/arch/arm/dts/k3-am654-base-board.dts\n@@ -59,6 +59,19 @@\n \t\t>;\n \t};\n \n+\tmain_mmc1_pins_default: main_mmc1_pins_default {\n+\t\tpinctrl-single,pins = <\n+\t\t\tAM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0)\t/* (C27) MMC1_CLK */\n+\t\t\tAM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0)\t/* (C28) MMC1_CMD */\n+\t\t\tAM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0)\t/* (D28) MMC1_DAT0 */\n+\t\t\tAM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0)\t/* (E27) MMC1_DAT1 */\n+\t\t\tAM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0)\t/* (D26) MMC1_DAT2 */\n+\t\t\tAM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0)\t/* (D27) MMC1_DAT3 */\n+\t\t\tAM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0)\t/* (B24) MMC1_SDCD */\n+\t\t\tAM65X_IOPAD(0x02e0, PIN_INPUT, 0)\t\t/* (C24) MMC1_SDWP */\n+\t\t>;\n+\t};\n+\n \tusb1_pins_default: usb1_pins_default {\n \t\tpinctrl-single,pins = <\n \t\t\tAM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */\n@@ -122,6 +135,18 @@\n \tti,driver-strength-ohm = <50>;\n };\n \n+/*\n+ * Because of erratas i2025 and i2026 for silicon revision 1.0, the\n+ * SD card interface might fail. Boards with sr1.0 are recommended to\n+ * disable sdhci1\n+ */\n+&sdhci1 {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&main_mmc1_pins_default>;\n+\tti,driver-strength-ohm = <50>;\n+\tdisable-wp;\n+};\n+\n &wkup_i2c0 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&wkup_i2c0_pins_default>;\ndiff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts\nindex d43a4edc71..a214fb8247 100644\n--- a/arch/arm/dts/k3-am654-r5-base-board.dts\n+++ b/arch/arm/dts/k3-am654-r5-base-board.dts\n@@ -6,7 +6,6 @@\n /dts-v1/;\n \n #include \"k3-am654.dtsi\"\n-#include \"k3-am654-base-board-u-boot.dtsi\"\n #include \"k3-am654-base-board-ddr4-1600MTs.dtsi\"\n #include \"k3-am654-ddr.dtsi\"\n \n@@ -213,6 +212,21 @@\n \t\t\tAM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0)\t/* (D25) MMC0_DAT7 */\n \t\t\tAM65X_IOPAD(0x01b0, PIN_INPUT, 0)\t\t/* (C25) MMC0_DS */\n \t\t>;\n+\t\tu-boot,dm-spl;\n+\t};\n+\n+\tmain_mmc1_pins_default: main_mmc1_pins_default {\n+\t\tpinctrl-single,pins = <\n+\t\t\tAM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0)\t/* (C27) MMC1_CLK */\n+\t\t\tAM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0)\t/* (C28) MMC1_CMD */\n+\t\t\tAM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0)\t/* (D28) MMC1_DAT0 */\n+\t\t\tAM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0)\t/* (E27) MMC1_DAT1 */\n+\t\t\tAM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0)\t/* (D26) MMC1_DAT2 */\n+\t\t\tAM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0)\t/* (D27) MMC1_DAT3 */\n+\t\t\tAM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0)\t/* (B24) MMC1_SDCD */\n+\t\t\tAM65X_IOPAD(0x02e0, PIN_INPUT, 0)\t\t/* (C24) MMC1_SDWP */\n+\t\t>;\n+\t\tu-boot,dm-spl;\n \t};\n };\n \n@@ -225,6 +239,7 @@\n &sdhci0 {\n \tclock-names = \"clk_xin\";\n \tclocks = <&clk_200mhz>;\n+\tpinctrl-0 = <&main_mmc0_pins_default>;\n \t/delete-property/ power-domains;\n \tti,driver-strength-ohm = <50>;\n };\n@@ -232,6 +247,7 @@\n &sdhci1 {\n \tclock-names = \"clk_xin\";\n \tclocks = <&clk_200mhz>;\n+\tpinctrl-0 = <&main_mmc1_pins_default>;\n \t/delete-property/ power-domains;\n \tti,driver-strength-ohm = <50>;\n };\n@@ -313,3 +329,5 @@\n &scm_conf {\n \tu-boot,dm-spl;\n };\n+\n+#include \"k3-am654-base-board-u-boot.dtsi\"\n", "prefixes": [ "11/17" ] }