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GET /api/patches/1378395/?format=api
{ "id": 1378395, "url": "http://patchwork.ozlabs.org/api/patches/1378395/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20201008051250.25784-8-faiz_abbas@ti.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20201008051250.25784-8-faiz_abbas@ti.com>", "list_archive_url": null, "date": "2020-10-08T05:12:40", "name": "[07/17] mmc: am654_sdhci: Add support for writing to clkbuf_sel", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "ebf26c3fe40cde42a541a1d8b1c482ea8505090a", "submitter": { "id": 72140, "url": "http://patchwork.ozlabs.org/api/people/72140/?format=api", "name": "Faiz Abbas", "email": "faiz_abbas@ti.com" }, "delegate": { "id": 19261, "url": "http://patchwork.ozlabs.org/api/users/19261/?format=api", "username": "lokeshvutla", "first_name": "Lokesh", "last_name": "Vutla", "email": "lokeshvutla@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20201008051250.25784-8-faiz_abbas@ti.com/mbox/", "series": [ { "id": 206622, "url": "http://patchwork.ozlabs.org/api/series/206622/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=206622", "date": "2020-10-08T05:12:33", "name": "Add support for MMC higher speed modes for TI's am65x, j721e and j7200 platforms", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/206622/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1378395/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1378395/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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Thu, 8 Oct\n 2020 00:13:26 -0500", "from lelv0327.itg.ti.com (10.180.67.183) by DLEE100.ent.ti.com\n (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via\n Frontend Transport; Thu, 8 Oct 2020 00:13:26 -0500", "from a0230074-Latitude-E7470.ent.ti.com (ileax41-snat.itg.ti.com\n [10.172.224.153])\n by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0985Cpxj022642;\n Thu, 8 Oct 2020 00:13:23 -0500" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,\n DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,SPF_HELO_NONE,URIBL_BLOCKED\n autolearn=ham autolearn_force=no version=3.4.2", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com;\n s=ti-com-17Q1; t=1602134007;\n bh=MFDsz5ejsxvF4GheuyU/NzWrYQwlSSNBNKkhkzDFfjg=;\n h=From:To:CC:Subject:Date:In-Reply-To:References;\n b=ERltmk1UmbeYHUwVCY0T129QO4FgETSJu/sJwXwkJ2+nsOtD/Sw9rAJj0uTSj1VGX\n N5Xlej1YWfnK315yh8kkJ5q+WUOv7hjE/MkKHqhFc/kJlP3YmU5m1TDH8c5hc6TwcU\n mW7Ntgf7wUqreqycWbtlHViUomgz8nwliM4AnIOc=", "From": "Faiz Abbas <faiz_abbas@ti.com>", "To": "<u-boot@lists.denx.de>, <peng.fan@nxp.com>, <lokeshvutla@ti.com>", "CC": "<faiz_abbas@ti.com>", "Subject": "[PATCH 07/17] mmc: am654_sdhci: Add support for writing to clkbuf_sel", "Date": "Thu, 8 Oct 2020 10:42:40 +0530", "Message-ID": "<20201008051250.25784-8-faiz_abbas@ti.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20201008051250.25784-1-faiz_abbas@ti.com>", "References": "<20201008051250.25784-1-faiz_abbas@ti.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-EXCLAIMER-MD-CONFIG": "e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.102.3 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "Add support for writing new clock buffer select property for both\nthe am654x and j721e 4 bit IPs\n\nSigned-off-by: Faiz Abbas <faiz_abbas@ti.com>\n---\n drivers/mmc/am654_sdhci.c | 11 +++++++++++\n 1 file changed, 11 insertions(+)", "diff": "diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c\nindex f472672152..fa118fc56c 100644\n--- a/drivers/mmc/am654_sdhci.c\n+++ b/drivers/mmc/am654_sdhci.c\n@@ -48,6 +48,8 @@\n #define SEL100_MASK\t\tBIT(SEL100_SHIFT)\n #define FREQSEL_SHIFT\t\t8\n #define FREQSEL_MASK\t\tGENMASK(10, 8)\n+#define CLKBUFSEL_SHIFT\t\t0\n+#define CLKBUFSEL_MASK\t\tGENMASK(2, 0)\n #define DLL_TRIM_ICP_SHIFT\t4\n #define DLL_TRIM_ICP_MASK\tGENMASK(7, 4)\n #define DR_TY_SHIFT\t\t20\n@@ -92,6 +94,7 @@ struct am654_sdhci_plat {\n \tu32 trm_icp;\n \tu32 drv_strength;\n \tu32 strb_sel;\n+\tu32 clkbuf_sel;\n \tu32 flags;\n #define DLL_PRESENT\tBIT(0)\n #define IOMUX_PRESENT\tBIT(1)\n@@ -295,6 +298,9 @@ static int am654_sdhci_set_ios_post(struct sdhci_host *host)\n \t\tam654_sdhci_setup_delay_chain(plat, mode);\n \t}\n \n+\tregmap_update_bits(plat->base, PHY_CTRL5, CLKBUFSEL_MASK,\n+\t\t\t plat->clkbuf_sel);\n+\n \treturn 0;\n }\n \n@@ -395,6 +401,9 @@ static int j721e_4bit_sdhci_set_ios_post(struct sdhci_host *host)\n \tval = (1 << OTAPDLYENA_SHIFT) | (otap_del_sel << OTAPDLYSEL_SHIFT);\n \tregmap_update_bits(plat->base, PHY_CTRL4, mask, val);\n \n+\tregmap_update_bits(plat->base, PHY_CTRL5, CLKBUFSEL_MASK,\n+\t\t\t plat->clkbuf_sel);\n+\n \treturn 0;\n }\n \n@@ -548,6 +557,8 @@ static int am654_sdhci_ofdata_to_platdata(struct udevice *dev)\n \t\t}\n \t}\n \n+\tdev_read_u32(dev, \"ti,clkbuf-sel\", &plat->clkbuf_sel);\n+\n \tret = mmc_of_parse(dev, cfg);\n \tif (ret)\n \t\treturn ret;\n", "prefixes": [ "07/17" ] }