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GET /api/patches/1378392/?format=api
{ "id": 1378392, "url": "http://patchwork.ozlabs.org/api/patches/1378392/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20201008051250.25784-5-faiz_abbas@ti.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20201008051250.25784-5-faiz_abbas@ti.com>", "list_archive_url": null, "date": "2020-10-08T05:12:37", "name": "[04/17] mmc: am654_sdhci: Add flag for PHY calibration", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "432bc3cd77309c3362a3f83056137082fa4071b5", "submitter": { "id": 72140, "url": "http://patchwork.ozlabs.org/api/people/72140/?format=api", "name": "Faiz Abbas", "email": "faiz_abbas@ti.com" }, "delegate": { "id": 19261, "url": "http://patchwork.ozlabs.org/api/users/19261/?format=api", "username": "lokeshvutla", "first_name": "Lokesh", "last_name": "Vutla", "email": "lokeshvutla@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20201008051250.25784-5-faiz_abbas@ti.com/mbox/", "series": [ { "id": 206622, "url": "http://patchwork.ozlabs.org/api/series/206622/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=206622", "date": "2020-10-08T05:12:33", "name": "Add support for MMC higher speed modes for TI's am65x, j721e and j7200 platforms", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/206622/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1378392/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1378392/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; 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Thu, 8 Oct 2020 16:13:55 +1100 (AEDT)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id AFD25823B5;\n\tThu, 8 Oct 2020 07:13:19 +0200 (CEST)", "by phobos.denx.de (Postfix, from userid 109)\n id 65CCD823B5; Thu, 8 Oct 2020 07:13:18 +0200 (CEST)", "from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142])\n (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id C70BB823AF\n for <u-boot@lists.denx.de>; Thu, 8 Oct 2020 07:13:15 +0200 (CEST)", "from fllv0034.itg.ti.com ([10.64.40.246])\n by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0985DEsP050360;\n Thu, 8 Oct 2020 00:13:14 -0500", "from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25])\n by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0985DEg9083447\n (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL);\n Thu, 8 Oct 2020 00:13:14 -0500", "from DLEE107.ent.ti.com (157.170.170.37) by DLEE114.ent.ti.com\n (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 8 Oct\n 2020 00:13:14 -0500", "from lelv0327.itg.ti.com (10.180.67.183) by DLEE107.ent.ti.com\n (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via\n Frontend Transport; Thu, 8 Oct 2020 00:13:14 -0500", "from a0230074-Latitude-E7470.ent.ti.com (ileax41-snat.itg.ti.com\n [10.172.224.153])\n by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0985Cpxg022642;\n Thu, 8 Oct 2020 00:13:10 -0500" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,\n DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,RCVD_IN_MSPIKE_H3,\n RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham\n autolearn_force=no version=3.4.2", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com;\n s=ti-com-17Q1; t=1602133994;\n bh=qcHNWjFUOmAyukJHDVVdwPmecrITkgvBzHfi9rAXMqM=;\n h=From:To:CC:Subject:Date:In-Reply-To:References;\n b=O23RTJKfCgEKImCfyCiPWtQ3qI3EMJKAC/Z0CxUDSlP3QGV/yGTCLGdJCZ0ZA+255\n ZcFX1+L3vLJU7o8pUbfDkY+T6ND/5M12TLfIznyrfN2VRBvMum69xbpbpdzeiZdraU\n eZMrc6nul7A+RQcEj8RD7egpvQUglm3ixlYLubSQ=", "From": "Faiz Abbas <faiz_abbas@ti.com>", "To": "<u-boot@lists.denx.de>, <peng.fan@nxp.com>, <lokeshvutla@ti.com>", "CC": "<faiz_abbas@ti.com>", "Subject": "[PATCH 04/17] mmc: am654_sdhci: Add flag for PHY calibration", "Date": "Thu, 8 Oct 2020 10:42:37 +0530", "Message-ID": "<20201008051250.25784-5-faiz_abbas@ti.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20201008051250.25784-1-faiz_abbas@ti.com>", "References": "<20201008051250.25784-1-faiz_abbas@ti.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-EXCLAIMER-MD-CONFIG": "e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.102.3 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "Not all controllers need calibration for the PHY DLL. Add a DLL_CALIB\nflag to indicate the same.\n\nAlso move the write of trm_icp and driver strength to the set_clock()\nfunction to match the kernel configuration flow.\n\nSigned-off-by: Faiz Abbas <faiz_abbas@ti.com>\n---\n drivers/mmc/am654_sdhci.c | 26 ++++++++++++++------------\n 1 file changed, 14 insertions(+), 12 deletions(-)", "diff": "diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c\nindex 10350d8d61..145373ad46 100644\n--- a/drivers/mmc/am654_sdhci.c\n+++ b/drivers/mmc/am654_sdhci.c\n@@ -84,6 +84,7 @@ struct am654_sdhci_plat {\n #define IOMUX_PRESENT\tBIT(1)\n #define FREQSEL_2_BIT\tBIT(2)\n #define STRBSEL_4_BIT\tBIT(3)\n+#define DLL_CALIB\tBIT(4)\n };\n \n struct timing_data {\n@@ -195,6 +196,15 @@ static int am654_sdhci_set_ios_post(struct sdhci_host *host)\n \t\t\t\t\t freqsel << FREQSEL_SHIFT);\n \t\t}\n \n+\t\t/* Configure DLL TRIM */\n+\t\tmask = DLL_TRIM_ICP_MASK;\n+\t\tval = plat->trm_icp << DLL_TRIM_ICP_SHIFT;\n+\n+\t\t/* Configure DLL driver strength */\n+\t\tmask |= DR_TY_MASK;\n+\t\tval |= plat->drv_strength << DR_TY_SHIFT;\n+\t\tregmap_update_bits(plat->base, PHY_CTRL1, mask, val);\n+\n \t\t/* Enable DLL */\n \t\tregmap_update_bits(plat->base, PHY_CTRL1, ENDLL_MASK,\n \t\t\t\t 0x1 << ENDLL_SHIFT);\n@@ -221,7 +231,7 @@ int am654_sdhci_init(struct am654_sdhci_plat *plat)\n \tmask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;\n \tregmap_update_bits(plat->base, PHY_CTRL4, mask, 0x0);\n \n-\tif (plat->flags & DLL_PRESENT) {\n+\tif (plat->flags & DLL_CALIB) {\n \t\tregmap_read(plat->base, PHY_STAT1, &val);\n \t\tif (~val & CALDONE_MASK) {\n \t\t\t/* Calibrate IO lines */\n@@ -233,15 +243,6 @@ int am654_sdhci_init(struct am654_sdhci_plat *plat)\n \t\t\tif (ret)\n \t\t\t\treturn ret;\n \t\t}\n-\n-\t\t/* Configure DLL TRIM */\n-\t\tmask = DLL_TRIM_ICP_MASK;\n-\t\tval = plat->trm_icp << DLL_TRIM_ICP_SHIFT;\n-\n-\t\t/* Configure DLL driver strength */\n-\t\tmask |= DR_TY_MASK;\n-\t\tval |= plat->drv_strength << DR_TY_SHIFT;\n-\t\tregmap_update_bits(plat->base, PHY_CTRL1, mask, val);\n \t}\n \n \t/* Enable pins by setting IO mux to 0 */\n@@ -292,12 +293,13 @@ const struct sdhci_ops am654_sdhci_ops = {\n \n const struct am654_driver_data am654_drv_data = {\n \t.ops = &am654_sdhci_ops,\n-\t.flags = IOMUX_PRESENT | FREQSEL_2_BIT | DLL_PRESENT | STRBSEL_4_BIT,\n+\t.flags = IOMUX_PRESENT | FREQSEL_2_BIT | DLL_PRESENT | DLL_CALIB |\n+\t\t STRBSEL_4_BIT,\n };\n \n const struct am654_driver_data j721e_8bit_drv_data = {\n \t.ops = &am654_sdhci_ops,\n-\t.flags = DLL_PRESENT,\n+\t.flags = DLL_PRESENT | DLL_CALIB,\n };\n \n static int j721e_4bit_sdhci_set_ios_post(struct sdhci_host *host)\n", "prefixes": [ "04/17" ] }