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GET /api/patches/1326513/?format=api
{ "id": 1326513, "url": "http://patchwork.ozlabs.org/api/patches/1326513/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20200710052340.737567-15-oohall@gmail.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20200710052340.737567-15-oohall@gmail.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20200710052340.737567-15-oohall@gmail.com/", "date": "2020-07-10T05:23:39", "name": "[14/15] powerpc/powernv/sriov: Refactor M64 BAR setup", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "577191e7a8aa5abb515f0063b0ad147190fa4c37", "submitter": { "id": 68108, "url": "http://patchwork.ozlabs.org/api/people/68108/?format=api", "name": "Oliver O'Halloran", "email": "oohall@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20200710052340.737567-15-oohall@gmail.com/mbox/", "series": [ { "id": 188782, "url": "http://patchwork.ozlabs.org/api/series/188782/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=188782", "date": "2020-07-10T05:23:26", "name": "[01/15] powernv/pci: Add pci_bus_to_pnvhb() helper", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/188782/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1326513/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1326513/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (4096 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 4B32Qg6rp3z9s1x\n\tfor <patchwork-incoming@ozlabs.org>; Fri, 10 Jul 2020 15:58:19 +1000 (AEST)", "from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 4B32Qg5NFtzDq5t\n\tfor <patchwork-incoming@ozlabs.org>; Fri, 10 Jul 2020 15:58:19 +1000 (AEST)", "from mail-wm1-x343.google.com (mail-wm1-x343.google.com\n [IPv6:2a00:1450:4864:20::343])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest\n SHA256)\n (No client certificate requested)\n by lists.ozlabs.org (Postfix) with ESMTPS id 4B31gg5YP2zDrHq\n for <linuxppc-dev@lists.ozlabs.org>; Fri, 10 Jul 2020 15:24:31 +1000 (AEST)", "by mail-wm1-x343.google.com with SMTP id 22so4555483wmg.1\n for <linuxppc-dev@lists.ozlabs.org>; Thu, 09 Jul 2020 22:24:31 -0700 (PDT)", "from 192-168-1-18.tpgi.com.au ([220.240.245.68])\n by smtp.gmail.com with ESMTPSA id 92sm9090941wrr.96.2020.07.09.22.24.26\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Thu, 09 Jul 2020 22:24:27 -0700 (PDT)" ], "Authentication-Results": [ "ozlabs.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com", "ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20161025 header.b=WhyZjUXX;\n\tdkim-atps=neutral", "lists.ozlabs.org; spf=pass (sender SPF authorized)\n smtp.mailfrom=gmail.com (client-ip=2a00:1450:4864:20::343;\n helo=mail-wm1-x343.google.com; envelope-from=oohall@gmail.com;\n receiver=<UNKNOWN>)", "lists.ozlabs.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com", "lists.ozlabs.org; dkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20161025 header.b=WhyZjUXX; dkim-atps=neutral" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n h=from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-transfer-encoding;\n bh=AkjRFynI29bb/g7nw+0ck1pCbuIqgQw3oEcHk8akdqY=;\n b=WhyZjUXX3UHMReRMimrbOcfK+VyzpIb2qhIn54HpA9YesyJbYJZLa0V7e2nxZXIbuS\n E4ZUzlgJktcNi5Ry6wf0I7FdH/C1Sl0B4loSBwh9mK8RxoLmiXJjGZoGNDYmsD9En7z8\n Ttw00HpcUM/5g93H8ZQEgepkx3CDsP/02vPCy6xNgEeYnfYuxPwYxDuFojH4YHC1rIdt\n UzwbHk1KIdJcs1MhQ+kVcM+gBHQQ8LBZ59Mv/2shh97gKJVDRa5yPtQb6qFaTzfMawn1\n VxevhkMjcyEWm6Ibq0/YxgIy0gMfB9D/wln7vpkgd4sOti8FsCzO/f1KDwfkNbWuI+Mc\n bvZg==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20161025;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n :references:mime-version:content-transfer-encoding;\n bh=AkjRFynI29bb/g7nw+0ck1pCbuIqgQw3oEcHk8akdqY=;\n b=SfsPzCgYp5LDGarmeo2NikYJ8edzGxLJNa5zK1x4WKPU50ecVpCPR91BhWaNH31/Wr\n haed6zNtU877LIny+Cjl6HkWtu+VtAggyCdCRGzna7Qw6lP4MpW7yIRFbKGAY/3bz1U0\n Rf74LMeTiB0OkGuu42HZbttD2DWYFpSI2NgURKgB9rVhVVvonhPJCxGQNu/sjSeR949l\n 7zoRSDdkUxhZRw2L+fG0iTPulLYL2aqy201z+ernO4okVSW64s0ex619BMV8BKeJwB4r\n 38YCBieJ346szOgZkYL9fV+UedYcylRoAhx/9b7hJM9gGoh4zNmd1HUGMk87Mmv4g/vN\n ZV+w==", "X-Gm-Message-State": "AOAM533fjlVT9XuA8O7tnheUCAVrVm9mng2Fvhet5lkr0JN/NK3jzmSO\n d+jcqmJysYa1eYa/SCwO8NAu9FernLs=", "X-Google-Smtp-Source": "\n ABdhPJzuHwXda2RwyukBOqn/XyP8LectxotdqchHPMu1phwA46DrEDK2O5AR90xE+LK9JXPoBsGgyg==", "X-Received": "by 2002:a1c:398b:: with SMTP id g133mr3262903wma.76.1594358668357;\n Thu, 09 Jul 2020 22:24:28 -0700 (PDT)", "From": "Oliver O'Halloran <oohall@gmail.com>", "To": "linuxppc-dev@lists.ozlabs.org", "Subject": "[PATCH 14/15] powerpc/powernv/sriov: Refactor M64 BAR setup", "Date": "Fri, 10 Jul 2020 15:23:39 +1000", "Message-Id": "<20200710052340.737567-15-oohall@gmail.com>", "X-Mailer": "git-send-email 2.26.2", "In-Reply-To": "<20200710052340.737567-1-oohall@gmail.com>", "References": "<20200710052340.737567-1-oohall@gmail.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List <linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n <mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n <mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "Oliver O'Halloran <oohall@gmail.com>", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n <linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "Split up the logic so that we have one branch that handles setting up a\nsegmented window and another that handles setting up single PE windows for\neach VF.\n\nSigned-off-by: Oliver O'Halloran <oohall@gmail.com>\n---\nThis patch could be folded into the previous one. I've kept it\nseperate mainly because the diff is *horrific* when they're merged.\n---\n arch/powerpc/platforms/powernv/pci-sriov.c | 57 ++++++++++------------\n 1 file changed, 27 insertions(+), 30 deletions(-)", "diff": "diff --git a/arch/powerpc/platforms/powernv/pci-sriov.c b/arch/powerpc/platforms/powernv/pci-sriov.c\nindex 2f967aa4fbf5..8de03636888a 100644\n--- a/arch/powerpc/platforms/powernv/pci-sriov.c\n+++ b/arch/powerpc/platforms/powernv/pci-sriov.c\n@@ -441,52 +441,49 @@ static int pnv_pci_vf_assign_m64(struct pci_dev *pdev, u16 num_vfs)\n \tstruct resource *res;\n \tint i, j;\n \tint64_t rc;\n-\tint total_vfs;\n \tresource_size_t size, start;\n-\tint m64_bars;\n+\tint base_pe_num;\n \n \tphb = pci_bus_to_pnvhb(pdev->bus);\n \tiov = pnv_iov_get(pdev);\n-\ttotal_vfs = pci_sriov_get_totalvfs(pdev);\n-\n-\tif (iov->m64_single_mode)\n-\t\tm64_bars = num_vfs;\n-\telse\n-\t\tm64_bars = 1;\n \n \tfor (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {\n \t\tres = &pdev->resource[i + PCI_IOV_RESOURCES];\n \t\tif (!res->flags || !res->parent)\n \t\t\tcontinue;\n \n-\t\tfor (j = 0; j < m64_bars; j++) {\n+\t\t/* don't need single mode? map everything in one go! */\n+\t\tif (!iov->m64_single_mode) {\n \t\t\twin = pnv_pci_alloc_m64_bar(phb, iov);\n \t\t\tif (win < 0)\n \t\t\t\tgoto m64_failed;\n \n-\t\t\tif (iov->m64_single_mode) {\n-\t\t\t\tint pe_num = iov->vf_pe_arr[j].pe_number;\n-\n-\t\t\t\tsize = pci_iov_resource_size(pdev,\n-\t\t\t\t\t\t\tPCI_IOV_RESOURCES + i);\n-\t\t\t\tstart = res->start + size * j;\n-\t\t\t\trc = pnv_ioda_map_m64_single(phb, win,\n-\t\t\t\t\t\t\t pe_num,\n-\t\t\t\t\t\t\t start,\n-\t\t\t\t\t\t\t size);\n-\t\t\t} else {\n-\t\t\t\tsize = resource_size(res);\n-\t\t\t\tstart = res->start;\n-\n-\t\t\t\trc = pnv_ioda_map_m64_accordion(phb, win, start,\n-\t\t\t\t\t\t\t\tsize);\n-\t\t\t}\n+\t\t\tsize = resource_size(res);\n+\t\t\tstart = res->start;\n \n-\t\t\tif (rc != OPAL_SUCCESS) {\n-\t\t\t\tdev_err(&pdev->dev, \"Failed to map M64 window #%d: %lld\\n\",\n-\t\t\t\t\twin, rc);\n+\t\t\trc = pnv_ioda_map_m64_accordion(phb, win, start, size);\n+\t\t\tif (rc)\n+\t\t\t\tgoto m64_failed;\n+\n+\t\t\tcontinue;\n+\t\t}\n+\n+\t\t/* otherwise map each VF with single PE BARs */\n+\t\tsize = pci_iov_resource_size(pdev, PCI_IOV_RESOURCES + i);\n+\t\tbase_pe_num = iov->vf_pe_arr[0].pe_number;\n+\n+\t\tfor (j = 0; j < num_vfs; j++) {\n+\t\t\twin = pnv_pci_alloc_m64_bar(phb, iov);\n+\t\t\tif (win < 0)\n+\t\t\t\tgoto m64_failed;\n+\n+\t\t\tstart = res->start + size * j;\n+\t\t\trc = pnv_ioda_map_m64_single(phb, win,\n+\t\t\t\t\t\t base_pe_num + j,\n+\t\t\t\t\t\t start,\n+\t\t\t\t\t\t size);\n+\t\t\tif (rc)\n \t\t\t\tgoto m64_failed;\n-\t\t\t}\n \t\t}\n \t}\n \treturn 0;\n", "prefixes": [ "14/15" ] }