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GET /api/patches/1326506/?format=api
{ "id": 1326506, "url": "http://patchwork.ozlabs.org/api/patches/1326506/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20200710052340.737567-9-oohall@gmail.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20200710052340.737567-9-oohall@gmail.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20200710052340.737567-9-oohall@gmail.com/", "date": "2020-07-10T05:23:33", "name": "[08/15] powerpc/powernv/sriov: Simplify used window tracking", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "ac6335def2de96af768bd412d95a3c640c95afe1", "submitter": { "id": 68108, "url": "http://patchwork.ozlabs.org/api/people/68108/?format=api", "name": "Oliver O'Halloran", "email": "oohall@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20200710052340.737567-9-oohall@gmail.com/mbox/", "series": [ { "id": 188782, "url": "http://patchwork.ozlabs.org/api/series/188782/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=188782", "date": "2020-07-10T05:23:26", "name": "[01/15] powernv/pci: Add pci_bus_to_pnvhb() helper", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/188782/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1326506/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1326506/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (4096 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 4B329Y0pmMz9sRN\n\tfor <patchwork-incoming@ozlabs.org>; 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spf=pass (sender SPF authorized)\n smtp.mailfrom=gmail.com (client-ip=2a00:1450:4864:20::441;\n helo=mail-wr1-x441.google.com; envelope-from=oohall@gmail.com;\n receiver=<UNKNOWN>)", "lists.ozlabs.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com", "lists.ozlabs.org; dkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20161025 header.b=HawvFcln; dkim-atps=neutral" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n h=from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-transfer-encoding;\n bh=w8axr51F1sA8A4/9jcxzbM3NKVaVVcq/k75455TJ9iA=;\n b=HawvFclngCA/eTJPdYRf3Iq6rh8RCy4s9XCFwXC6QAb3Hlk6rRMb3T24VAvwV9+3Wl\n by0Bm4wkQcIXmWQiz/xUtELwOCDoB/xIqo2HLvFPixwDXXlMcc1IxzQ8i/82hkg4fKic\n 1BePj250SnNLF+B7uF9Zb9BBf+XkxBOBBAGKZXAeuRagw096clUvf/qpIJkC4MszqOct\n iaw3Vjfd5vKKF9/b/5otgrxhOY4j0OZj2OKGGCBN1NSgATjbicALDqCJtFn7UUrbQTS3\n ckvd0VjjmN5fKGf+gWkdsWN8rXOHDBmgaGoy9XbPID6T8MLrNLagZDQLAhs5iJ9E3d/D\n 8FaA==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20161025;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n :references:mime-version:content-transfer-encoding;\n bh=w8axr51F1sA8A4/9jcxzbM3NKVaVVcq/k75455TJ9iA=;\n b=EN7n7ikVkOXPLrdCXnmILvFTY4Qzuv+9G4ErX94WNzFSa4uNObkYOh3xwrZZGl9O2o\n Dc9dN0jRMZyjYOSa+ST2vmW60hz+I7oZHtJQs0JaZ3bsevLB2iMvZvg/PJx6pSpnlNmY\n 9p5LQ1MsH0aExDrTcftHr3k80wxPPE8kIP1Vudu88ieUT34l5HARh8MQGwSgYwP6PQPY\n oql6sXluHw0lanWjtji0xW5cb2eFVpCQ8QgOjIFc1VuFdoCrqyXnyBrUeFf7ZZxLghp+\n z42Lwc8npTmqClfWzhY8CsTMohBv2qKY/ZiyfDKPribBgfO353CiA66PcsxhAM4kuDe5\n P6bQ==", "X-Gm-Message-State": "AOAM532Uto6N8gqtqLPY7eDhwQh+lpUjevdFfQJ6CAHTL2MjrUpRm5/W\n ezUhLxUqAPegUzbUsaUMp3fpif1QVHo=", "X-Google-Smtp-Source": "\n ABdhPJxBmoeu8B38XJamWxXAVJrJ1qkiFjq1k6ckvvbVMAd1ndyUIKZe27MpWjnbUvTu+jZhKdPBiQ==", "X-Received": "by 2002:a5d:6386:: with SMTP id p6mr54034018wru.417.1594358654531;\n Thu, 09 Jul 2020 22:24:14 -0700 (PDT)", "From": "Oliver O'Halloran <oohall@gmail.com>", "To": "linuxppc-dev@lists.ozlabs.org", "Subject": "[PATCH 08/15] powerpc/powernv/sriov: Simplify used window tracking", "Date": "Fri, 10 Jul 2020 15:23:33 +1000", "Message-Id": "<20200710052340.737567-9-oohall@gmail.com>", "X-Mailer": "git-send-email 2.26.2", "In-Reply-To": "<20200710052340.737567-1-oohall@gmail.com>", "References": "<20200710052340.737567-1-oohall@gmail.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List <linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n <mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n <mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "Oliver O'Halloran <oohall@gmail.com>", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n <linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "No need for the multi-dimensional arrays, just use a bitmap.\n\nSigned-off-by: Oliver O'Halloran <oohall@gmail.com>\n---\n arch/powerpc/platforms/powernv/pci-sriov.c | 48 +++++++---------------\n arch/powerpc/platforms/powernv/pci.h | 7 +++-\n 2 files changed, 20 insertions(+), 35 deletions(-)", "diff": "diff --git a/arch/powerpc/platforms/powernv/pci-sriov.c b/arch/powerpc/platforms/powernv/pci-sriov.c\nindex 216ceeff69b0..e4c65cb49757 100644\n--- a/arch/powerpc/platforms/powernv/pci-sriov.c\n+++ b/arch/powerpc/platforms/powernv/pci-sriov.c\n@@ -303,28 +303,20 @@ static int pnv_pci_vf_release_m64(struct pci_dev *pdev, u16 num_vfs)\n {\n \tstruct pnv_iov_data *iov;\n \tstruct pnv_phb *phb;\n-\tint i, j;\n-\tint m64_bars;\n+\tint window_id;\n \n \tphb = pci_bus_to_pnvhb(pdev->bus);\n \tiov = pnv_iov_get(pdev);\n \n-\tif (iov->m64_single_mode)\n-\t\tm64_bars = num_vfs;\n-\telse\n-\t\tm64_bars = 1;\n+\tfor_each_set_bit(window_id, iov->used_m64_bar_mask, 64) {\n+\t\topal_pci_phb_mmio_enable(phb->opal_id,\n+\t\t\t\t\t OPAL_M64_WINDOW_TYPE,\n+\t\t\t\t\t window_id,\n+\t\t\t\t\t 0);\n \n-\tfor (i = 0; i < PCI_SRIOV_NUM_BARS; i++)\n-\t\tfor (j = 0; j < m64_bars; j++) {\n-\t\t\tif (iov->m64_map[j][i] == IODA_INVALID_M64)\n-\t\t\t\tcontinue;\n-\t\t\topal_pci_phb_mmio_enable(phb->opal_id,\n-\t\t\t\tOPAL_M64_WINDOW_TYPE, iov->m64_map[j][i], 0);\n-\t\t\tclear_bit(iov->m64_map[j][i], &phb->ioda.m64_bar_alloc);\n-\t\t\tiov->m64_map[j][i] = IODA_INVALID_M64;\n-\t\t}\n+\t\tclear_bit(window_id, &phb->ioda.m64_bar_alloc);\n+\t}\n \n-\tkfree(iov->m64_map);\n \treturn 0;\n }\n \n@@ -350,23 +342,14 @@ static int pnv_pci_vf_assign_m64(struct pci_dev *pdev, u16 num_vfs)\n \telse\n \t\tm64_bars = 1;\n \n-\tiov->m64_map = kmalloc_array(m64_bars,\n-\t\t\t\t sizeof(*iov->m64_map),\n-\t\t\t\t GFP_KERNEL);\n-\tif (!iov->m64_map)\n-\t\treturn -ENOMEM;\n-\t/* Initialize the m64_map to IODA_INVALID_M64 */\n-\tfor (i = 0; i < m64_bars ; i++)\n-\t\tfor (j = 0; j < PCI_SRIOV_NUM_BARS; j++)\n-\t\t\tiov->m64_map[i][j] = IODA_INVALID_M64;\n-\n-\n \tfor (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {\n \t\tres = &pdev->resource[i + PCI_IOV_RESOURCES];\n \t\tif (!res->flags || !res->parent)\n \t\t\tcontinue;\n \n \t\tfor (j = 0; j < m64_bars; j++) {\n+\n+\t\t\t/* allocate a window ID for this BAR */\n \t\t\tdo {\n \t\t\t\twin = find_next_zero_bit(&phb->ioda.m64_bar_alloc,\n \t\t\t\t\t\tphb->ioda.m64_bar_idx + 1, 0);\n@@ -374,8 +357,7 @@ static int pnv_pci_vf_assign_m64(struct pci_dev *pdev, u16 num_vfs)\n \t\t\t\tif (win >= phb->ioda.m64_bar_idx + 1)\n \t\t\t\t\tgoto m64_failed;\n \t\t\t} while (test_and_set_bit(win, &phb->ioda.m64_bar_alloc));\n-\n-\t\t\tiov->m64_map[j][i] = win;\n+\t\t\tset_bit(win, iov->used_m64_bar_mask);\n \n \t\t\tif (iov->m64_single_mode) {\n \t\t\t\tsize = pci_iov_resource_size(pdev,\n@@ -391,12 +373,12 @@ static int pnv_pci_vf_assign_m64(struct pci_dev *pdev, u16 num_vfs)\n \t\t\t\tpe_num = iov->pe_num_map[j];\n \t\t\t\trc = opal_pci_map_pe_mmio_window(phb->opal_id,\n \t\t\t\t\t\tpe_num, OPAL_M64_WINDOW_TYPE,\n-\t\t\t\t\t\tiov->m64_map[j][i], 0);\n+\t\t\t\t\t\twin, 0);\n \t\t\t}\n \n \t\t\trc = opal_pci_set_phb_mem_window(phb->opal_id,\n \t\t\t\t\t\t OPAL_M64_WINDOW_TYPE,\n-\t\t\t\t\t\t iov->m64_map[j][i],\n+\t\t\t\t\t\t win,\n \t\t\t\t\t\t start,\n \t\t\t\t\t\t 0, /* unused */\n \t\t\t\t\t\t size);\n@@ -410,10 +392,10 @@ static int pnv_pci_vf_assign_m64(struct pci_dev *pdev, u16 num_vfs)\n \n \t\t\tif (iov->m64_single_mode)\n \t\t\t\trc = opal_pci_phb_mmio_enable(phb->opal_id,\n-\t\t\t\t OPAL_M64_WINDOW_TYPE, iov->m64_map[j][i], 2);\n+\t\t\t\t OPAL_M64_WINDOW_TYPE, win, 2);\n \t\t\telse\n \t\t\t\trc = opal_pci_phb_mmio_enable(phb->opal_id,\n-\t\t\t\t OPAL_M64_WINDOW_TYPE, iov->m64_map[j][i], 1);\n+\t\t\t\t OPAL_M64_WINDOW_TYPE, win, 1);\n \n \t\t\tif (rc != OPAL_SUCCESS) {\n \t\t\t\tdev_err(&pdev->dev, \"Failed to enable M64 window #%d: %llx\\n\",\ndiff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h\nindex 0156d7d17f7d..58c97e60c3db 100644\n--- a/arch/powerpc/platforms/powernv/pci.h\n+++ b/arch/powerpc/platforms/powernv/pci.h\n@@ -243,8 +243,11 @@ struct pnv_iov_data {\n \t/* Did we map the VF BARs with single-PE IODA BARs? */\n \tbool m64_single_mode;\n \n-\tint (*m64_map)[PCI_SRIOV_NUM_BARS];\n-#define IODA_INVALID_M64 (-1)\n+\t/*\n+\t * Bit mask used to track which m64 windows that we used to map the\n+\t * SR-IOV BARs for this device.\n+\t */\n+\tDECLARE_BITMAP(used_m64_bar_mask, 64);\n \n \t/*\n \t * If we map the SR-IOV BARs with a segmented window then\n", "prefixes": [ "08/15" ] }