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GET /api/patches/1326502/?format=api
{ "id": 1326502, "url": "http://patchwork.ozlabs.org/api/patches/1326502/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20200710052340.737567-5-oohall@gmail.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20200710052340.737567-5-oohall@gmail.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20200710052340.737567-5-oohall@gmail.com/", "date": "2020-07-10T05:23:29", "name": "[04/15] powerpc/powernv/pci: Initialise M64 for IODA1 as a 1-1 window", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "999878c974e7ee74207a0b18131e1dadf9ed75cd", "submitter": { "id": 68108, "url": "http://patchwork.ozlabs.org/api/people/68108/?format=api", "name": "Oliver O'Halloran", "email": "oohall@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20200710052340.737567-5-oohall@gmail.com/mbox/", "series": [ { "id": 188782, "url": "http://patchwork.ozlabs.org/api/series/188782/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=188782", "date": "2020-07-10T05:23:26", "name": "[01/15] powernv/pci: Add pci_bus_to_pnvhb() helper", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/188782/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1326502/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1326502/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (4096 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 4B320J3TFTz9s1x\n\tfor <patchwork-incoming@ozlabs.org>; Fri, 10 Jul 2020 15:38:56 +1000 (AEST)", "from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 4B320J2j44zDrM1\n\tfor <patchwork-incoming@ozlabs.org>; Fri, 10 Jul 2020 15:38:56 +1000 (AEST)", "from mail-wm1-x343.google.com (mail-wm1-x343.google.com\n [IPv6:2a00:1450:4864:20::343])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest\n SHA256)\n (No client certificate requested)\n by lists.ozlabs.org (Postfix) with ESMTPS id 4B31gC313ZzDrJp\n for <linuxppc-dev@lists.ozlabs.org>; Fri, 10 Jul 2020 15:24:07 +1000 (AEST)", "by mail-wm1-x343.google.com with SMTP id j18so4558101wmi.3\n for <linuxppc-dev@lists.ozlabs.org>; Thu, 09 Jul 2020 22:24:07 -0700 (PDT)", "from 192-168-1-18.tpgi.com.au ([220.240.245.68])\n by smtp.gmail.com with ESMTPSA id 92sm9090941wrr.96.2020.07.09.22.24.02\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Thu, 09 Jul 2020 22:24:03 -0700 (PDT)" ], "Authentication-Results": [ "ozlabs.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com", "ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20161025 header.b=Xj/TAvqh;\n\tdkim-atps=neutral", "lists.ozlabs.org; spf=pass (sender SPF authorized)\n smtp.mailfrom=gmail.com (client-ip=2a00:1450:4864:20::343;\n helo=mail-wm1-x343.google.com; envelope-from=oohall@gmail.com;\n receiver=<UNKNOWN>)", "lists.ozlabs.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com", "lists.ozlabs.org; dkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20161025 header.b=Xj/TAvqh; dkim-atps=neutral" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n h=from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-transfer-encoding;\n bh=S1H3gB/KR+iz/Hy/dmxzeNuiOgdKb2h5srkyvNUzkD8=;\n b=Xj/TAvqhLTMndwNTD6VfgJn6S8Rb7hv47O9tyzrwsIwdr0lV4WEBx0ERCgePW5Dl++\n RJ1pkCr7A3mHfAvwqtjdVRrfMmnBwPj0bYh/u1Wu4FAv/iBmqqL8n8VR9TBlppfcfeFl\n OJ/TTicafXgKEQsxJuXPv60YNu7Hl6TFVovdGA/3u67iQzVMSKVOn6iSN7mm+ZySEpow\n 0nk8FceHabKHUrMD6XW28DBzVLR/eV2vzYYhMVjc5gGwI2tGwGURx/jhoTgQR3C2NJ0Y\n fheK78A/W+6r/BFP8U6f+CLjIuGV3Jx8d07JBhqb2XtaYoUVEM0wGaoKb9uSI0MuG5aR\n 6lCg==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20161025;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n :references:mime-version:content-transfer-encoding;\n bh=S1H3gB/KR+iz/Hy/dmxzeNuiOgdKb2h5srkyvNUzkD8=;\n b=td6NV+h08Pg8B33cxSCe465FL24yRVQ4UWgYct6NnXY3pyBtJKsm+R3tY+nSLuBaAJ\n zcMCmaNMUdnSFTkCokou5TmolWZ5Ky7UfdSDnBHvfWcq4kiYyHxFA4FxpaN5iH9ozUiQ\n z+UWfqPR9cb/u/rfdO8/UbMUmeQ0yqTObhRLTShq6HD/usQO58+AuCasJT1J/s4x9Ccd\n hDcYRs82f7j5vbM21q5Ljn3pYrg1fA91jnQu7e699U1gsC/55twM91Tp6iuaEvqYC+P2\n LYkP5X3jiysWwZkNid5IyQ5l8T5AED6G5uXQ4jqr9LNbOsjJIxx9g5nF1uuLlYMOOAoR\n o/Rg==", "X-Gm-Message-State": "AOAM533YV0Rv1awjdiBsVZtgEDO8Jv1zsotxcvz7TzmgRkn01HoBfeTv\n OjUhG17BYt1Ow2tzVlT0eaA//+0IsCs=", "X-Google-Smtp-Source": "\n ABdhPJwLSZzecx3eAk1EB5YUp+JRuT2xPMSDTLISb5rIOKPyuBxpm5H63TMSR/L+4ossijdMZ0KFtg==", "X-Received": "by 2002:a1c:7416:: with SMTP id p22mr3346847wmc.32.1594358644330;\n Thu, 09 Jul 2020 22:24:04 -0700 (PDT)", "From": "Oliver O'Halloran <oohall@gmail.com>", "To": "linuxppc-dev@lists.ozlabs.org", "Subject": "[PATCH 04/15] powerpc/powernv/pci: Initialise M64 for IODA1 as a 1-1\n window", "Date": "Fri, 10 Jul 2020 15:23:29 +1000", "Message-Id": "<20200710052340.737567-5-oohall@gmail.com>", "X-Mailer": "git-send-email 2.26.2", "In-Reply-To": "<20200710052340.737567-1-oohall@gmail.com>", "References": "<20200710052340.737567-1-oohall@gmail.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List <linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n <mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n <mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "Oliver O'Halloran <oohall@gmail.com>", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n <linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "We pre-configure the m64 window for IODA1 as a 1-1 segment-PE mapping,\nsimilar to PHB3. Currently the actual mapping of segments occurs in\npnv_ioda_pick_m64_pe(), but we can move it into pnv_ioda1_init_m64() and\ndrop the IODA1 specific code paths in the PE setup / teardown.\n\nSigned-off-by: Oliver O'Halloran <oohall@gmail.com>\n---\n arch/powerpc/platforms/powernv/pci-ioda.c | 55 +++++++++++------------\n 1 file changed, 25 insertions(+), 30 deletions(-)", "diff": "diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c\nindex bb9c1cc60c33..8fb17676d914 100644\n--- a/arch/powerpc/platforms/powernv/pci-ioda.c\n+++ b/arch/powerpc/platforms/powernv/pci-ioda.c\n@@ -311,6 +311,28 @@ static int pnv_ioda1_init_m64(struct pnv_phb *phb)\n \t\t}\n \t}\n \n+\tfor (index = 0; index < phb->ioda.total_pe_num; index++) {\n+\t\tint64_t rc;\n+\n+\t\t/*\n+\t\t * P7IOC supports M64DT, which helps mapping M64 segment\n+\t\t * to one particular PE#. However, PHB3 has fixed mapping\n+\t\t * between M64 segment and PE#. In order to have same logic\n+\t\t * for P7IOC and PHB3, we enforce fixed mapping between M64\n+\t\t * segment and PE# on P7IOC.\n+\t\t */\n+\t\trc = opal_pci_map_pe_mmio_window(phb->opal_id,\n+\t\t\t\tindex, OPAL_M64_WINDOW_TYPE,\n+\t\t\t\tindex / PNV_IODA1_M64_SEGS,\n+\t\t\t\tindex % PNV_IODA1_M64_SEGS);\n+\t\tif (rc != OPAL_SUCCESS) {\n+\t\t\tpr_warn(\"%s: Error %lld mapping M64 for PHB#%x-PE#%x\\n\",\n+\t\t\t\t__func__, rc, phb->hose->global_number,\n+\t\t\t\tindex);\n+\t\t\tgoto fail;\n+\t\t}\n+\t}\n+\n \t/*\n \t * Exclude the segments for reserved and root bus PE, which\n \t * are first or last two PEs.\n@@ -402,26 +424,6 @@ static struct pnv_ioda_pe *pnv_ioda_pick_m64_pe(struct pci_bus *bus, bool all)\n \t\t\tpe->master = master_pe;\n \t\t\tlist_add_tail(&pe->list, &master_pe->slaves);\n \t\t}\n-\n-\t\t/*\n-\t\t * P7IOC supports M64DT, which helps mapping M64 segment\n-\t\t * to one particular PE#. However, PHB3 has fixed mapping\n-\t\t * between M64 segment and PE#. In order to have same logic\n-\t\t * for P7IOC and PHB3, we enforce fixed mapping between M64\n-\t\t * segment and PE# on P7IOC.\n-\t\t */\n-\t\tif (phb->type == PNV_PHB_IODA1) {\n-\t\t\tint64_t rc;\n-\n-\t\t\trc = opal_pci_map_pe_mmio_window(phb->opal_id,\n-\t\t\t\t\tpe->pe_number, OPAL_M64_WINDOW_TYPE,\n-\t\t\t\t\tpe->pe_number / PNV_IODA1_M64_SEGS,\n-\t\t\t\t\tpe->pe_number % PNV_IODA1_M64_SEGS);\n-\t\t\tif (rc != OPAL_SUCCESS)\n-\t\t\t\tpr_warn(\"%s: Error %lld mapping M64 for PHB#%x-PE#%x\\n\",\n-\t\t\t\t\t__func__, rc, phb->hose->global_number,\n-\t\t\t\t\tpe->pe_number);\n-\t\t}\n \t}\n \n \tkfree(pe_alloc);\n@@ -3354,14 +3356,8 @@ static void pnv_ioda_free_pe_seg(struct pnv_ioda_pe *pe,\n \t\tif (map[idx] != pe->pe_number)\n \t\t\tcontinue;\n \n-\t\tif (win == OPAL_M64_WINDOW_TYPE)\n-\t\t\trc = opal_pci_map_pe_mmio_window(phb->opal_id,\n-\t\t\t\t\tphb->ioda.reserved_pe_idx, win,\n-\t\t\t\t\tidx / PNV_IODA1_M64_SEGS,\n-\t\t\t\t\tidx % PNV_IODA1_M64_SEGS);\n-\t\telse\n-\t\t\trc = opal_pci_map_pe_mmio_window(phb->opal_id,\n-\t\t\t\t\tphb->ioda.reserved_pe_idx, win, 0, idx);\n+\t\trc = opal_pci_map_pe_mmio_window(phb->opal_id,\n+\t\t\t\tphb->ioda.reserved_pe_idx, win, 0, idx);\n \n \t\tif (rc != OPAL_SUCCESS)\n \t\t\tpe_warn(pe, \"Error %lld unmapping (%d) segment#%d\\n\",\n@@ -3380,8 +3376,7 @@ static void pnv_ioda_release_pe_seg(struct pnv_ioda_pe *pe)\n \t\t\t\t phb->ioda.io_segmap);\n \t\tpnv_ioda_free_pe_seg(pe, OPAL_M32_WINDOW_TYPE,\n \t\t\t\t phb->ioda.m32_segmap);\n-\t\tpnv_ioda_free_pe_seg(pe, OPAL_M64_WINDOW_TYPE,\n-\t\t\t\t phb->ioda.m64_segmap);\n+\t\t/* M64 is pre-configured by pnv_ioda1_init_m64() */\n \t} else if (phb->type == PNV_PHB_IODA2) {\n \t\tpnv_ioda_free_pe_seg(pe, OPAL_M32_WINDOW_TYPE,\n \t\t\t\t phb->ioda.m32_segmap);\n", "prefixes": [ "04/15" ] }