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GET /api/patches/1326499/?format=api
{ "id": 1326499, "url": "http://patchwork.ozlabs.org/api/patches/1326499/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20200710052340.737567-2-oohall@gmail.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20200710052340.737567-2-oohall@gmail.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20200710052340.737567-2-oohall@gmail.com/", "date": "2020-07-10T05:23:26", "name": "[01/15] powernv/pci: Add pci_bus_to_pnvhb() helper", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "9a77f7a12504f97d5296327b45d4ebfdb5096614", "submitter": { "id": 68108, "url": "http://patchwork.ozlabs.org/api/people/68108/?format=api", "name": "Oliver O'Halloran", "email": "oohall@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20200710052340.737567-2-oohall@gmail.com/mbox/", "series": [ { "id": 188782, "url": "http://patchwork.ozlabs.org/api/series/188782/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=188782", "date": "2020-07-10T05:23:26", "name": "[01/15] powernv/pci: Add pci_bus_to_pnvhb() helper", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/188782/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1326499/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1326499/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (4096 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 4B31tf2d9Gz9s1x\n\tfor <patchwork-incoming@ozlabs.org>; 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a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20161025;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n :references:mime-version:content-transfer-encoding;\n bh=txzUTnQavBi9BfxrVKZrF+NUyag93QtMXSfG7zpFf/A=;\n b=T7gN+G8fLzda01oeReNMS/8YFoiULYhC0LnCHy+HHqhlx5qAzD8IwbayQhCeUD+wKu\n WjDfH5uwxg0eWnresagjbPSTNfVpkcAIPue3Pb70X5HCFk+9C4GNMeD0zluoI5b4TwIb\n YPpgAIuNEEqpt+9wJSQOOlZnqDYChV4c/7LtPqJxv65dttn721i/uLZbbwopcGZis/H2\n uFZshFyL8bmGObEqIzRudZT+K6SFjlcdtNdOFh1nBPZWPbV5L6D8/vK1Q7MVNahraH5K\n PxCETROa/3aT6/dZ7mXZ2Uv+WmW+xDrF00W7O3f0dvURjv4o7ozu48Rseaw/MXMzNBvr\n AOHw==", "X-Gm-Message-State": "AOAM533c2NgozVRGwXbfbkE1IlD845ssWSgXNRlBuBj1usnqzvmTsxeH\n rLx8S4Cz/bOZ7U8uDjtG52C8DBqERCA=", "X-Google-Smtp-Source": "\n ABdhPJy7lbf6IEI1h0S1H1duRxGYCoSa6vMDwsKHt3TCnEhvRasfqDxQ1mJg/mDPCzARvBo08W2+nw==", "X-Received": "by 2002:adf:e7c2:: with SMTP id e2mr70932741wrn.179.1594358636548;\n Thu, 09 Jul 2020 22:23:56 -0700 (PDT)", "From": "Oliver O'Halloran <oohall@gmail.com>", "To": "linuxppc-dev@lists.ozlabs.org", "Subject": "[PATCH 01/15] powernv/pci: Add pci_bus_to_pnvhb() helper", "Date": "Fri, 10 Jul 2020 15:23:26 +1000", "Message-Id": "<20200710052340.737567-2-oohall@gmail.com>", "X-Mailer": "git-send-email 2.26.2", "In-Reply-To": "<20200710052340.737567-1-oohall@gmail.com>", "References": "<20200710052340.737567-1-oohall@gmail.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List <linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n <mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n <mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "Oliver O'Halloran <oohall@gmail.com>", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n <linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "Add a helper to go from a pci_bus structure to the pnv_phb that hosts that\nbus. There's a lot of instances of the following pattern:\n\n\tstruct pci_controller *hose = pci_bus_to_host(pdev->bus);\n\tstruct pnv_phb *phb = hose->private_data;\n\nWithout any other uses of the pci_controller inside the function. This is\nhard to read since it requires you to memorise the contents of the\nprivate data fields and kind of error prone since it involves blindly\nassigning a void pointer. Add a helper to make it more concise and\nexplicit.\n\nSigned-off-by: Oliver O'Halloran <oohall@gmail.com>\n---\n arch/powerpc/platforms/powernv/pci-ioda.c | 88 +++++++----------------\n arch/powerpc/platforms/powernv/pci.c | 14 ++--\n arch/powerpc/platforms/powernv/pci.h | 10 +++\n 3 files changed, 38 insertions(+), 74 deletions(-)", "diff": "diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c\nindex 31c3e6d58c41..687919db0347 100644\n--- a/arch/powerpc/platforms/powernv/pci-ioda.c\n+++ b/arch/powerpc/platforms/powernv/pci-ioda.c\n@@ -252,8 +252,7 @@ static int pnv_ioda2_init_m64(struct pnv_phb *phb)\n static void pnv_ioda_reserve_dev_m64_pe(struct pci_dev *pdev,\n \t\t\t\t\t unsigned long *pe_bitmap)\n {\n-\tstruct pci_controller *hose = pci_bus_to_host(pdev->bus);\n-\tstruct pnv_phb *phb = hose->private_data;\n+\tstruct pnv_phb *phb = pci_bus_to_pnvhb(pdev->bus);\n \tstruct resource *r;\n \tresource_size_t base, sgsz, start, end;\n \tint segno, i;\n@@ -351,8 +350,7 @@ static void pnv_ioda_reserve_m64_pe(struct pci_bus *bus,\n \n static struct pnv_ioda_pe *pnv_ioda_pick_m64_pe(struct pci_bus *bus, bool all)\n {\n-\tstruct pci_controller *hose = pci_bus_to_host(bus);\n-\tstruct pnv_phb *phb = hose->private_data;\n+\tstruct pnv_phb *phb = pci_bus_to_pnvhb(bus);\n \tstruct pnv_ioda_pe *master_pe, *pe;\n \tunsigned long size, *pe_alloc;\n \tint i;\n@@ -673,8 +671,7 @@ struct pnv_ioda_pe *pnv_pci_bdfn_to_pe(struct pnv_phb *phb, u16 bdfn)\n \n struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev)\n {\n-\tstruct pci_controller *hose = pci_bus_to_host(dev->bus);\n-\tstruct pnv_phb *phb = hose->private_data;\n+\tstruct pnv_phb *phb = pci_bus_to_pnvhb(dev->bus);\n \tstruct pci_dn *pdn = pci_get_pdn(dev);\n \n \tif (!pdn)\n@@ -1069,8 +1066,7 @@ static int pnv_pci_vf_resource_shift(struct pci_dev *dev, int offset)\n \n static struct pnv_ioda_pe *pnv_ioda_setup_dev_PE(struct pci_dev *dev)\n {\n-\tstruct pci_controller *hose = pci_bus_to_host(dev->bus);\n-\tstruct pnv_phb *phb = hose->private_data;\n+\tstruct pnv_phb *phb = pci_bus_to_pnvhb(dev->bus);\n \tstruct pci_dn *pdn = pci_get_pdn(dev);\n \tstruct pnv_ioda_pe *pe;\n \n@@ -1129,8 +1125,7 @@ static struct pnv_ioda_pe *pnv_ioda_setup_dev_PE(struct pci_dev *dev)\n */\n static struct pnv_ioda_pe *pnv_ioda_setup_bus_PE(struct pci_bus *bus, bool all)\n {\n-\tstruct pci_controller *hose = pci_bus_to_host(bus);\n-\tstruct pnv_phb *phb = hose->private_data;\n+\tstruct pnv_phb *phb = pci_bus_to_pnvhb(bus);\n \tstruct pnv_ioda_pe *pe = NULL;\n \tunsigned int pe_num;\n \n@@ -1196,8 +1191,7 @@ static struct pnv_ioda_pe *pnv_ioda_setup_npu_PE(struct pci_dev *npu_pdev)\n \tstruct pnv_ioda_pe *pe;\n \tstruct pci_dev *gpu_pdev;\n \tstruct pci_dn *npu_pdn;\n-\tstruct pci_controller *hose = pci_bus_to_host(npu_pdev->bus);\n-\tstruct pnv_phb *phb = hose->private_data;\n+\tstruct pnv_phb *phb = pci_bus_to_pnvhb(npu_pdev->bus);\n \n \t/*\n \t * Intentionally leak a reference on the npu device (for\n@@ -1300,16 +1294,12 @@ static void pnv_pci_ioda_setup_nvlink(void)\n #ifdef CONFIG_PCI_IOV\n static int pnv_pci_vf_release_m64(struct pci_dev *pdev, u16 num_vfs)\n {\n-\tstruct pci_bus *bus;\n-\tstruct pci_controller *hose;\n \tstruct pnv_phb *phb;\n \tstruct pci_dn *pdn;\n \tint i, j;\n \tint m64_bars;\n \n-\tbus = pdev->bus;\n-\those = pci_bus_to_host(bus);\n-\tphb = hose->private_data;\n+\tphb = pci_bus_to_pnvhb(pdev->bus);\n \tpdn = pci_get_pdn(pdev);\n \n \tif (pdn->m64_single_mode)\n@@ -1333,8 +1323,6 @@ static int pnv_pci_vf_release_m64(struct pci_dev *pdev, u16 num_vfs)\n \n static int pnv_pci_vf_assign_m64(struct pci_dev *pdev, u16 num_vfs)\n {\n-\tstruct pci_bus *bus;\n-\tstruct pci_controller *hose;\n \tstruct pnv_phb *phb;\n \tstruct pci_dn *pdn;\n \tunsigned int win;\n@@ -1346,9 +1334,7 @@ static int pnv_pci_vf_assign_m64(struct pci_dev *pdev, u16 num_vfs)\n \tint pe_num;\n \tint m64_bars;\n \n-\tbus = pdev->bus;\n-\those = pci_bus_to_host(bus);\n-\tphb = hose->private_data;\n+\tphb = pci_bus_to_pnvhb(pdev->bus);\n \tpdn = pci_get_pdn(pdev);\n \ttotal_vfs = pci_sriov_get_totalvfs(pdev);\n \n@@ -1459,15 +1445,11 @@ static void pnv_pci_ioda2_release_dma_pe(struct pci_dev *dev, struct pnv_ioda_pe\n \n static void pnv_ioda_release_vf_PE(struct pci_dev *pdev)\n {\n-\tstruct pci_bus *bus;\n-\tstruct pci_controller *hose;\n \tstruct pnv_phb *phb;\n \tstruct pnv_ioda_pe *pe, *pe_n;\n \tstruct pci_dn *pdn;\n \n-\tbus = pdev->bus;\n-\those = pci_bus_to_host(bus);\n-\tphb = hose->private_data;\n+\tphb = pci_bus_to_pnvhb(pdev->bus);\n \tpdn = pci_get_pdn(pdev);\n \n \tif (!pdev->is_physfn)\n@@ -1492,16 +1474,12 @@ static void pnv_ioda_release_vf_PE(struct pci_dev *pdev)\n \n static void pnv_pci_sriov_disable(struct pci_dev *pdev)\n {\n-\tstruct pci_bus *bus;\n-\tstruct pci_controller *hose;\n \tstruct pnv_phb *phb;\n \tstruct pnv_ioda_pe *pe;\n \tstruct pci_dn *pdn;\n \tu16 num_vfs, i;\n \n-\tbus = pdev->bus;\n-\those = pci_bus_to_host(bus);\n-\tphb = hose->private_data;\n+\tphb = pci_bus_to_pnvhb(pdev->bus);\n \tpdn = pci_get_pdn(pdev);\n \tnum_vfs = pdn->num_vfs;\n \n@@ -1535,17 +1513,13 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,\n \t\t\t\t struct pnv_ioda_pe *pe);\n static void pnv_ioda_setup_vf_PE(struct pci_dev *pdev, u16 num_vfs)\n {\n-\tstruct pci_bus *bus;\n-\tstruct pci_controller *hose;\n \tstruct pnv_phb *phb;\n \tstruct pnv_ioda_pe *pe;\n \tint pe_num;\n \tu16 vf_index;\n \tstruct pci_dn *pdn;\n \n-\tbus = pdev->bus;\n-\those = pci_bus_to_host(bus);\n-\tphb = hose->private_data;\n+\tphb = pci_bus_to_pnvhb(pdev->bus);\n \tpdn = pci_get_pdn(pdev);\n \n \tif (!pdev->is_physfn)\n@@ -1572,7 +1546,7 @@ static void pnv_ioda_setup_vf_PE(struct pci_dev *pdev, u16 num_vfs)\n \t\tpe->rid = (vf_bus << 8) | vf_devfn;\n \n \t\tpe_info(pe, \"VF %04d:%02d:%02d.%d associated with PE#%x\\n\",\n-\t\t\those->global_number, pdev->bus->number,\n+\t\t\tpci_domain_nr(pdev->bus), pdev->bus->number,\n \t\t\tPCI_SLOT(vf_devfn), PCI_FUNC(vf_devfn), pe_num);\n \n \t\tif (pnv_ioda_configure_pe(phb, pe)) {\n@@ -1602,17 +1576,13 @@ static void pnv_ioda_setup_vf_PE(struct pci_dev *pdev, u16 num_vfs)\n \n static int pnv_pci_sriov_enable(struct pci_dev *pdev, u16 num_vfs)\n {\n-\tstruct pci_bus *bus;\n-\tstruct pci_controller *hose;\n \tstruct pnv_phb *phb;\n \tstruct pnv_ioda_pe *pe;\n \tstruct pci_dn *pdn;\n \tint ret;\n \tu16 i;\n \n-\tbus = pdev->bus;\n-\those = pci_bus_to_host(bus);\n-\tphb = hose->private_data;\n+\tphb = pci_bus_to_pnvhb(pdev->bus);\n \tpdn = pci_get_pdn(pdev);\n \n \tif (phb->type == PNV_PHB_IODA2) {\n@@ -1735,8 +1705,7 @@ static int pnv_pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs)\n \n static void pnv_pci_ioda_dma_dev_setup(struct pci_dev *pdev)\n {\n-\tstruct pci_controller *hose = pci_bus_to_host(pdev->bus);\n-\tstruct pnv_phb *phb = hose->private_data;\n+\tstruct pnv_phb *phb = pci_bus_to_pnvhb(pdev->bus);\n \tstruct pci_dn *pdn = pci_get_pdn(pdev);\n \tstruct pnv_ioda_pe *pe;\n \n@@ -1847,8 +1816,7 @@ static int pnv_pci_ioda_dma_64bit_bypass(struct pnv_ioda_pe *pe)\n static bool pnv_pci_ioda_iommu_bypass_supported(struct pci_dev *pdev,\n \t\tu64 dma_mask)\n {\n-\tstruct pci_controller *hose = pci_bus_to_host(pdev->bus);\n-\tstruct pnv_phb *phb = hose->private_data;\n+\tstruct pnv_phb *phb = pci_bus_to_pnvhb(pdev->bus);\n \tstruct pci_dn *pdn = pci_get_pdn(pdev);\n \tstruct pnv_ioda_pe *pe;\n \n@@ -2766,8 +2734,7 @@ static void pnv_pci_init_ioda_msis(struct pnv_phb *phb)\n #ifdef CONFIG_PCI_IOV\n static void pnv_pci_ioda_fixup_iov_resources(struct pci_dev *pdev)\n {\n-\tstruct pci_controller *hose = pci_bus_to_host(pdev->bus);\n-\tstruct pnv_phb *phb = hose->private_data;\n+\tstruct pnv_phb *phb = pci_bus_to_pnvhb(pdev->bus);\n \tconst resource_size_t gate = phb->ioda.m64_segsize >> 2;\n \tstruct resource *res;\n \tint i;\n@@ -3101,10 +3068,9 @@ static void pnv_pci_ioda_fixup(void)\n static resource_size_t pnv_pci_window_alignment(struct pci_bus *bus,\n \t\t\t\t\t\tunsigned long type)\n {\n-\tstruct pci_dev *bridge;\n-\tstruct pci_controller *hose = pci_bus_to_host(bus);\n-\tstruct pnv_phb *phb = hose->private_data;\n+\tstruct pnv_phb *phb = pci_bus_to_pnvhb(bus);\n \tint num_pci_bridges = 0;\n+\tstruct pci_dev *bridge;\n \n \tbridge = bus->self;\n \twhile (bridge) {\n@@ -3190,8 +3156,7 @@ static void pnv_pci_fixup_bridge_resources(struct pci_bus *bus,\n \n static void pnv_pci_configure_bus(struct pci_bus *bus)\n {\n-\tstruct pci_controller *hose = pci_bus_to_host(bus);\n-\tstruct pnv_phb *phb = hose->private_data;\n+\tstruct pnv_phb *phb = pci_bus_to_pnvhb(bus);\n \tstruct pci_dev *bridge = bus->self;\n \tstruct pnv_ioda_pe *pe;\n \tbool all = (bridge && pci_pcie_type(bridge) == PCI_EXP_TYPE_PCI_BRIDGE);\n@@ -3237,8 +3202,7 @@ static resource_size_t pnv_pci_default_alignment(void)\n static resource_size_t pnv_pci_iov_resource_alignment(struct pci_dev *pdev,\n \t\t\t\t\t\t int resno)\n {\n-\tstruct pci_controller *hose = pci_bus_to_host(pdev->bus);\n-\tstruct pnv_phb *phb = hose->private_data;\n+\tstruct pnv_phb *phb = pci_bus_to_pnvhb(pdev->bus);\n \tstruct pci_dn *pdn = pci_get_pdn(pdev);\n \tresource_size_t align;\n \n@@ -3274,8 +3238,7 @@ static resource_size_t pnv_pci_iov_resource_alignment(struct pci_dev *pdev,\n */\n static bool pnv_pci_enable_device_hook(struct pci_dev *dev)\n {\n-\tstruct pci_controller *hose = pci_bus_to_host(dev->bus);\n-\tstruct pnv_phb *phb = hose->private_data;\n+\tstruct pnv_phb *phb = pci_bus_to_pnvhb(dev->bus);\n \tstruct pci_dn *pdn;\n \n \t/* The function is probably called while the PEs have\n@@ -3488,8 +3451,7 @@ static void pnv_ioda_release_pe(struct pnv_ioda_pe *pe)\n \n static void pnv_pci_release_device(struct pci_dev *pdev)\n {\n-\tstruct pci_controller *hose = pci_bus_to_host(pdev->bus);\n-\tstruct pnv_phb *phb = hose->private_data;\n+\tstruct pnv_phb *phb = pci_bus_to_pnvhb(pdev->bus);\n \tstruct pci_dn *pdn = pci_get_pdn(pdev);\n \tstruct pnv_ioda_pe *pe;\n \n@@ -3534,8 +3496,7 @@ static void pnv_pci_ioda_shutdown(struct pci_controller *hose)\n \n static void pnv_pci_ioda_dma_bus_setup(struct pci_bus *bus)\n {\n-\tstruct pci_controller *hose = bus->sysdata;\n-\tstruct pnv_phb *phb = hose->private_data;\n+\tstruct pnv_phb *phb = pci_bus_to_pnvhb(bus);\n \tstruct pnv_ioda_pe *pe;\n \n \tlist_for_each_entry(pe, &phb->ioda.pe_list, list) {\n@@ -3873,8 +3834,7 @@ void __init pnv_pci_init_npu2_opencapi_phb(struct device_node *np)\n \n static void pnv_npu2_opencapi_cfg_size_fixup(struct pci_dev *dev)\n {\n-\tstruct pci_controller *hose = pci_bus_to_host(dev->bus);\n-\tstruct pnv_phb *phb = hose->private_data;\n+\tstruct pnv_phb *phb = pci_bus_to_pnvhb(dev->bus);\n \n \tif (!machine_is(powernv))\n \t\treturn;\ndiff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c\nindex 091fe1cf386b..9b9bca169275 100644\n--- a/arch/powerpc/platforms/powernv/pci.c\n+++ b/arch/powerpc/platforms/powernv/pci.c\n@@ -162,8 +162,7 @@ EXPORT_SYMBOL_GPL(pnv_pci_set_power_state);\n \n int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)\n {\n-\tstruct pci_controller *hose = pci_bus_to_host(pdev->bus);\n-\tstruct pnv_phb *phb = hose->private_data;\n+\tstruct pnv_phb *phb = pci_bus_to_pnvhb(pdev->bus);\n \tstruct msi_desc *entry;\n \tstruct msi_msg msg;\n \tint hwirq;\n@@ -211,8 +210,7 @@ int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)\n \n void pnv_teardown_msi_irqs(struct pci_dev *pdev)\n {\n-\tstruct pci_controller *hose = pci_bus_to_host(pdev->bus);\n-\tstruct pnv_phb *phb = hose->private_data;\n+\tstruct pnv_phb *phb = pci_bus_to_pnvhb(pdev->bus);\n \tstruct msi_desc *entry;\n \tirq_hw_number_t hwirq;\n \n@@ -824,10 +822,9 @@ EXPORT_SYMBOL(pnv_pci_get_phb_node);\n \n int pnv_pci_set_tunnel_bar(struct pci_dev *dev, u64 addr, int enable)\n {\n-\t__be64 val;\n-\tstruct pci_controller *hose;\n-\tstruct pnv_phb *phb;\n+\tstruct pnv_phb *phb = pci_bus_to_pnvhb(dev->bus);\n \tu64 tunnel_bar;\n+\t__be64 val;\n \tint rc;\n \n \tif (!opal_check_token(OPAL_PCI_GET_PBCQ_TUNNEL_BAR))\n@@ -835,9 +832,6 @@ int pnv_pci_set_tunnel_bar(struct pci_dev *dev, u64 addr, int enable)\n \tif (!opal_check_token(OPAL_PCI_SET_PBCQ_TUNNEL_BAR))\n \t\treturn -ENXIO;\n \n-\those = pci_bus_to_host(dev->bus);\n-\tphb = hose->private_data;\n-\n \tmutex_lock(&tunnel_mutex);\n \trc = opal_pci_get_pbcq_tunnel_bar(phb->opal_id, &val);\n \tif (rc != OPAL_SUCCESS) {\ndiff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h\nindex 51c254f2f3cb..0727dec9a0d1 100644\n--- a/arch/powerpc/platforms/powernv/pci.h\n+++ b/arch/powerpc/platforms/powernv/pci.h\n@@ -260,4 +260,14 @@ extern void pnv_pci_setup_iommu_table(struct iommu_table *tbl,\n \n extern unsigned long pnv_ioda_parse_tce_sizes(struct pnv_phb *phb);\n \n+static inline struct pnv_phb *pci_bus_to_pnvhb(struct pci_bus *bus)\n+{\n+\tstruct pci_controller *hose = bus->sysdata;\n+\n+\tif (hose)\n+\t\treturn hose->private_data;\n+\n+\treturn NULL;\n+}\n+\n #endif /* __POWERNV_PCI_H */\n", "prefixes": [ "01/15" ] }