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GET /api/patches/1303261/?format=api
{ "id": 1303261, "url": "http://patchwork.ozlabs.org/api/patches/1303261/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20200604000105.15059-6-andre.guedes@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20200604000105.15059-6-andre.guedes@intel.com>", "list_archive_url": null, "date": "2020-06-04T00:01:04", "name": "[5/6] igc: Refactor igc_ptp_set_timestamp_mode()", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "3626db09a1816dea9b227da412cc8c1053a54134", "submitter": { "id": 72323, "url": "http://patchwork.ozlabs.org/api/people/72323/?format=api", "name": "Andre Guedes", "email": "andre.guedes@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20200604000105.15059-6-andre.guedes@intel.com/mbox/", "series": [ { "id": 181182, "url": "http://patchwork.ozlabs.org/api/series/181182/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=181182", "date": "2020-06-04T00:01:02", "name": "igc: PTP timestamping fixes", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/181182/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1303261/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1303261/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=140.211.166.136; helo=silver.osuosl.org;\n envelope-from=intel-wired-lan-bounces@osuosl.org; receiver=<UNKNOWN>)", "ozlabs.org;\n dmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 49cmD74YWLz9sRN\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 4 Jun 2020 10:01:59 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 99D64203F2;\n\tThu, 4 Jun 2020 00:01:57 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id buNpv09ytzki; Thu, 4 Jun 2020 00:01:55 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby silver.osuosl.org (Postfix) with ESMTP id C140220445;\n\tThu, 4 Jun 2020 00:01:55 +0000 (UTC)", "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n by ash.osuosl.org (Postfix) with ESMTP id 33C651BF46A\n for <intel-wired-lan@lists.osuosl.org>; Thu, 4 Jun 2020 00:01:24 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n by silver.osuosl.org (Postfix) with ESMTP id 2A9CD203F2\n for <intel-wired-lan@lists.osuosl.org>; Thu, 4 Jun 2020 00:01:24 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n with ESMTP id gxvc5Im46TOS for <intel-wired-lan@lists.osuosl.org>;\n Thu, 4 Jun 2020 00:01:22 +0000 (UTC)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by silver.osuosl.org (Postfix) with ESMTPS id 850FD2268D\n for <intel-wired-lan@lists.osuosl.org>; Thu, 4 Jun 2020 00:01:22 +0000 (UTC)", "from orsmga006.jf.intel.com ([10.7.209.51])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 03 Jun 2020 17:01:21 -0700", "from mrief-mobl1.amr.corp.intel.com ([10.209.62.192])\n by orsmga006.jf.intel.com with ESMTP; 03 Jun 2020 17:01:21 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "IronPort-SDR": [ "\n jujwUGU7y32NgHSfcoE/YIHW7MqzH73f4Cc9Ao1YtngbSiD25xdmGUmrFs8FM2LbvyLEO1bMN+\n 8PxBUBxHK83g==", "\n /JYMWfiIqxROMRJCC8KGFBG2ELon4KbIKMR1s1mF53ItzFraeIwTS6AyJA46DSahKF84B2VY+7\n kwzw+pR0ASBw==" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.73,470,1583222400\"; d=\"scan'208\";a=\"272932802\"", "From": "Andre Guedes <andre.guedes@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Wed, 3 Jun 2020 17:01:04 -0700", "Message-Id": "<20200604000105.15059-6-andre.guedes@intel.com>", "X-Mailer": "git-send-email 2.26.2", "In-Reply-To": "<20200604000105.15059-1-andre.guedes@intel.com>", "References": "<20200604000105.15059-1-andre.guedes@intel.com>", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [PATCH 5/6] igc: Refactor\n igc_ptp_set_timestamp_mode()", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n <intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "Current igc_ptp_set_timestamp_mode() logic is a bit tangled since it\nhandles many different hardware configurations in one single place,\nmaking it harder to follow. This patch untangles that code by breaking\nit into helper functions.\n\nQuick note about the hw->mac.type check which was removed in this\nrefactoring: this check it not really needed since igc_i225 is the only\ntype supported by the IGC driver.\n\nSigned-off-by: Andre Guedes <andre.guedes@intel.com>\n---\n drivers/net/ethernet/intel/igc/igc_ptp.c | 103 ++++++++++++-----------\n 1 file changed, 53 insertions(+), 50 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/igc/igc_ptp.c b/drivers/net/ethernet/intel/igc/igc_ptp.c\nindex bdf934377abb..0251e6bedac4 100644\n--- a/drivers/net/ethernet/intel/igc/igc_ptp.c\n+++ b/drivers/net/ethernet/intel/igc/igc_ptp.c\n@@ -239,6 +239,54 @@ static void igc_ptp_enable_tstamp_all_rxqueues(struct igc_adapter *adapter,\n \t}\n }\n \n+static void igc_ptp_disable_rx_timestamp(struct igc_adapter *adapter)\n+{\n+\tstruct igc_hw *hw = &adapter->hw;\n+\tu32 val;\n+\n+\twr32(IGC_TSYNCRXCTL, 0);\n+\n+\tval = rd32(IGC_RXPBS);\n+\tval &= ~IGC_RXPBS_CFG_TS_EN;\n+\twr32(IGC_RXPBS, val);\n+}\n+\n+static void igc_ptp_enable_rx_timestamp(struct igc_adapter *adapter)\n+{\n+\tstruct igc_hw *hw = &adapter->hw;\n+\tu32 val;\n+\n+\tval = rd32(IGC_RXPBS);\n+\tval |= IGC_RXPBS_CFG_TS_EN;\n+\twr32(IGC_RXPBS, val);\n+\n+\t/* FIXME: For now, only support retrieving RX timestamps from timer 0\n+\t */\n+\tigc_ptp_enable_tstamp_all_rxqueues(adapter, 0);\n+\n+\tval = IGC_TSYNCRXCTL_ENABLED | IGC_TSYNCRXCTL_TYPE_ALL |\n+\t IGC_TSYNCRXCTL_RXSYNSIG;\n+\twr32(IGC_TSYNCRXCTL, val);\n+}\n+\n+static void igc_ptp_disable_tx_timestamp(struct igc_adapter *adapter)\n+{\n+\tstruct igc_hw *hw = &adapter->hw;\n+\n+\twr32(IGC_TSYNCTXCTL, 0);\n+}\n+\n+static void igc_ptp_enable_tx_timestamp(struct igc_adapter *adapter)\n+{\n+\tstruct igc_hw *hw = &adapter->hw;\n+\n+\twr32(IGC_TSYNCTXCTL, IGC_TSYNCTXCTL_ENABLED | IGC_TSYNCTXCTL_TXSYNSIG);\n+\n+\t/* Read TXSTMP registers to discard any timestamp previously stored. */\n+\trd32(IGC_TXSTMPL);\n+\trd32(IGC_TXSTMPH);\n+}\n+\n /**\n * igc_ptp_set_timestamp_mode - setup hardware for timestamping\n * @adapter: networking device structure\n@@ -249,19 +297,16 @@ static void igc_ptp_enable_tstamp_all_rxqueues(struct igc_adapter *adapter,\n static int igc_ptp_set_timestamp_mode(struct igc_adapter *adapter,\n \t\t\t\t struct hwtstamp_config *config)\n {\n-\tu32 tsync_tx_ctl = IGC_TSYNCTXCTL_ENABLED;\n-\tu32 tsync_rx_ctl = IGC_TSYNCRXCTL_ENABLED;\n-\tstruct igc_hw *hw = &adapter->hw;\n-\tu32 regval;\n-\n \t/* reserved for future extensions */\n \tif (config->flags)\n \t\treturn -EINVAL;\n \n \tswitch (config->tx_type) {\n \tcase HWTSTAMP_TX_OFF:\n-\t\ttsync_tx_ctl = 0;\n+\t\tigc_ptp_disable_tx_timestamp(adapter);\n+\t\tbreak;\n \tcase HWTSTAMP_TX_ON:\n+\t\tigc_ptp_enable_tx_timestamp(adapter);\n \t\tbreak;\n \tdefault:\n \t\treturn -ERANGE;\n@@ -269,7 +314,7 @@ static int igc_ptp_set_timestamp_mode(struct igc_adapter *adapter,\n \n \tswitch (config->rx_filter) {\n \tcase HWTSTAMP_FILTER_NONE:\n-\t\ttsync_rx_ctl = 0;\n+\t\tigc_ptp_disable_rx_timestamp(adapter);\n \t\tbreak;\n \tcase HWTSTAMP_FILTER_PTP_V1_L4_SYNC:\n \tcase HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:\n@@ -285,55 +330,13 @@ static int igc_ptp_set_timestamp_mode(struct igc_adapter *adapter,\n \tcase HWTSTAMP_FILTER_PTP_V1_L4_EVENT:\n \tcase HWTSTAMP_FILTER_NTP_ALL:\n \tcase HWTSTAMP_FILTER_ALL:\n-\t\ttsync_rx_ctl |= IGC_TSYNCRXCTL_TYPE_ALL;\n+\t\tigc_ptp_enable_rx_timestamp(adapter);\n \t\tconfig->rx_filter = HWTSTAMP_FILTER_ALL;\n \t\tbreak;\n \tdefault:\n-\t\tconfig->rx_filter = HWTSTAMP_FILTER_NONE;\n \t\treturn -ERANGE;\n \t}\n \n-\tif (tsync_rx_ctl) {\n-\t\ttsync_rx_ctl = IGC_TSYNCRXCTL_ENABLED;\n-\t\ttsync_rx_ctl |= IGC_TSYNCRXCTL_TYPE_ALL;\n-\t\ttsync_rx_ctl |= IGC_TSYNCRXCTL_RXSYNSIG;\n-\t\tconfig->rx_filter = HWTSTAMP_FILTER_ALL;\n-\n-\t\tif (hw->mac.type == igc_i225) {\n-\t\t\tregval = rd32(IGC_RXPBS);\n-\t\t\tregval |= IGC_RXPBS_CFG_TS_EN;\n-\t\t\twr32(IGC_RXPBS, regval);\n-\n-\t\t\t/* FIXME: For now, only support retrieving RX\n-\t\t\t * timestamps from timer 0\n-\t\t\t */\n-\t\t\tigc_ptp_enable_tstamp_all_rxqueues(adapter, 0);\n-\t\t}\n-\t}\n-\n-\tif (tsync_tx_ctl) {\n-\t\ttsync_tx_ctl = IGC_TSYNCTXCTL_ENABLED;\n-\t\ttsync_tx_ctl |= IGC_TSYNCTXCTL_TXSYNSIG;\n-\t}\n-\n-\t/* enable/disable TX */\n-\tregval = rd32(IGC_TSYNCTXCTL);\n-\tregval &= ~IGC_TSYNCTXCTL_ENABLED;\n-\tregval |= tsync_tx_ctl;\n-\twr32(IGC_TSYNCTXCTL, regval);\n-\n-\t/* enable/disable RX */\n-\tregval = rd32(IGC_TSYNCRXCTL);\n-\tregval &= ~(IGC_TSYNCRXCTL_ENABLED | IGC_TSYNCRXCTL_TYPE_MASK);\n-\tregval |= tsync_rx_ctl;\n-\twr32(IGC_TSYNCRXCTL, regval);\n-\n-\twrfl();\n-\n-\t/* clear TX time stamp registers, just to be sure */\n-\tregval = rd32(IGC_TXSTMPL);\n-\tregval = rd32(IGC_TXSTMPH);\n-\n \treturn 0;\n }\n \n", "prefixes": [ "5/6" ] }