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GET /api/patches/1303259/?format=api
{ "id": 1303259, "url": "http://patchwork.ozlabs.org/api/patches/1303259/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20200604000105.15059-7-andre.guedes@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20200604000105.15059-7-andre.guedes@intel.com>", "list_archive_url": null, "date": "2020-06-04T00:01:05", "name": "[6/6] igc: Fix rx timestamp disabling", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "09fab763360ec937b3ef1dab3abdd4c683cdb6a7", "submitter": { "id": 72323, "url": "http://patchwork.ozlabs.org/api/people/72323/?format=api", "name": "Andre Guedes", "email": "andre.guedes@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20200604000105.15059-7-andre.guedes@intel.com/mbox/", "series": [ { "id": 181182, "url": "http://patchwork.ozlabs.org/api/series/181182/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=181182", "date": "2020-06-04T00:01:02", "name": "igc: PTP timestamping fixes", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/181182/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1303259/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1303259/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=140.211.166.133; helo=hemlock.osuosl.org;\n envelope-from=intel-wired-lan-bounces@osuosl.org; receiver=<UNKNOWN>)", "ozlabs.org;\n dmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 49cmD608Nwz9sRN\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 4 Jun 2020 10:01:58 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 4890488650;\n\tThu, 4 Jun 2020 00:01:56 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id uFiItrKQu6AU; Thu, 4 Jun 2020 00:01:54 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id D376D8861A;\n\tThu, 4 Jun 2020 00:01:54 +0000 (UTC)", "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n by ash.osuosl.org (Postfix) with ESMTP id 956521BF46A\n for <intel-wired-lan@lists.osuosl.org>; Thu, 4 Jun 2020 00:01:23 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n by whitealder.osuosl.org (Postfix) with ESMTP id 8F59D88007\n for <intel-wired-lan@lists.osuosl.org>; Thu, 4 Jun 2020 00:01:23 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n with ESMTP id QzX0U5P520Md for <intel-wired-lan@lists.osuosl.org>;\n Thu, 4 Jun 2020 00:01:22 +0000 (UTC)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by whitealder.osuosl.org (Postfix) with ESMTPS id A189287D51\n for <intel-wired-lan@lists.osuosl.org>; Thu, 4 Jun 2020 00:01:22 +0000 (UTC)", "from orsmga006.jf.intel.com ([10.7.209.51])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 03 Jun 2020 17:01:22 -0700", "from mrief-mobl1.amr.corp.intel.com ([10.209.62.192])\n by orsmga006.jf.intel.com with ESMTP; 03 Jun 2020 17:01:21 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "IronPort-SDR": [ "\n kG1mf2hJTBwkOa6HIff3nafbvJ8k/ptiBIH+NBcLuIU8/kTbnb0rhu9pzApBIk/YccHw7LQkPF\n FsZ93mZi0+rA==", "\n UK0iadiITLfZBNk4pdse0rCMkecoPU7HvVZtRbxx9fmj9S55LL8gNaBNec/bxpbVFzAgUas0rM\n Vyf+o1bJ52Ag==" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.73,470,1583222400\"; d=\"scan'208\";a=\"272932804\"", "From": "Andre Guedes <andre.guedes@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Wed, 3 Jun 2020 17:01:05 -0700", "Message-Id": "<20200604000105.15059-7-andre.guedes@intel.com>", "X-Mailer": "git-send-email 2.26.2", "In-Reply-To": "<20200604000105.15059-1-andre.guedes@intel.com>", "References": "<20200604000105.15059-1-andre.guedes@intel.com>", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [PATCH 6/6] igc: Fix rx timestamp disabling", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n <intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "When rx timestamping is enabled, we set the timestamp bit in SRRCTL\nregister for each queue, but we don't clear it when disabling. This\npatch fixes igc_ptp_disable_rx_timestamp() accordingly.\n\nAlso, this patch gets rid of igc_ptp_enable_tstamp_rxqueue() and\nigc_ptp_enable_tstamp_all_rxqueues() and move their logic into\nigc_ptp_enable_rx_timestamp() to keep the enable and disable\nhelpers symmetric.\n\nSigned-off-by: Andre Guedes <andre.guedes@intel.com>\n---\n drivers/net/ethernet/intel/igc/igc_ptp.c | 54 ++++++++----------------\n 1 file changed, 17 insertions(+), 37 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/igc/igc_ptp.c b/drivers/net/ethernet/intel/igc/igc_ptp.c\nindex 0251e6bedac4..e67d4655b47e 100644\n--- a/drivers/net/ethernet/intel/igc/igc_ptp.c\n+++ b/drivers/net/ethernet/intel/igc/igc_ptp.c\n@@ -205,47 +205,20 @@ void igc_ptp_rx_pktstamp(struct igc_q_vector *q_vector, void *va,\n \t\tktime_sub_ns(skb_hwtstamps(skb)->hwtstamp, adjust);\n }\n \n-/**\n- * igc_ptp_enable_tstamp_rxqueue - Enable RX timestamp for a queue\n- * @rx_ring: Pointer to RX queue\n- * @timer: Index for timer\n- *\n- * This function enables RX timestamping for a queue, and selects\n- * which 1588 timer will provide the timestamp.\n- */\n-static void igc_ptp_enable_tstamp_rxqueue(struct igc_adapter *adapter,\n-\t\t\t\t\t struct igc_ring *rx_ring, u8 timer)\n-{\n-\tstruct igc_hw *hw = &adapter->hw;\n-\tint reg_idx = rx_ring->reg_idx;\n-\tu32 srrctl = rd32(IGC_SRRCTL(reg_idx));\n-\n-\tsrrctl |= IGC_SRRCTL_TIMESTAMP;\n-\tsrrctl |= IGC_SRRCTL_TIMER1SEL(timer);\n-\tsrrctl |= IGC_SRRCTL_TIMER0SEL(timer);\n-\n-\twr32(IGC_SRRCTL(reg_idx), srrctl);\n-}\n-\n-static void igc_ptp_enable_tstamp_all_rxqueues(struct igc_adapter *adapter,\n-\t\t\t\t\t u8 timer)\n-{\n-\tint i;\n-\n-\tfor (i = 0; i < adapter->num_rx_queues; i++) {\n-\t\tstruct igc_ring *ring = adapter->rx_ring[i];\n-\n-\t\tigc_ptp_enable_tstamp_rxqueue(adapter, ring, timer);\n-\t}\n-}\n-\n static void igc_ptp_disable_rx_timestamp(struct igc_adapter *adapter)\n {\n \tstruct igc_hw *hw = &adapter->hw;\n \tu32 val;\n+\tint i;\n \n \twr32(IGC_TSYNCRXCTL, 0);\n \n+\tfor (i = 0; i < adapter->num_rx_queues; i++) {\n+\t\tval = rd32(IGC_SRRCTL(i));\n+\t\tval &= ~IGC_SRRCTL_TIMESTAMP;\n+\t\twr32(IGC_SRRCTL(i), val);\n+\t}\n+\n \tval = rd32(IGC_RXPBS);\n \tval &= ~IGC_RXPBS_CFG_TS_EN;\n \twr32(IGC_RXPBS, val);\n@@ -255,14 +228,21 @@ static void igc_ptp_enable_rx_timestamp(struct igc_adapter *adapter)\n {\n \tstruct igc_hw *hw = &adapter->hw;\n \tu32 val;\n+\tint i;\n \n \tval = rd32(IGC_RXPBS);\n \tval |= IGC_RXPBS_CFG_TS_EN;\n \twr32(IGC_RXPBS, val);\n \n-\t/* FIXME: For now, only support retrieving RX timestamps from timer 0\n-\t */\n-\tigc_ptp_enable_tstamp_all_rxqueues(adapter, 0);\n+\tfor (i = 0; i < adapter->num_rx_queues; i++) {\n+\t\tval = rd32(IGC_SRRCTL(i));\n+\t\t/* FIXME: For now, only support retrieving RX timestamps from\n+\t\t * timer 0.\n+\t\t */\n+\t\tval |= IGC_SRRCTL_TIMER1SEL(0) | IGC_SRRCTL_TIMER0SEL(0) |\n+\t\t IGC_SRRCTL_TIMESTAMP;\n+\t\twr32(IGC_SRRCTL(i), val);\n+\t}\n \n \tval = IGC_TSYNCRXCTL_ENABLED | IGC_TSYNCRXCTL_TYPE_ALL |\n \t IGC_TSYNCRXCTL_RXSYNSIG;\n", "prefixes": [ "6/6" ] }