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GET /api/patches/1261086/?format=api
{ "id": 1261086, "url": "http://patchwork.ozlabs.org/api/patches/1261086/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20200325003824.5487-9-andre.guedes@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20200325003824.5487-9-andre.guedes@intel.com>", "list_archive_url": null, "date": "2020-03-25T00:38:22", "name": "[08/10] igc: Remove '\\n' from log strings in igc_mac.c", "commit_ref": null, "pull_url": null, "state": "rejected", "archived": false, "hash": "38f7bf726abe1f9015f77abf74dcc635433b39ad", "submitter": { "id": 72323, "url": "http://patchwork.ozlabs.org/api/people/72323/?format=api", "name": "Andre Guedes", "email": "andre.guedes@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20200325003824.5487-9-andre.guedes@intel.com/mbox/", "series": [ { "id": 166478, "url": "http://patchwork.ozlabs.org/api/series/166478/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=166478", "date": "2020-03-25T00:38:14", "name": "igc: Align log messages", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/166478/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1261086/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1261086/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org; spf=pass (sender SPF authorized)\n\tsmtp.mailfrom=osuosl.org (client-ip=140.211.166.138;\n\thelo=whitealder.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 48n8PN4zY8z9sR4\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 25 Mar 2020 11:38:48 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 4236D84E0C;\n\tWed, 25 Mar 2020 00:38:47 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id W6zeeipqYb83; Wed, 25 Mar 2020 00:38:44 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 2DFB484F5A;\n\tWed, 25 Mar 2020 00:38:43 +0000 (UTC)", "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\tby ash.osuosl.org (Postfix) with ESMTP id 9FDE21BF32A\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 25 Mar 2020 00:38:39 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 965422034C\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 25 Mar 2020 00:38:39 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id wIyl0h6OMoeF for <intel-wired-lan@lists.osuosl.org>;\n\tWed, 25 Mar 2020 00:38:37 +0000 (UTC)", "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n\tby silver.osuosl.org (Postfix) with ESMTPS id A081820009\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 25 Mar 2020 00:38:37 +0000 (UTC)", "from fmsmga006.fm.intel.com ([10.253.24.20])\n\tby fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; \n\t24 Mar 2020 17:38:37 -0700", "from johnorte-mobl2.amr.corp.intel.com ([10.251.10.249])\n\tby fmsmga006.fm.intel.com with ESMTP; 24 Mar 2020 17:38:36 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "IronPort-SDR": [ "Iy3g06Ne7rxkKlbPumB+4JcNoIikczX0QdQhIdAdvCFJymUeSWVix0i36CSvgvBX9u6MV8uGuE\n\tYW40+aioHHCw==", "hRAiOm3WGBzjf37k98m/vpCv/rI6sOcpWPeep9rKVZhVPd73WSfiDSDR7s+ZotW4zpnM4hhVpH\n\tmnnVtGVFmUAA==" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.72,302,1580803200\"; d=\"scan'208\";a=\"448099351\"", "From": "Andre Guedes <andre.guedes@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Tue, 24 Mar 2020 17:38:22 -0700", "Message-Id": "<20200325003824.5487-9-andre.guedes@intel.com>", "X-Mailer": "git-send-email 2.25.0", "In-Reply-To": "<20200325003824.5487-1-andre.guedes@intel.com>", "References": "<20200325003824.5487-1-andre.guedes@intel.com>", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [PATCH 08/10] igc: Remove '\\n' from log strings\n\tin igc_mac.c", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "To keep log strings in igc_mac.c consistent with the rest of the driver\ncode, this patch removes the '\\n' character at the end. The newline\ncharacter is automatically added by netdev_dbg() so there is no changes\nin the output.\n\nNote: hw_dbg() is a macro that expands to netdev_dbg().\n\nSigned-off-by: Andre Guedes <andre.guedes@intel.com>\n---\n drivers/net/ethernet/intel/igc/igc_mac.c | 42 ++++++++++++------------\n 1 file changed, 21 insertions(+), 21 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/igc/igc_mac.c b/drivers/net/ethernet/intel/igc/igc_mac.c\nindex 12aa6b5fcb5d..2cd52b5c203d 100644\n--- a/drivers/net/ethernet/intel/igc/igc_mac.c\n+++ b/drivers/net/ethernet/intel/igc/igc_mac.c\n@@ -37,7 +37,7 @@ s32 igc_disable_pcie_master(struct igc_hw *hw)\n \t}\n \n \tif (!timeout) {\n-\t\thw_dbg(\"Master requests are pending.\\n\");\n+\t\thw_dbg(\"Master requests are pending\");\n \t\tret_val = -IGC_ERR_MASTER_REQUESTS_PENDING;\n \t\tgoto out;\n \t}\n@@ -61,12 +61,12 @@ void igc_init_rx_addrs(struct igc_hw *hw, u16 rar_count)\n \tu32 i;\n \n \t/* Setup the receive address */\n-\thw_dbg(\"Programming MAC Address into RAR[0]\\n\");\n+\thw_dbg(\"Programming MAC Address into RAR[0]\");\n \n \thw->mac.ops.rar_set(hw, hw->mac.addr, 0);\n \n \t/* Zero out the other (rar_entry_count - 1) receive addresses */\n-\thw_dbg(\"Clearing RAR[1-%u]\\n\", rar_count - 1);\n+\thw_dbg(\"Clearing RAR[1-%u]\", rar_count - 1);\n \tfor (i = 1; i < rar_count; i++)\n \t\thw->mac.ops.rar_set(hw, mac_addr, i);\n }\n@@ -138,7 +138,7 @@ s32 igc_setup_link(struct igc_hw *hw)\n \t */\n \thw->fc.current_mode = hw->fc.requested_mode;\n \n-\thw_dbg(\"After fix-ups FlowControl is now = %x\\n\", hw->fc.current_mode);\n+\thw_dbg(\"After fix-ups FlowControl is now = %x\", hw->fc.current_mode);\n \n \t/* Call the necessary media_type subroutine to configure the link. */\n \tret_val = hw->mac.ops.setup_physical_interface(hw);\n@@ -150,7 +150,7 @@ s32 igc_setup_link(struct igc_hw *hw)\n \t * control is disabled, because it does not hurt anything to\n \t * initialize these registers.\n \t */\n-\thw_dbg(\"Initializing the Flow Control address, type and timer regs\\n\");\n+\thw_dbg(\"Initializing the Flow Control address, type and timer regs\");\n \twr32(IGC_FCT, FLOW_CONTROL_TYPE);\n \twr32(IGC_FCAH, FLOW_CONTROL_ADDRESS_HIGH);\n \twr32(IGC_FCAL, FLOW_CONTROL_ADDRESS_LOW);\n@@ -197,7 +197,7 @@ s32 igc_force_mac_fc(struct igc_hw *hw)\n \t * 3: Both Rx and TX flow control (symmetric) is enabled.\n \t * other: No other values should be possible at this point.\n \t */\n-\thw_dbg(\"hw->fc.current_mode = %u\\n\", hw->fc.current_mode);\n+\thw_dbg(\"hw->fc.current_mode = %u\", hw->fc.current_mode);\n \n \tswitch (hw->fc.current_mode) {\n \tcase igc_fc_none:\n@@ -215,7 +215,7 @@ s32 igc_force_mac_fc(struct igc_hw *hw)\n \t\tctrl |= (IGC_CTRL_TFCE | IGC_CTRL_RFCE);\n \t\tbreak;\n \tdefault:\n-\t\thw_dbg(\"Flow control param set incorrectly\\n\");\n+\t\thw_dbg(\"Flow control param set incorrectly\");\n \t\tret_val = -IGC_ERR_CONFIG;\n \t\tgoto out;\n \t}\n@@ -419,7 +419,7 @@ s32 igc_check_for_copper_link(struct igc_hw *hw)\n \t */\n \tret_val = igc_config_fc_after_link_up(hw);\n \tif (ret_val)\n-\t\thw_dbg(\"Error configuring flow control\\n\");\n+\t\thw_dbg(\"Error configuring flow control\");\n \n out:\n \treturn ret_val;\n@@ -473,7 +473,7 @@ s32 igc_config_fc_after_link_up(struct igc_hw *hw)\n \t}\n \n \tif (ret_val) {\n-\t\thw_dbg(\"Error forcing flow control settings\\n\");\n+\t\thw_dbg(\"Error forcing flow control settings\");\n \t\tgoto out;\n \t}\n \n@@ -497,7 +497,7 @@ s32 igc_config_fc_after_link_up(struct igc_hw *hw)\n \t\t\tgoto out;\n \n \t\tif (!(mii_status_reg & MII_SR_AUTONEG_COMPLETE)) {\n-\t\t\thw_dbg(\"Copper PHY and Auto Neg has not completed.\\n\");\n+\t\t\thw_dbg(\"Copper PHY and Auto Neg has not completed\");\n \t\t\tgoto out;\n \t\t}\n \n@@ -558,10 +558,10 @@ s32 igc_config_fc_after_link_up(struct igc_hw *hw)\n \t\t\t */\n \t\t\tif (hw->fc.requested_mode == igc_fc_full) {\n \t\t\t\thw->fc.current_mode = igc_fc_full;\n-\t\t\t\thw_dbg(\"Flow Control = FULL.\\n\");\n+\t\t\t\thw_dbg(\"Flow Control = FULL\");\n \t\t\t} else {\n \t\t\t\thw->fc.current_mode = igc_fc_rx_pause;\n-\t\t\t\thw_dbg(\"Flow Control = RX PAUSE frames only.\\n\");\n+\t\t\t\thw_dbg(\"Flow Control = RX PAUSE frames only\");\n \t\t\t}\n \t\t}\n \n@@ -577,7 +577,7 @@ s32 igc_config_fc_after_link_up(struct igc_hw *hw)\n \t\t\t (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&\n \t\t\t (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {\n \t\t\thw->fc.current_mode = igc_fc_tx_pause;\n-\t\t\thw_dbg(\"Flow Control = TX PAUSE frames only.\\n\");\n+\t\t\thw_dbg(\"Flow Control = TX PAUSE frames only\");\n \t\t}\n \t\t/* For transmitting PAUSE frames ONLY.\n \t\t *\n@@ -591,7 +591,7 @@ s32 igc_config_fc_after_link_up(struct igc_hw *hw)\n \t\t\t !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&\n \t\t\t (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {\n \t\t\thw->fc.current_mode = igc_fc_rx_pause;\n-\t\t\thw_dbg(\"Flow Control = RX PAUSE frames only.\\n\");\n+\t\t\thw_dbg(\"Flow Control = RX PAUSE frames only\");\n \t\t}\n \t\t/* Per the IEEE spec, at this point flow control should be\n \t\t * disabled. However, we want to consider that we could\n@@ -617,10 +617,10 @@ s32 igc_config_fc_after_link_up(struct igc_hw *hw)\n \t\t\t (hw->fc.requested_mode == igc_fc_tx_pause) ||\n \t\t\t (hw->fc.strict_ieee)) {\n \t\t\thw->fc.current_mode = igc_fc_none;\n-\t\t\thw_dbg(\"Flow Control = NONE.\\n\");\n+\t\t\thw_dbg(\"Flow Control = NONE\");\n \t\t} else {\n \t\t\thw->fc.current_mode = igc_fc_rx_pause;\n-\t\t\thw_dbg(\"Flow Control = RX PAUSE frames only.\\n\");\n+\t\t\thw_dbg(\"Flow Control = RX PAUSE frames only\");\n \t\t}\n \n \t\t/* Now we need to do one last check... If we auto-\n@@ -629,7 +629,7 @@ s32 igc_config_fc_after_link_up(struct igc_hw *hw)\n \t\t */\n \t\tret_val = hw->mac.ops.get_speed_and_duplex(hw, &speed, &duplex);\n \t\tif (ret_val) {\n-\t\t\thw_dbg(\"Error getting link speed and duplex\\n\");\n+\t\t\thw_dbg(\"Error getting link speed and duplex\");\n \t\t\tgoto out;\n \t\t}\n \n@@ -641,7 +641,7 @@ s32 igc_config_fc_after_link_up(struct igc_hw *hw)\n \t\t */\n \t\tret_val = igc_force_mac_fc(hw);\n \t\tif (ret_val) {\n-\t\t\thw_dbg(\"Error forcing flow control settings\\n\");\n+\t\t\thw_dbg(\"Error forcing flow control settings\");\n \t\t\tgoto out;\n \t\t}\n \t}\n@@ -669,7 +669,7 @@ s32 igc_get_auto_rd_done(struct igc_hw *hw)\n \t}\n \n \tif (i == AUTO_READ_DONE_TIMEOUT) {\n-\t\thw_dbg(\"Auto read by HW from NVM has not completed.\\n\");\n+\t\thw_dbg(\"Auto read by HW from NVM has not completed\");\n \t\tret_val = -IGC_ERR_RESET;\n \t\tgoto out;\n \t}\n@@ -716,10 +716,10 @@ s32 igc_get_speed_and_duplex_copper(struct igc_hw *hw, u16 *speed,\n \n \tif (status & IGC_STATUS_FD) {\n \t\t*duplex = FULL_DUPLEX;\n-\t\thw_dbg(\"Full Duplex\\n\");\n+\t\thw_dbg(\"Full Duplex\");\n \t} else {\n \t\t*duplex = HALF_DUPLEX;\n-\t\thw_dbg(\"Half Duplex\\n\");\n+\t\thw_dbg(\"Half Duplex\");\n \t}\n \n \treturn 0;\n", "prefixes": [ "08/10" ] }