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GET /api/patches/1253512/?format=api
{ "id": 1253512, "url": "http://patchwork.ozlabs.org/api/patches/1253512/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20200312115707.6534-1-vitaly.lifshits@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20200312115707.6534-1-vitaly.lifshits@intel.com>", "list_archive_url": null, "date": "2020-03-12T11:57:07", "name": "[v1] e1000e: fix S0ix flows for cable connected case", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "e9961028c73753d35b59a73df8962f86f47dc448", "submitter": { "id": 76816, "url": "http://patchwork.ozlabs.org/api/people/76816/?format=api", "name": "Lifshits, Vitaly", "email": "vitaly.lifshits@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20200312115707.6534-1-vitaly.lifshits@intel.com/mbox/", "series": [ { "id": 163943, "url": "http://patchwork.ozlabs.org/api/series/163943/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=163943", "date": "2020-03-12T11:57:07", "name": "[v1] e1000e: fix S0ix flows for cable connected case", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/163943/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1253512/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1253512/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@osuosl.org" ], "Authentication-Results": [ "ozlabs.org; spf=pass (sender SPF authorized)\n\tsmtp.mailfrom=osuosl.org (client-ip=140.211.166.133;\n\thelo=hemlock.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 48dS4J55f3z9sPR\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 12 Mar 2020 22:57:20 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id DA365883BC;\n\tThu, 12 Mar 2020 11:57:18 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id TJFaPxQ7f3xx; Thu, 12 Mar 2020 11:57:18 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 1ECD78948E;\n\tThu, 12 Mar 2020 11:57:18 +0000 (UTC)", "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ash.osuosl.org (Postfix) with ESMTP id E54551BF41C\n\tfor <intel-wired-lan@osuosl.org>;\n\tThu, 12 Mar 2020 11:57:16 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id E0C138948E\n\tfor <intel-wired-lan@osuosl.org>;\n\tThu, 12 Mar 2020 11:57:16 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id DsQcXh2EYksO for <intel-wired-lan@osuosl.org>;\n\tThu, 12 Mar 2020 11:57:16 +0000 (UTC)", "from mga07.intel.com (mga07.intel.com [134.134.136.100])\n\tby hemlock.osuosl.org (Postfix) with ESMTPS id E9D35883BC\n\tfor <intel-wired-lan@osuosl.org>;\n\tThu, 12 Mar 2020 11:57:15 +0000 (UTC)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n\tby orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t12 Mar 2020 04:57:15 -0700", "from ccdlinuxdev08.iil.intel.com ([143.185.160.195])\n\tby fmsmga002.fm.intel.com with ESMTP; 12 Mar 2020 04:57:14 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.70,544,1574150400\"; d=\"scan'208\";a=\"277774790\"", "From": "Vitaly Lifshits <vitaly.lifshits@intel.com>", "To": "intel-wired-lan@osuosl.org", "Date": "Thu, 12 Mar 2020 13:57:07 +0200", "Message-Id": "<20200312115707.6534-1-vitaly.lifshits@intel.com>", "X-Mailer": "git-send-email 2.11.0", "Subject": "[Intel-wired-lan] [PATCH v1] e1000e: fix S0ix flows for cable\n\tconnected case", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "Added a fix to S0ix entry and exit flows for TGP and above\nMAC types, to the case when the ethernet cable is connected\nand the link is up. With that the system is able to reach\nSLP_S0 when going to freeze power state.\n\nChange-type: ImplementationChange\nTitle: e1000e: fix S0ix flows for cable connected case\nSigned-off-by: Vitaly Lifshits <vitaly.lifshits@intel.com>\n---\n drivers/net/ethernet/intel/e1000e/netdev.c | 54 ++++++++++++++++++++++++++++++\n drivers/net/ethernet/intel/e1000e/regs.h | 3 ++\n 2 files changed, 57 insertions(+)", "diff": "diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c\nindex 1e1625122596..4b86c14961e8 100644\n--- a/drivers/net/ethernet/intel/e1000e/netdev.c\n+++ b/drivers/net/ethernet/intel/e1000e/netdev.c\n@@ -6405,6 +6405,31 @@ static void e1000e_s0ix_entry_flow(struct e1000_adapter *adapter)\n \tmac_data |= BIT(3);\n \tew32(CTRL_EXT, mac_data);\n \n+\t/* Disable disconnected cable conditioning for Power Gating */\n+\tmac_data = er32(DPGFR);\n+\tmac_data |= BIT(2);\n+\tew32(DPGFR, mac_data);\n+\n+\t/* Don't wake from dynamic Power Gating with clock request */\n+\tmac_data = er32(FEXTNVM12);\n+\tmac_data |= BIT(12);\n+\tew32(FEXTNVM12, mac_data);\n+\n+\t/* Ungate PGCB clock */\n+\tmac_data = er32(FEXTNVM9);\n+\tmac_data |= BIT(28);\n+\tew32(FEXTNVM9, mac_data);\n+\n+\t/* Enable K1 off to enable mPHY Power Gating */\n+\tmac_data = er32(FEXTNVM6);\n+\tmac_data |= BIT(31);\n+\tew32(FEXTNVM12, mac_data);\n+\n+\t/* Enable mPHY power gating for any link and speed */\n+\tmac_data = er32(FEXTNVM8);\n+\tmac_data |= BIT(9);\n+\tew32(FEXTNVM8, mac_data);\n+\n \t/* Enable the Dynamic Clock Gating in the DMA and MAC */\n \tmac_data = er32(CTRL_EXT);\n \tmac_data |= E1000_CTRL_EXT_DMA_DYN_CLK_EN;\n@@ -6434,6 +6459,35 @@ static void e1000e_s0ix_exit_flow(struct e1000_adapter *adapter)\n \tmac_data |= BIT(0);\n \tew32(FEXTNVM7, mac_data);\n \n+\t/* Disable mPHY power gating for any link and speed */\n+\tmac_data = er32(FEXTNVM8);\n+\tmac_data &= ~BIT(9);\n+\tew32(FEXTNVM8, mac_data);\n+\n+\t/* Disable K1 off */\n+\tmac_data = er32(FEXTNVM6);\n+\tmac_data &= ~BIT(31);\n+\tew32(FEXTNVM12, mac_data);\n+\n+\t/* Disable Ungate PGCB clock */\n+\tmac_data = er32(FEXTNVM9);\n+\tmac_data &= ~BIT(28);\n+\tew32(FEXTNVM9, mac_data);\n+\n+\t/* Cancel not waking from dynamic\n+\t * Power Gating with clock request\n+\t */\n+\tmac_data = er32(FEXTNVM12);\n+\tmac_data &= ~BIT(12);\n+\tew32(FEXTNVM12, mac_data);\n+\n+\t/* Cancel disable disconnected cable conditioning\n+\t * for Power Gating\n+\t */\n+\tmac_data = er32(DPGFR);\n+\tmac_data &= ~BIT(2);\n+\tew32(DPGFR, mac_data);\n+\n \t/* Disable Dynamic Power Gating */\n \tmac_data = er32(CTRL_EXT);\n \tmac_data &= 0xFFFFFFF7;\ndiff --git a/drivers/net/ethernet/intel/e1000e/regs.h b/drivers/net/ethernet/intel/e1000e/regs.h\nindex df59fd1d660c..04e030b6c4b2 100644\n--- a/drivers/net/ethernet/intel/e1000e/regs.h\n+++ b/drivers/net/ethernet/intel/e1000e/regs.h\n@@ -21,9 +21,12 @@\n #define E1000_FEXTNVM5\t0x00014\t/* Future Extended NVM 5 - RW */\n #define E1000_FEXTNVM6\t0x00010\t/* Future Extended NVM 6 - RW */\n #define E1000_FEXTNVM7\t0x000E4\t/* Future Extended NVM 7 - RW */\n+#define E1000_FEXTNVM8 0x5BB0 /* Future Extended NVM 8 - RW */\n #define E1000_FEXTNVM9\t0x5BB4\t/* Future Extended NVM 9 - RW */\n #define E1000_FEXTNVM11\t0x5BBC\t/* Future Extended NVM 11 - RW */\n+#define E1000_FEXTNVM12 0x5BC0 /* Future Extended NVM 12 - RW */\n #define E1000_PCIEANACFG\t0x00F18\t/* PCIE Analog Config */\n+#define E1000_DPGFR 0x00FAC /* Dynamic Power Gate Force Control Register */\n #define E1000_FCT\t0x00030\t/* Flow Control Type - RW */\n #define E1000_VET\t0x00038\t/* VLAN Ether Type - RW */\n #define E1000_ICR\t0x000C0\t/* Interrupt Cause Read - R/clr */\n", "prefixes": [ "v1" ] }