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GET /api/patches/1246195/?format=api
{ "id": 1246195, "url": "http://patchwork.ozlabs.org/api/patches/1246195/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20200228002515.31650-1-sasha.neftin@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20200228002515.31650-1-sasha.neftin@intel.com>", "list_archive_url": null, "date": "2020-02-28T00:25:15", "name": "[v1,1/1] igc: Remove forward declaration", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "d0abc75c7776ec74189a4bc7e8631671740c53b7", "submitter": { "id": 69860, "url": "http://patchwork.ozlabs.org/api/people/69860/?format=api", "name": "Sasha Neftin", "email": "sasha.neftin@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20200228002515.31650-1-sasha.neftin@intel.com/mbox/", "series": [ { "id": 161358, "url": "http://patchwork.ozlabs.org/api/series/161358/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=161358", "date": "2020-02-28T00:25:15", "name": "[v1,1/1] igc: Remove forward declaration", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/161358/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1246195/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1246195/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org; spf=pass (sender SPF authorized)\n\tsmtp.mailfrom=osuosl.org (client-ip=140.211.166.138;\n\thelo=whitealder.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 48T9Kx4w3fz9sPR\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 28 Feb 2020 11:25:25 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id CBEC885F96;\n\tFri, 28 Feb 2020 00:25:23 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id xm7ro36NcDcJ; Fri, 28 Feb 2020 00:25:21 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 140BB86BE0;\n\tFri, 28 Feb 2020 00:25:21 +0000 (UTC)", "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\tby ash.osuosl.org (Postfix) with ESMTP id 38D341BF861\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 28 Feb 2020 00:25:19 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 30F6A86BE0\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 28 Feb 2020 00:25:19 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 84AbnU-AqJo0 for <intel-wired-lan@lists.osuosl.org>;\n\tFri, 28 Feb 2020 00:25:17 +0000 (UTC)", "from mga07.intel.com (mga07.intel.com [134.134.136.100])\n\tby whitealder.osuosl.org (Postfix) with ESMTPS id BF8F486D78\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 28 Feb 2020 00:25:17 +0000 (UTC)", "from fmsmga005.fm.intel.com ([10.253.24.32])\n\tby orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t27 Feb 2020 16:25:17 -0800", "from ccdlinuxdev09.iil.intel.com ([143.185.160.241])\n\tby fmsmga005.fm.intel.com with ESMTP; 27 Feb 2020 16:25:15 -0800" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.70,493,1574150400\"; d=\"scan'208\";a=\"437235427\"", "From": "Sasha Neftin <sasha.neftin@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Fri, 28 Feb 2020 02:25:15 +0200", "Message-Id": "<20200228002515.31650-1-sasha.neftin@intel.com>", "X-Mailer": "git-send-email 2.11.0", "Subject": "[Intel-wired-lan] [PATCH v1 1/1] igc: Remove forward declaration", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "Move igc_adapter and igc_ring structures up to avoid\nforward declaration\nIt is not necessary to forward declare these structures\n\nSigned-off-by: Sasha Neftin <sasha.neftin@intel.com>\n---\n drivers/net/ethernet/intel/igc/igc.h | 391 +++++++++++++++++------------------\n 1 file changed, 194 insertions(+), 197 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/intel/igc/igc.h\nindex 5e36822de5ec..0d4ffbb74214 100644\n--- a/drivers/net/ethernet/intel/igc/igc.h\n+++ b/drivers/net/ethernet/intel/igc/igc.h\n@@ -19,8 +19,200 @@\n /* forward declaration */\n void igc_set_ethtool_ops(struct net_device *);\n \n-struct igc_adapter;\n-struct igc_ring;\n+/* Transmit and receive queues */\n+#define IGC_MAX_RX_QUEUES\t\t4\n+#define IGC_MAX_TX_QUEUES\t\t4\n+\n+#define MAX_Q_VECTORS\t\t\t8\n+#define MAX_STD_JUMBO_FRAME_SIZE\t9216\n+\n+#define MAX_ETYPE_FILTER\t\t(4 - 1)\n+#define IGC_RETA_SIZE\t\t\t128\n+\n+struct igc_tx_queue_stats {\n+\tu64 packets;\n+\tu64 bytes;\n+\tu64 restart_queue;\n+\tu64 restart_queue2;\n+};\n+\n+struct igc_rx_queue_stats {\n+\tu64 packets;\n+\tu64 bytes;\n+\tu64 drops;\n+\tu64 csum_err;\n+\tu64 alloc_failed;\n+};\n+\n+struct igc_rx_packet_stats {\n+\tu64 ipv4_packets; /* IPv4 headers processed */\n+\tu64 ipv4e_packets; /* IPv4E headers with extensions processed */\n+\tu64 ipv6_packets; /* IPv6 headers processed */\n+\tu64 ipv6e_packets; /* IPv6E headers with extensions processed */\n+\tu64 tcp_packets; /* TCP headers processed */\n+\tu64 udp_packets; /* UDP headers processed */\n+\tu64 sctp_packets; /* SCTP headers processed */\n+\tu64 nfs_packets; /* NFS headers processe */\n+\tu64 other_packets;\n+};\n+\n+struct igc_ring_container {\n+\tstruct igc_ring *ring; /* pointer to linked list of rings */\n+\tunsigned int total_bytes; /* total bytes processed this int */\n+\tunsigned int total_packets; /* total packets processed this int */\n+\tu16 work_limit; /* total work allowed per interrupt */\n+\tu8 count; /* total number of rings in vector */\n+\tu8 itr; /* current ITR setting for ring */\n+};\n+\n+struct igc_ring {\n+\tstruct igc_q_vector *q_vector; /* backlink to q_vector */\n+\tstruct net_device *netdev; /* back pointer to net_device */\n+\tstruct device *dev; /* device for dma mapping */\n+\tunion { /* array of buffer info structs */\n+\t\tstruct igc_tx_buffer *tx_buffer_info;\n+\t\tstruct igc_rx_buffer *rx_buffer_info;\n+\t};\n+\tvoid *desc; /* descriptor ring memory */\n+\tunsigned long flags; /* ring specific flags */\n+\tvoid __iomem *tail; /* pointer to ring tail register */\n+\tdma_addr_t dma; /* phys address of the ring */\n+\tunsigned int size; /* length of desc. ring in bytes */\n+\n+\tu16 count; /* number of desc. in the ring */\n+\tu8 queue_index; /* logical index of the ring*/\n+\tu8 reg_idx; /* physical index of the ring */\n+\tbool launchtime_enable;\t\t/* true if LaunchTime is enabled */\n+\n+\tu32 start_time;\n+\tu32 end_time;\n+\n+\t/* everything past this point are written often */\n+\tu16 next_to_clean;\n+\tu16 next_to_use;\n+\tu16 next_to_alloc;\n+\n+\tunion {\n+\t\t/* TX */\n+\t\tstruct {\n+\t\t\tstruct igc_tx_queue_stats tx_stats;\n+\t\t\tstruct u64_stats_sync tx_syncp;\n+\t\t\tstruct u64_stats_sync tx_syncp2;\n+\t\t};\n+\t\t/* RX */\n+\t\tstruct {\n+\t\t\tstruct igc_rx_queue_stats rx_stats;\n+\t\t\tstruct igc_rx_packet_stats pkt_stats;\n+\t\t\tstruct u64_stats_sync rx_syncp;\n+\t\t\tstruct sk_buff *skb;\n+\t\t};\n+\t};\n+} ____cacheline_internodealigned_in_smp;\n+\n+/* Board specific private data structure */\n+struct igc_adapter {\n+\tstruct net_device *netdev;\n+\n+\tunsigned long state;\n+\tunsigned int flags;\n+\tunsigned int num_q_vectors;\n+\n+\tstruct msix_entry *msix_entries;\n+\n+\t/* TX */\n+\tu16 tx_work_limit;\n+\tu32 tx_timeout_count;\n+\tint num_tx_queues;\n+\tstruct igc_ring *tx_ring[IGC_MAX_TX_QUEUES];\n+\n+\t/* RX */\n+\tint num_rx_queues;\n+\tstruct igc_ring *rx_ring[IGC_MAX_RX_QUEUES];\n+\n+\tstruct timer_list watchdog_timer;\n+\tstruct timer_list dma_err_timer;\n+\tstruct timer_list phy_info_timer;\n+\n+\tu32 wol;\n+\tu32 en_mng_pt;\n+\tu16 link_speed;\n+\tu16 link_duplex;\n+\n+\tu8 port_num;\n+\n+\tu8 __iomem *io_addr;\n+\t/* Interrupt Throttle Rate */\n+\tu32 rx_itr_setting;\n+\tu32 tx_itr_setting;\n+\n+\tstruct work_struct reset_task;\n+\tstruct work_struct watchdog_task;\n+\tstruct work_struct dma_err_task;\n+\tbool fc_autoneg;\n+\n+\tu8 tx_timeout_factor;\n+\n+\tint msg_enable;\n+\tu32 max_frame_size;\n+\tu32 min_frame_size;\n+\n+\tktime_t base_time;\n+\tktime_t cycle_time;\n+\n+\t/* OS defined structs */\n+\tstruct pci_dev *pdev;\n+\t/* lock for statistics */\n+\tspinlock_t stats64_lock;\n+\tstruct rtnl_link_stats64 stats64;\n+\n+\t/* structs defined in igc_hw.h */\n+\tstruct igc_hw hw;\n+\tstruct igc_hw_stats stats;\n+\n+\tstruct igc_q_vector *q_vector[MAX_Q_VECTORS];\n+\tu32 eims_enable_mask;\n+\tu32 eims_other;\n+\n+\tu16 tx_ring_count;\n+\tu16 rx_ring_count;\n+\n+\tu32 tx_hwtstamp_timeouts;\n+\tu32 tx_hwtstamp_skipped;\n+\tu32 rx_hwtstamp_cleared;\n+\n+\tu32 rss_queues;\n+\tu32 rss_indir_tbl_init;\n+\n+\t/* RX network flow classification support */\n+\tstruct hlist_head nfc_filter_list;\n+\tstruct hlist_head cls_flower_list;\n+\tunsigned int nfc_filter_count;\n+\n+\t/* lock for RX network flow classification filter */\n+\tspinlock_t nfc_lock;\n+\tbool etype_bitmap[MAX_ETYPE_FILTER];\n+\n+\tstruct igc_mac_addr *mac_table;\n+\n+\tu8 rss_indir_tbl[IGC_RETA_SIZE];\n+\n+\tunsigned long link_check_timeout;\n+\tstruct igc_info ei;\n+\n+\tstruct ptp_clock *ptp_clock;\n+\tstruct ptp_clock_info ptp_caps;\n+\tstruct work_struct ptp_tx_work;\n+\tstruct sk_buff *ptp_tx_skb;\n+\tstruct hwtstamp_config tstamp_config;\n+\tunsigned long ptp_tx_start;\n+\tunsigned long last_rx_ptp_check;\n+\tunsigned long last_rx_timestamp;\n+\tunsigned int ptp_flags;\n+\t/* System time value lock */\n+\tspinlock_t tmreg_lock;\n+\tstruct cyclecounter cc;\n+\tstruct timecounter tc;\n+};\n \n void igc_up(struct igc_adapter *adapter);\n void igc_down(struct igc_adapter *adapter);\n@@ -50,7 +242,6 @@ extern char igc_driver_name[];\n extern char igc_driver_version[];\n \n #define IGC_REGS_LEN\t\t\t740\n-#define IGC_RETA_SIZE\t\t\t128\n \n /* flags controlling PTP/1588 function */\n #define IGC_PTP_ENABLED\t\tBIT(0)\n@@ -100,13 +291,6 @@ extern char igc_driver_version[];\n #define IGC_MIN_RXD\t\t80\n #define IGC_MAX_RXD\t\t4096\n \n-/* Transmit and receive queues */\n-#define IGC_MAX_RX_QUEUES\t\t4\n-#define IGC_MAX_TX_QUEUES\t\t4\n-\n-#define MAX_Q_VECTORS\t\t\t8\n-#define MAX_STD_JUMBO_FRAME_SIZE\t9216\n-\n /* Supported Rx Buffer Sizes */\n #define IGC_RXBUFFER_256\t\t256\n #define IGC_RXBUFFER_2048\t\t2048\n@@ -233,86 +417,6 @@ struct igc_rx_buffer {\n \t__u16 pagecnt_bias;\n };\n \n-struct igc_tx_queue_stats {\n-\tu64 packets;\n-\tu64 bytes;\n-\tu64 restart_queue;\n-\tu64 restart_queue2;\n-};\n-\n-struct igc_rx_queue_stats {\n-\tu64 packets;\n-\tu64 bytes;\n-\tu64 drops;\n-\tu64 csum_err;\n-\tu64 alloc_failed;\n-};\n-\n-struct igc_rx_packet_stats {\n-\tu64 ipv4_packets; /* IPv4 headers processed */\n-\tu64 ipv4e_packets; /* IPv4E headers with extensions processed */\n-\tu64 ipv6_packets; /* IPv6 headers processed */\n-\tu64 ipv6e_packets; /* IPv6E headers with extensions processed */\n-\tu64 tcp_packets; /* TCP headers processed */\n-\tu64 udp_packets; /* UDP headers processed */\n-\tu64 sctp_packets; /* SCTP headers processed */\n-\tu64 nfs_packets; /* NFS headers processe */\n-\tu64 other_packets;\n-};\n-\n-struct igc_ring_container {\n-\tstruct igc_ring *ring; /* pointer to linked list of rings */\n-\tunsigned int total_bytes; /* total bytes processed this int */\n-\tunsigned int total_packets; /* total packets processed this int */\n-\tu16 work_limit; /* total work allowed per interrupt */\n-\tu8 count; /* total number of rings in vector */\n-\tu8 itr; /* current ITR setting for ring */\n-};\n-\n-struct igc_ring {\n-\tstruct igc_q_vector *q_vector; /* backlink to q_vector */\n-\tstruct net_device *netdev; /* back pointer to net_device */\n-\tstruct device *dev; /* device for dma mapping */\n-\tunion { /* array of buffer info structs */\n-\t\tstruct igc_tx_buffer *tx_buffer_info;\n-\t\tstruct igc_rx_buffer *rx_buffer_info;\n-\t};\n-\tvoid *desc; /* descriptor ring memory */\n-\tunsigned long flags; /* ring specific flags */\n-\tvoid __iomem *tail; /* pointer to ring tail register */\n-\tdma_addr_t dma; /* phys address of the ring */\n-\tunsigned int size; /* length of desc. ring in bytes */\n-\n-\tu16 count; /* number of desc. in the ring */\n-\tu8 queue_index; /* logical index of the ring*/\n-\tu8 reg_idx; /* physical index of the ring */\n-\tbool launchtime_enable;\t\t/* true if LaunchTime is enabled */\n-\n-\tu32 start_time;\n-\tu32 end_time;\n-\n-\t/* everything past this point are written often */\n-\tu16 next_to_clean;\n-\tu16 next_to_use;\n-\tu16 next_to_alloc;\n-\n-\tunion {\n-\t\t/* TX */\n-\t\tstruct {\n-\t\t\tstruct igc_tx_queue_stats tx_stats;\n-\t\t\tstruct u64_stats_sync tx_syncp;\n-\t\t\tstruct u64_stats_sync tx_syncp2;\n-\t\t};\n-\t\t/* RX */\n-\t\tstruct {\n-\t\t\tstruct igc_rx_queue_stats rx_stats;\n-\t\t\tstruct igc_rx_packet_stats pkt_stats;\n-\t\t\tstruct u64_stats_sync rx_syncp;\n-\t\t\tstruct sk_buff *skb;\n-\t\t};\n-\t};\n-} ____cacheline_internodealigned_in_smp;\n-\n struct igc_q_vector {\n \tstruct igc_adapter *adapter; /* backlink */\n \tvoid __iomem *itr_register;\n@@ -333,8 +437,6 @@ struct igc_q_vector {\n \tstruct igc_ring ring[] ____cacheline_internodealigned_in_smp;\n };\n \n-#define MAX_ETYPE_FILTER\t\t(4 - 1)\n-\n enum igc_filter_match_flags {\n \tIGC_FILTER_FLAG_ETHER_TYPE =\t0x1,\n \tIGC_FILTER_FLAG_VLAN_TCI =\t0x2,\n@@ -378,111 +480,6 @@ struct igc_mac_addr {\n \n #define IGC_MAX_RXNFC_FILTERS\t\t16\n \n-/* Board specific private data structure */\n-struct igc_adapter {\n-\tstruct net_device *netdev;\n-\n-\tunsigned long state;\n-\tunsigned int flags;\n-\tunsigned int num_q_vectors;\n-\n-\tstruct msix_entry *msix_entries;\n-\n-\t/* TX */\n-\tu16 tx_work_limit;\n-\tu32 tx_timeout_count;\n-\tint num_tx_queues;\n-\tstruct igc_ring *tx_ring[IGC_MAX_TX_QUEUES];\n-\n-\t/* RX */\n-\tint num_rx_queues;\n-\tstruct igc_ring *rx_ring[IGC_MAX_RX_QUEUES];\n-\n-\tstruct timer_list watchdog_timer;\n-\tstruct timer_list dma_err_timer;\n-\tstruct timer_list phy_info_timer;\n-\n-\tu32 wol;\n-\tu32 en_mng_pt;\n-\tu16 link_speed;\n-\tu16 link_duplex;\n-\n-\tu8 port_num;\n-\n-\tu8 __iomem *io_addr;\n-\t/* Interrupt Throttle Rate */\n-\tu32 rx_itr_setting;\n-\tu32 tx_itr_setting;\n-\n-\tstruct work_struct reset_task;\n-\tstruct work_struct watchdog_task;\n-\tstruct work_struct dma_err_task;\n-\tbool fc_autoneg;\n-\n-\tu8 tx_timeout_factor;\n-\n-\tint msg_enable;\n-\tu32 max_frame_size;\n-\tu32 min_frame_size;\n-\n-\tktime_t base_time;\n-\tktime_t cycle_time;\n-\n-\t/* OS defined structs */\n-\tstruct pci_dev *pdev;\n-\t/* lock for statistics */\n-\tspinlock_t stats64_lock;\n-\tstruct rtnl_link_stats64 stats64;\n-\n-\t/* structs defined in igc_hw.h */\n-\tstruct igc_hw hw;\n-\tstruct igc_hw_stats stats;\n-\n-\tstruct igc_q_vector *q_vector[MAX_Q_VECTORS];\n-\tu32 eims_enable_mask;\n-\tu32 eims_other;\n-\n-\tu16 tx_ring_count;\n-\tu16 rx_ring_count;\n-\n-\tu32 tx_hwtstamp_timeouts;\n-\tu32 tx_hwtstamp_skipped;\n-\tu32 rx_hwtstamp_cleared;\n-\n-\tu32 rss_queues;\n-\tu32 rss_indir_tbl_init;\n-\n-\t/* RX network flow classification support */\n-\tstruct hlist_head nfc_filter_list;\n-\tstruct hlist_head cls_flower_list;\n-\tunsigned int nfc_filter_count;\n-\n-\t/* lock for RX network flow classification filter */\n-\tspinlock_t nfc_lock;\n-\tbool etype_bitmap[MAX_ETYPE_FILTER];\n-\n-\tstruct igc_mac_addr *mac_table;\n-\n-\tu8 rss_indir_tbl[IGC_RETA_SIZE];\n-\n-\tunsigned long link_check_timeout;\n-\tstruct igc_info ei;\n-\n-\tstruct ptp_clock *ptp_clock;\n-\tstruct ptp_clock_info ptp_caps;\n-\tstruct work_struct ptp_tx_work;\n-\tstruct sk_buff *ptp_tx_skb;\n-\tstruct hwtstamp_config tstamp_config;\n-\tunsigned long ptp_tx_start;\n-\tunsigned long last_rx_ptp_check;\n-\tunsigned long last_rx_timestamp;\n-\tunsigned int ptp_flags;\n-\t/* System time value lock */\n-\tspinlock_t tmreg_lock;\n-\tstruct cyclecounter cc;\n-\tstruct timecounter tc;\n-};\n-\n /* igc_desc_unused - calculate if we have unused descriptors */\n static inline u16 igc_desc_unused(const struct igc_ring *ring)\n {\n", "prefixes": [ "v1", "1/1" ] }