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GET /api/patches/1235105/?format=api
{ "id": 1235105, "url": "http://patchwork.ozlabs.org/api/patches/1235105/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20200207182443.1501016-3-vinicius.gomes@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20200207182443.1501016-3-vinicius.gomes@intel.com>", "list_archive_url": null, "date": "2020-02-07T18:24:43", "name": "[next-queue,v2,2/2] igc: Add support for ETF offloading", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "76b837e9d26afcb87fa00537f6d27673d577f9af", "submitter": { "id": 72272, "url": "http://patchwork.ozlabs.org/api/people/72272/?format=api", "name": "Vinicius Costa Gomes", "email": "vinicius.gomes@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20200207182443.1501016-3-vinicius.gomes@intel.com/mbox/", "series": [ { "id": 157388, "url": "http://patchwork.ozlabs.org/api/series/157388/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=157388", "date": "2020-02-07T18:24:41", "name": "igc: Add initial TSN qdiscs offloading", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/157388/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1235105/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1235105/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org; spf=pass (sender SPF authorized)\n\tsmtp.mailfrom=osuosl.org (client-ip=140.211.166.137;\n\thelo=fraxinus.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 48DkFc42wrz9sPJ\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 8 Feb 2020 05:23:32 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 9DC59868EF;\n\tFri, 7 Feb 2020 18:23:30 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 7CsE2MEitbUQ; Fri, 7 Feb 2020 18:23:29 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 58B3D868E8;\n\tFri, 7 Feb 2020 18:23:29 +0000 (UTC)", "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ash.osuosl.org (Postfix) with ESMTP id 793B61BF38E\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 7 Feb 2020 18:23:26 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 71AB787EC4\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 7 Feb 2020 18:23:26 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id SKxQGpoiuqke for <intel-wired-lan@lists.osuosl.org>;\n\tFri, 7 Feb 2020 18:23:24 +0000 (UTC)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n\tby hemlock.osuosl.org (Postfix) with ESMTPS id 1A4C487ED0\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 7 Feb 2020 18:23:24 +0000 (UTC)", "from orsmga005.jf.intel.com ([10.7.209.41])\n\tby fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t07 Feb 2020 10:23:23 -0800", "from vcostago-desk1.jf.intel.com ([10.54.70.26])\n\tby orsmga005.jf.intel.com with ESMTP; 07 Feb 2020 10:23:22 -0800" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.70,414,1574150400\"; d=\"scan'208\";a=\"404899417\"", "From": "Vinicius Costa Gomes <vinicius.gomes@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Fri, 7 Feb 2020 10:24:43 -0800", "Message-Id": "<20200207182443.1501016-3-vinicius.gomes@intel.com>", "X-Mailer": "git-send-email 2.25.0", "In-Reply-To": "<20200207182443.1501016-1-vinicius.gomes@intel.com>", "References": "<20200207182443.1501016-1-vinicius.gomes@intel.com>", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [next-queue PATCH v2 2/2] igc: Add support for\n\tETF offloading", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "This adds support for ETF offloading for the i225 controller.\n\nFor i225, the LaunchTime feature is almost a subset of the Qbv\nfeature. The main change from the i210 is that the launchtime of each\npacket is specified as an offset applied to the BASET register. BASET\nis automatically incremented each cycle.\n\nFor i225, the approach chosen is to re-use most of the setup used for\ntaprio offloading. With a few changes:\n\n - The more or less obvious one is that when ETF is enabled, we should\n set add the expected launchtime to the (advanced) transmit\n descriptor;\n\n - The less obvious, is that when taprio offloading is not enabled, we\n add a dummy schedule (all queues are open all the time, with a cycle\n time of 1 second).\n\nSigned-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>\n---\n drivers/net/ethernet/intel/igc/igc_defines.h | 1 +\n drivers/net/ethernet/intel/igc/igc_main.c | 70 +++++++++++++++++++-\n drivers/net/ethernet/intel/igc/igc_tsn.c | 19 +++++-\n 3 files changed, 86 insertions(+), 4 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h\nindex 976fa97b082a..6c8850b43951 100644\n--- a/drivers/net/ethernet/intel/igc/igc_defines.h\n+++ b/drivers/net/ethernet/intel/igc/igc_defines.h\n@@ -440,6 +440,7 @@\n #define IGC_TQAVCTRL_TRANSMIT_MODE_TSN\t0x00000001\n #define IGC_TQAVCTRL_ENHANCED_QAV\t0x00000008\n \n+#define IGC_TXQCTL_QUEUE_MODE_LAUNCHT\t0x00000001\n #define IGC_TXQCTL_STRICT_CYCLE\t\t0x00000002\n #define IGC_TXQCTL_STRICT_END\t\t0x00000004\n #define IGC_TXQCTL_PREEMPTIBLE\t\t0x00000008\ndiff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c\nindex 0cb0c72160ab..96c838393631 100644\n--- a/drivers/net/ethernet/intel/igc/igc_main.c\n+++ b/drivers/net/ethernet/intel/igc/igc_main.c\n@@ -869,6 +869,23 @@ static int igc_write_mc_addr_list(struct net_device *netdev)\n \treturn netdev_mc_count(netdev);\n }\n \n+static __le32 igc_tx_launchtime(struct igc_adapter *adapter, ktime_t txtime)\n+{\n+\tktime_t cycle_time = adapter->cycle_time;\n+\tktime_t base_time = adapter->base_time;\n+\tu32 launchtime;\n+\n+\t/* FIXME: when using ETF together with taprio, we may have a\n+\t * case where 'delta' is larger than the cycle_time, this may\n+\t * cause problems if we don't read the current value of\n+\t * IGC_BASET, as the value writen into the launchtime\n+\t * descriptor field may be misinterpreted.\n+\t */\n+\tdiv_s64_rem(ktime_sub_ns(txtime, base_time), cycle_time, &launchtime);\n+\n+\treturn cpu_to_le32(launchtime);\n+}\n+\n static void igc_tx_ctxtdesc(struct igc_ring *tx_ring,\n \t\t\t struct igc_tx_buffer *first,\n \t\t\t u32 vlan_macip_lens, u32 type_tucmd,\n@@ -876,7 +893,6 @@ static void igc_tx_ctxtdesc(struct igc_ring *tx_ring,\n {\n \tstruct igc_adv_tx_context_desc *context_desc;\n \tu16 i = tx_ring->next_to_use;\n-\tstruct timespec64 ts;\n \n \tcontext_desc = IGC_TX_CTXTDESC(tx_ring, i);\n \n@@ -898,9 +914,12 @@ static void igc_tx_ctxtdesc(struct igc_ring *tx_ring,\n \t * should have been handled by the upper layers.\n \t */\n \tif (tx_ring->launchtime_enable) {\n-\t\tts = ktime_to_timespec64(first->skb->tstamp);\n+\t\tstruct igc_adapter *adapter = netdev_priv(tx_ring->netdev);\n+\t\tktime_t txtime = first->skb->tstamp;\n+\n \t\tfirst->skb->tstamp = ktime_set(0, 0);\n-\t\tcontext_desc->launch_time = cpu_to_le32(ts.tv_nsec / 32);\n+\t\tcontext_desc->launch_time = igc_tx_launchtime(adapter,\n+\t\t\t\t\t\t\t txtime);\n \t} else {\n \t\tcontext_desc->launch_time = 0;\n \t}\n@@ -4497,6 +4516,32 @@ static int igc_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)\n \t}\n }\n \n+static int igc_save_launchtime_params(struct igc_adapter *adapter, int queue,\n+\t\t\t\t bool enable)\n+{\n+\tstruct igc_ring *ring;\n+\tint i;\n+\n+\tif (queue < 0 || queue > adapter->num_tx_queues)\n+\t\treturn -EINVAL;\n+\n+\tring = adapter->tx_ring[queue];\n+\tring->launchtime_enable = enable;\n+\n+\tif (adapter->base_time)\n+\t\treturn 0;\n+\n+\tadapter->cycle_time = NSEC_PER_SEC;\n+\n+\tfor (i = 0; i < adapter->num_tx_queues; i++) {\n+\t\tring = adapter->tx_ring[i];\n+\t\tring->start_time = 0;\n+\t\tring->end_time = NSEC_PER_SEC;\n+\t}\n+\n+\treturn 0;\n+}\n+\n static bool validate_schedule(const struct tc_taprio_qopt_offload *qopt)\n {\n \tint queue_uses[IGC_MAX_TX_QUEUES] = { };\n@@ -4529,6 +4574,22 @@ static bool validate_schedule(const struct tc_taprio_qopt_offload *qopt)\n \treturn true;\n }\n \n+static int igc_tsn_enable_launchtime(struct igc_adapter *adapter,\n+\t\t\t\t struct tc_etf_qopt_offload *qopt)\n+{\n+\tstruct igc_hw *hw = &adapter->hw;\n+\tint err;\n+\n+\tif (hw->mac.type != igc_i225)\n+\t\treturn -EOPNOTSUPP;\n+\n+\terr = igc_save_launchtime_params(adapter, qopt->queue, qopt->enable);\n+\tif (err)\n+\t\treturn err;\n+\n+\treturn igc_tsn_offload_apply(adapter);\n+}\n+\n static int igc_save_qbv_schedule(struct igc_adapter *adapter,\n \t\t\t\t struct tc_taprio_qopt_offload *qopt)\n {\n@@ -4600,6 +4661,9 @@ static int igc_setup_tc(struct net_device *dev, enum tc_setup_type type,\n \tcase TC_SETUP_QDISC_TAPRIO:\n \t\treturn igc_tsn_enable_qbv_scheduling(adapter, type_data);\n \n+\tcase TC_SETUP_QDISC_ETF:\n+\t\treturn igc_tsn_enable_launchtime(adapter, type_data);\n+\n \tdefault:\n \t\treturn -EOPNOTSUPP;\n \t}\ndiff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c b/drivers/net/ethernet/intel/igc/igc_tsn.c\nindex ebd61b89d90e..05beb6b8ca00 100644\n--- a/drivers/net/ethernet/intel/igc/igc_tsn.c\n+++ b/drivers/net/ethernet/intel/igc/igc_tsn.c\n@@ -3,6 +3,20 @@\n \n #include \"igc.h\"\n \n+static bool is_any_launchtime(struct igc_adapter *adapter)\n+{\n+\tint i;\n+\n+\tfor (i = 0; i < adapter->num_tx_queues; i++) {\n+\t\tstruct igc_ring *ring = adapter->tx_ring[i];\n+\n+\t\tif (ring->launchtime_enable)\n+\t\t\treturn true;\n+\t}\n+\n+\treturn false;\n+}\n+\n /* Returns the TSN specific registers to their default values after\n * TSN offloading is disabled.\n */\n@@ -87,6 +101,9 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter)\n \t\t\t\tIGC_TXQCTL_STRICT_END;\n \t\t}\n \n+\t\tif (ring->launchtime_enable)\n+\t\t\ttxqctl |= IGC_TXQCTL_QUEUE_MODE_LAUNCHT;\n+\n \t\twr32(IGC_TXQCTL(i), txqctl);\n \t}\n \n@@ -114,7 +131,7 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter)\n \n int igc_tsn_offload_apply(struct igc_adapter *adapter)\n {\n-\tbool is_any_enabled = adapter->base_time;\n+\tbool is_any_enabled = adapter->base_time || is_any_launchtime(adapter);\n \n \tif (!(adapter->flags & IGC_FLAG_TSN_QBV_ENABLED) && !is_any_enabled)\n \t\treturn 0;\n", "prefixes": [ "next-queue", "v2", "2/2" ] }