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GET /api/patches/1234512/?format=api
{ "id": 1234512, "url": "http://patchwork.ozlabs.org/api/patches/1234512/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20200206092013.23388-9-anthony.l.nguyen@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20200206092013.23388-9-anthony.l.nguyen@intel.com>", "list_archive_url": null, "date": "2020-02-06T09:20:07", "name": "[S37,v3,09/15] ice: update Unit Load Status bitmask to check after reset", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "1d2da7023e6ec43f382762ec52f7614bf523c30d", "submitter": { "id": 68875, "url": "http://patchwork.ozlabs.org/api/people/68875/?format=api", "name": "Tony Nguyen", "email": "anthony.l.nguyen@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20200206092013.23388-9-anthony.l.nguyen@intel.com/mbox/", "series": [ { "id": 157176, "url": "http://patchwork.ozlabs.org/api/series/157176/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=157176", "date": "2020-02-06T09:20:02", "name": "[S37,v3,01/15] ice: Fix DCB rebuild after reset", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/157176/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1234512/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1234512/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org; spf=pass (sender SPF authorized)\n\tsmtp.mailfrom=osuosl.org (client-ip=140.211.166.136;\n\thelo=silver.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 48D5d83ZN7z9sRY\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 7 Feb 2020 04:53:16 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 110D720382;\n\tThu, 6 Feb 2020 17:53:15 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id GhdUNISTt2C8; Thu, 6 Feb 2020 17:53:13 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby silver.osuosl.org (Postfix) with ESMTP id 8B7FD20387;\n\tThu, 6 Feb 2020 17:53:13 +0000 (UTC)", "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\tby ash.osuosl.org (Postfix) with ESMTP id 3C3C21BF9B9\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 6 Feb 2020 17:53:09 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 394D386102\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 6 Feb 2020 17:53:09 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id sONXhxZJ1KRX for <intel-wired-lan@lists.osuosl.org>;\n\tThu, 6 Feb 2020 17:53:08 +0000 (UTC)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n\tby fraxinus.osuosl.org (Postfix) with ESMTPS id B2DCA860FC\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 6 Feb 2020 17:53:08 +0000 (UTC)", "from fmsmga004.fm.intel.com ([10.253.24.48])\n\tby fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t06 Feb 2020 09:53:07 -0800", "from unknown (HELO localhost.jf.intel.com) ([10.166.244.174])\n\tby fmsmga004.fm.intel.com with ESMTP; 06 Feb 2020 09:53:07 -0800" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.70,410,1574150400\"; d=\"scan'208\";a=\"255160937\"", "From": "Tony Nguyen <anthony.l.nguyen@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Thu, 6 Feb 2020 01:20:07 -0800", "Message-Id": "<20200206092013.23388-9-anthony.l.nguyen@intel.com>", "X-Mailer": "git-send-email 2.20.1", "In-Reply-To": "<20200206092013.23388-1-anthony.l.nguyen@intel.com>", "References": "<20200206092013.23388-1-anthony.l.nguyen@intel.com>", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [PATCH S37 v3 09/15] ice: update Unit Load Status\n\tbitmask to check after reset", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "From: Bruce Allan <bruce.w.allan@intel.com>\n\nAfter a reset the Unit Load Status bits in the GLNVM_ULD register to check\nfor completion should be 0x7FF before continuing. Update the mask to check\n(minus the three reserved bits that are always set).\n\nSigned-off-by: Bruce Allan <bruce.w.allan@intel.com>\nSigned-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>\n---\n drivers/net/ethernet/intel/ice/ice_common.c | 18 +++++++++++++-----\n .../net/ethernet/intel/ice/ice_hw_autogen.h | 6 ++++++\n 2 files changed, 19 insertions(+), 5 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c\nindex 151bec82bc0c..8931c6a3e3f6 100644\n--- a/drivers/net/ethernet/intel/ice/ice_common.c\n+++ b/drivers/net/ethernet/intel/ice/ice_common.c\n@@ -818,7 +818,7 @@ void ice_deinit_hw(struct ice_hw *hw)\n */\n enum ice_status ice_check_reset(struct ice_hw *hw)\n {\n-\tu32 cnt, reg = 0, grst_delay;\n+\tu32 cnt, reg = 0, grst_delay, uld_mask;\n \n \t/* Poll for Device Active state in case a recent CORER, GLOBR,\n \t * or EMPR has occurred. The grst delay value is in 100ms units.\n@@ -840,13 +840,21 @@ enum ice_status ice_check_reset(struct ice_hw *hw)\n \t\treturn ICE_ERR_RESET_FAILED;\n \t}\n \n-#define ICE_RESET_DONE_MASK\t(GLNVM_ULD_CORER_DONE_M | \\\n-\t\t\t\t GLNVM_ULD_GLOBR_DONE_M)\n+#define ICE_RESET_DONE_MASK\t(GLNVM_ULD_PCIER_DONE_M |\\\n+\t\t\t\t GLNVM_ULD_PCIER_DONE_1_M |\\\n+\t\t\t\t GLNVM_ULD_CORER_DONE_M |\\\n+\t\t\t\t GLNVM_ULD_GLOBR_DONE_M |\\\n+\t\t\t\t GLNVM_ULD_POR_DONE_M |\\\n+\t\t\t\t GLNVM_ULD_POR_DONE_1_M |\\\n+\t\t\t\t GLNVM_ULD_PCIER_DONE_2_M)\n+\n+\tuld_mask = ICE_RESET_DONE_MASK | (hw->func_caps.common_cap.iwarp ?\n+\t\t\t\t\t GLNVM_ULD_PE_DONE_M : 0);\n \n \t/* Device is Active; check Global Reset processes are done */\n \tfor (cnt = 0; cnt < ICE_PF_RESET_WAIT_COUNT; cnt++) {\n-\t\treg = rd32(hw, GLNVM_ULD) & ICE_RESET_DONE_MASK;\n-\t\tif (reg == ICE_RESET_DONE_MASK) {\n+\t\treg = rd32(hw, GLNVM_ULD) & uld_mask;\n+\t\tif (reg == uld_mask) {\n \t\t\tice_debug(hw, ICE_DBG_INIT,\n \t\t\t\t \"Global reset processes done. %d\\n\", cnt);\n \t\t\tbreak;\ndiff --git a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h\nindex 30f50b06173e..306b8943cfc0 100644\n--- a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h\n+++ b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h\n@@ -268,8 +268,14 @@\n #define GLNVM_GENS_SR_SIZE_S\t\t\t5\n #define GLNVM_GENS_SR_SIZE_M\t\t\tICE_M(0x7, 5)\n #define GLNVM_ULD\t\t\t\t0x000B6008\n+#define GLNVM_ULD_PCIER_DONE_M\t\t\tBIT(0)\n+#define GLNVM_ULD_PCIER_DONE_1_M\t\tBIT(1)\n #define GLNVM_ULD_CORER_DONE_M\t\t\tBIT(3)\n #define GLNVM_ULD_GLOBR_DONE_M\t\t\tBIT(4)\n+#define GLNVM_ULD_POR_DONE_M\t\t\tBIT(5)\n+#define GLNVM_ULD_POR_DONE_1_M\t\t\tBIT(8)\n+#define GLNVM_ULD_PCIER_DONE_2_M\t\tBIT(9)\n+#define GLNVM_ULD_PE_DONE_M\t\t\tBIT(10)\n #define GLPCI_CNF2\t\t\t\t0x000BE004\n #define GLPCI_CNF2_CACHELINE_SIZE_M\t\tBIT(1)\n #define PF_FUNC_RID\t\t\t\t0x0009E880\n", "prefixes": [ "S37", "v3", "09/15" ] }