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GET /api/patches/1229718/?format=api
{ "id": 1229718, "url": "http://patchwork.ozlabs.org/api/patches/1229718/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20200127115831.18047-1-sasha.neftin@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20200127115831.18047-1-sasha.neftin@intel.com>", "list_archive_url": null, "date": "2020-01-27T11:58:31", "name": "[v1] igc: Add pcie error handler support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "03dfa23ff7553e9139e07d4653f6aaa4f319e4e1", "submitter": { "id": 69860, "url": "http://patchwork.ozlabs.org/api/people/69860/?format=api", "name": "Sasha Neftin", "email": "sasha.neftin@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20200127115831.18047-1-sasha.neftin@intel.com/mbox/", "series": [ { "id": 155432, "url": "http://patchwork.ozlabs.org/api/series/155432/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=155432", "date": "2020-01-27T11:58:31", "name": "[v1] igc: Add pcie error handler support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/155432/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1229718/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1229718/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org; spf=pass (sender SPF authorized)\n\tsmtp.mailfrom=osuosl.org (client-ip=140.211.166.138;\n\thelo=whitealder.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 485pDh0wNbz9sPW\n\tfor <incoming@patchwork.ozlabs.org>;\n\tMon, 27 Jan 2020 22:58:41 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 9767485404;\n\tMon, 27 Jan 2020 11:58:38 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id mDw2Kq9gsBo1; Mon, 27 Jan 2020 11:58:36 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 792A8838CD;\n\tMon, 27 Jan 2020 11:58:36 +0000 (UTC)", "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\tby ash.osuosl.org (Postfix) with ESMTP id 78F541BF3CA\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 27 Jan 2020 11:58:35 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 74CEF835CD\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 27 Jan 2020 11:58:35 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id lu3YxQQEWgRv for <intel-wired-lan@lists.osuosl.org>;\n\tMon, 27 Jan 2020 11:58:34 +0000 (UTC)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby fraxinus.osuosl.org (Postfix) with ESMTPS id 91AE6835AF\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 27 Jan 2020 11:58:34 +0000 (UTC)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t27 Jan 2020 03:58:33 -0800", "from ccdlinuxdev08.iil.intel.com ([143.185.161.150])\n\tby orsmga002.jf.intel.com with ESMTP; 27 Jan 2020 03:58:31 -0800" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.70,369,1574150400\"; d=\"scan'208\";a=\"246372346\"", "From": "Sasha Neftin <sasha.neftin@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Mon, 27 Jan 2020 13:58:31 +0200", "Message-Id": "<20200127115831.18047-1-sasha.neftin@intel.com>", "X-Mailer": "git-send-email 2.11.0", "Subject": "[Intel-wired-lan] [PATCH v1] igc: Add pcie error handler support", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "Add pcie error detection, slot reset and resume capability\n\nSigned-off-by: Sasha Neftin <sasha.neftin@intel.com>\n---\n drivers/net/ethernet/intel/igc/igc_main.c | 105 ++++++++++++++++++++++++++++++\n 1 file changed, 105 insertions(+)", "diff": "diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c\nindex fa72460e255a..b0656ae2fcb3 100644\n--- a/drivers/net/ethernet/intel/igc/igc_main.c\n+++ b/drivers/net/ethernet/intel/igc/igc_main.c\n@@ -5076,6 +5076,110 @@ static void igc_shutdown(struct pci_dev *pdev)\n \t}\n }\n \n+/**\n+ * igc_io_error_detected - called when PCI error is detected\n+ * @pdev: Pointer to PCI device\n+ * @state: The current pci connection state\n+ *\n+ * This function is called after a PCI bus error affecting\n+ * this device has been detected.\n+ **/\n+static pci_ers_result_t igc_io_error_detected(struct pci_dev *pdev,\n+\t\t\t\t\t pci_channel_state_t state)\n+{\n+\tstruct net_device *netdev = pci_get_drvdata(pdev);\n+\tstruct igc_adapter *adapter = netdev_priv(netdev);\n+\n+\tnetif_device_detach(netdev);\n+\n+\tif (state == pci_channel_io_perm_failure)\n+\t\treturn PCI_ERS_RESULT_DISCONNECT;\n+\n+\tif (netif_running(netdev))\n+\t\tigc_down(adapter);\n+\tpci_disable_device(pdev);\n+\n+\t/* Request a slot slot reset. */\n+\treturn PCI_ERS_RESULT_NEED_RESET;\n+}\n+\n+/**\n+ * igc_io_slot_reset - called after the pci bus has been reset.\n+ * @pdev: Pointer to PCI device\n+ *\n+ * Restart the card from scratch, as if from a cold-boot. Implementation\n+ * resembles the first-half of the igc_resume routine.\n+ **/\n+static pci_ers_result_t igc_io_slot_reset(struct pci_dev *pdev)\n+{\n+\tstruct net_device *netdev = pci_get_drvdata(pdev);\n+\tstruct igc_adapter *adapter = netdev_priv(netdev);\n+\tstruct igc_hw *hw = &adapter->hw;\n+\tpci_ers_result_t result;\n+\n+\tif (pci_enable_device_mem(pdev)) {\n+\t\tdev_err(&pdev->dev,\n+\t\t\t\"Cannot re-enable PCI device after reset.\\n\");\n+\t\tresult = PCI_ERS_RESULT_DISCONNECT;\n+\t} else {\n+\t\tpci_set_master(pdev);\n+\t\tpci_restore_state(pdev);\n+\t\tpci_save_state(pdev);\n+\n+\t\tpci_enable_wake(pdev, PCI_D3hot, 0);\n+\t\tpci_enable_wake(pdev, PCI_D3cold, 0);\n+\n+\t\t/* In case of PCI error, adapter lose its HW address\n+\t\t * so we should re-assign it here.\n+\t\t */\n+\t\thw->hw_addr = adapter->io_addr;\n+\n+\t\tigc_reset(adapter);\n+\t\twr32(IGC_WUS, ~0);\n+\t\tresult = PCI_ERS_RESULT_RECOVERED;\n+\t}\n+\n+\treturn result;\n+}\n+\n+/**\n+ * igc_io_resume - called when traffic can start flowing again.\n+ * @pdev: Pointer to PCI device\n+ *\n+ * This callback is called when the error recovery driver tells us that\n+ * its OK to resume normal operation. Implementation resembles the\n+ * second-half of the igc_resume routine.\n+ */\n+static void igc_io_resume(struct pci_dev *pdev)\n+{\n+\tstruct net_device *netdev = pci_get_drvdata(pdev);\n+\tstruct igc_adapter *adapter = netdev_priv(netdev);\n+\tu32 err = 0;\n+\n+\trtnl_lock();\n+\tif (netif_running(netdev)) {\n+\t\terr = igc_open(netdev);\n+\t\tif (err) {\n+\t\t\tdev_err(&pdev->dev, \"igic_open failed after reset\\n\");\n+\t\t\treturn;\n+\t\t}\n+\t}\n+\n+\tnetif_device_attach(netdev);\n+\n+\t/* let the f/w know that the h/w is now under the control of the\n+\t * driver.\n+\t */\n+\tigc_get_hw_control(adapter);\n+\trtnl_unlock();\n+}\n+\n+static const struct pci_error_handlers igc_err_handler = {\n+\t.error_detected = igc_io_error_detected,\n+\t.slot_reset = igc_io_slot_reset,\n+\t.resume = igc_io_resume,\n+};\n+\n #ifdef CONFIG_PM\n static const struct dev_pm_ops igc_pm_ops = {\n \tSET_SYSTEM_SLEEP_PM_OPS(igc_suspend, igc_resume)\n@@ -5093,6 +5197,7 @@ static struct pci_driver igc_driver = {\n \t.driver.pm = &igc_pm_ops,\n #endif\n \t.shutdown = igc_shutdown,\n+\t.err_handler = &igc_err_handler,\n };\n \n /**\n", "prefixes": [ "v1" ] }