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GET /api/patches/1222545/?format=api
{ "id": 1222545, "url": "http://patchwork.ozlabs.org/api/patches/1222545/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20200114075554.14538-1-sasha.neftin@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20200114075554.14538-1-sasha.neftin@intel.com>", "list_archive_url": null, "date": "2020-01-14T07:55:54", "name": "[v1] igc: Add dump options", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "4e7f31f8b5920d56166a72b2f91faf6e2a555c19", "submitter": { "id": 69860, "url": "http://patchwork.ozlabs.org/api/people/69860/?format=api", "name": "Sasha Neftin", "email": "sasha.neftin@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20200114075554.14538-1-sasha.neftin@intel.com/mbox/", "series": [ { "id": 152993, "url": "http://patchwork.ozlabs.org/api/series/152993/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=152993", "date": "2020-01-14T07:55:54", "name": "[v1] igc: Add dump options", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/152993/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1222545/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1222545/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org; spf=pass (sender SPF authorized)\n\tsmtp.mailfrom=osuosl.org (client-ip=140.211.166.136;\n\thelo=silver.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 47xjSh67x3z9sPn\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 14 Jan 2020 18:56:04 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id EF5A72048C;\n\tTue, 14 Jan 2020 07:56:02 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id bFtvOW0j2d-Q; Tue, 14 Jan 2020 07:56:00 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby silver.osuosl.org (Postfix) with ESMTP id 8AB0D203CE;\n\tTue, 14 Jan 2020 07:56:00 +0000 (UTC)", "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\tby ash.osuosl.org (Postfix) with ESMTP id 538DE1BF3BD\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 14 Jan 2020 07:55:59 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 4F073203CE\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 14 Jan 2020 07:55:59 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id QxEA8+DYI0DA for <intel-wired-lan@lists.osuosl.org>;\n\tTue, 14 Jan 2020 07:55:57 +0000 (UTC)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n\tby silver.osuosl.org (Postfix) with ESMTPS id 0A97520015\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 14 Jan 2020 07:55:56 +0000 (UTC)", "from fmsmga001.fm.intel.com ([10.253.24.23])\n\tby orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t13 Jan 2020 23:55:55 -0800", "from ccdlinuxdev08.iil.intel.com ([143.185.161.150])\n\tby fmsmga001.fm.intel.com with ESMTP; 13 Jan 2020 23:55:54 -0800" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.69,432,1571727600\"; d=\"scan'208\";a=\"247569503\"", "From": "Sasha Neftin <sasha.neftin@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Tue, 14 Jan 2020 09:55:54 +0200", "Message-Id": "<20200114075554.14538-1-sasha.neftin@intel.com>", "X-Mailer": "git-send-email 2.11.0", "Subject": "[Intel-wired-lan] [PATCH v1] igc: Add dump options", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "Placeholder for debugging functionality.\nIn this patch, we add some registers and rings summary dumps.\n\nSigned-off-by: Sasha Neftin <sasha.neftin@intel.com>\n---\n drivers/net/ethernet/intel/igc/Makefile | 2 +-\n drivers/net/ethernet/intel/igc/igc.h | 4 +\n drivers/net/ethernet/intel/igc/igc_defines.h | 3 +\n drivers/net/ethernet/intel/igc/igc_dump.c | 323 +++++++++++++++++++++++++++\n drivers/net/ethernet/intel/igc/igc_main.c | 2 +\n drivers/net/ethernet/intel/igc/igc_regs.h | 5 +\n 6 files changed, 338 insertions(+), 1 deletion(-)\n create mode 100644 drivers/net/ethernet/intel/igc/igc_dump.c", "diff": "diff --git a/drivers/net/ethernet/intel/igc/Makefile b/drivers/net/ethernet/intel/igc/Makefile\nindex 49fb1e1965cd..e3c164c12e10 100644\n--- a/drivers/net/ethernet/intel/igc/Makefile\n+++ b/drivers/net/ethernet/intel/igc/Makefile\n@@ -8,4 +8,4 @@\n obj-$(CONFIG_IGC) += igc.o\n \n igc-objs := igc_main.o igc_mac.o igc_i225.o igc_base.o igc_nvm.o igc_phy.o \\\n-igc_ethtool.o igc_ptp.o\n+igc_ethtool.o igc_ptp.o igc_dump.o\ndiff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/intel/igc/igc.h\nindex 52066bdbbad0..5d38d0faeced 100644\n--- a/drivers/net/ethernet/intel/igc/igc.h\n+++ b/drivers/net/ethernet/intel/igc/igc.h\n@@ -42,6 +42,10 @@ int igc_del_mac_steering_filter(struct igc_adapter *adapter,\n \t\t\t\tconst u8 *addr, u8 queue, u8 flags);\n void igc_update_stats(struct igc_adapter *adapter);\n \n+/* igc_dump declarations */\n+void igc_rings_dump(struct igc_adapter *adapter);\n+void igc_regs_dump(struct igc_adapter *adapter);\n+\n extern char igc_driver_name[];\n extern char igc_driver_version[];\n \ndiff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h\nindex 58efa7a02c68..3c03962bde5e 100644\n--- a/drivers/net/ethernet/intel/igc/igc_defines.h\n+++ b/drivers/net/ethernet/intel/igc/igc_defines.h\n@@ -259,6 +259,9 @@\n #define IGC_GPIE_EIAME\t\t0x40000000\n #define IGC_GPIE_PBA\t\t0x80000000\n \n+/* Receive Descriptor bit definitions */\n+#define IGC_RXD_STAT_DD\t\t0x01 /* Descriptor Done */\n+\n /* Transmit Descriptor bit definitions */\n #define IGC_TXD_DTYP_D\t\t0x00100000 /* Data Descriptor */\n #define IGC_TXD_DTYP_C\t\t0x00000000 /* Context Descriptor */\ndiff --git a/drivers/net/ethernet/intel/igc/igc_dump.c b/drivers/net/ethernet/intel/igc/igc_dump.c\nnew file mode 100644\nindex 000000000000..657ab50ae296\n--- /dev/null\n+++ b/drivers/net/ethernet/intel/igc/igc_dump.c\n@@ -0,0 +1,323 @@\n+// SPDX-License-Identifier: GPL-2.0\n+/* Copyright (c) 2018 Intel Corporation */\n+\n+#include \"igc.h\"\n+\n+struct igc_reg_info {\n+\tu32 ofs;\n+\tchar *name;\n+};\n+\n+static const struct igc_reg_info igc_reg_info_tbl[] = {\n+\t/* General Registers */\n+\t{IGC_CTRL, \"CTRL\"},\n+\t{IGC_STATUS, \"STATUS\"},\n+\t{IGC_CTRL_EXT, \"CTRL_EXT\"},\n+\t{IGC_MDIC, \"MDIC\"},\n+\n+\t/* Interrupt Registers */\n+\t{IGC_ICR, \"ICR\"},\n+\n+\t/* RX Registers */\n+\t{IGC_RCTL, \"RCTL\"},\n+\t{IGC_RDLEN(0), \"RDLEN\"},\n+\t{IGC_RDH(0), \"RDH\"},\n+\t{IGC_RDT(0), \"RDT\"},\n+\t{IGC_RXDCTL(0), \"RXDCTL\"},\n+\t{IGC_RDBAL(0), \"RDBAL\"},\n+\t{IGC_RDBAH(0), \"RDBAH\"},\n+\n+\t/* TX Registers */\n+\t{IGC_TCTL, \"TCTL\"},\n+\t{IGC_TDBAL(0), \"TDBAL\"},\n+\t{IGC_TDBAH(0), \"TDBAH\"},\n+\t{IGC_TDLEN(0), \"TDLEN\"},\n+\t{IGC_TDH(0), \"TDH\"},\n+\t{IGC_TDT(0), \"TDT\"},\n+\t{IGC_TXDCTL(0), \"TXDCTL\"},\n+\t{IGC_TDFH, \"TDFH\"},\n+\t{IGC_TDFT, \"TDFT\"},\n+\t{IGC_TDFHS, \"TDFHS\"},\n+\t{IGC_TDFPC, \"TDFPC\"},\n+\n+\t/* List Terminator */\n+\t{}\n+};\n+\n+/* igc_regdump - register printout routine */\n+static void igc_regdump(struct igc_hw *hw, struct igc_reg_info *reginfo)\n+{\n+\tint n = 0;\n+\tchar rname[16];\n+\tu32 regs[8];\n+\n+\tswitch (reginfo->ofs) {\n+\tcase IGC_RDLEN(0):\n+\t\tfor (n = 0; n < 4; n++)\n+\t\t\tregs[n] = rd32(IGC_RDLEN(n));\n+\t\tbreak;\n+\tcase IGC_RDH(0):\n+\t\tfor (n = 0; n < 4; n++)\n+\t\t\tregs[n] = rd32(IGC_RDH(n));\n+\t\tbreak;\n+\tcase IGC_RDT(0):\n+\t\tfor (n = 0; n < 4; n++)\n+\t\t\tregs[n] = rd32(IGC_RDT(n));\n+\t\tbreak;\n+\tcase IGC_RXDCTL(0):\n+\t\tfor (n = 0; n < 4; n++)\n+\t\t\tregs[n] = rd32(IGC_RXDCTL(n));\n+\t\tbreak;\n+\tcase IGC_RDBAL(0):\n+\t\tfor (n = 0; n < 4; n++)\n+\t\t\tregs[n] = rd32(IGC_RDBAL(n));\n+\t\tbreak;\n+\tcase IGC_RDBAH(0):\n+\t\tfor (n = 0; n < 4; n++)\n+\t\t\tregs[n] = rd32(IGC_RDBAH(n));\n+\t\tbreak;\n+\tcase IGC_TDBAL(0):\n+\t\tfor (n = 0; n < 4; n++)\n+\t\t\tregs[n] = rd32(IGC_RDBAL(n));\n+\t\tbreak;\n+\tcase IGC_TDBAH(0):\n+\t\tfor (n = 0; n < 4; n++)\n+\t\t\tregs[n] = rd32(IGC_TDBAH(n));\n+\t\tbreak;\n+\tcase IGC_TDLEN(0):\n+\t\tfor (n = 0; n < 4; n++)\n+\t\t\tregs[n] = rd32(IGC_TDLEN(n));\n+\t\tbreak;\n+\tcase IGC_TDH(0):\n+\t\tfor (n = 0; n < 4; n++)\n+\t\t\tregs[n] = rd32(IGC_TDH(n));\n+\t\tbreak;\n+\tcase IGC_TDT(0):\n+\t\tfor (n = 0; n < 4; n++)\n+\t\t\tregs[n] = rd32(IGC_TDT(n));\n+\t\tbreak;\n+\tcase IGC_TXDCTL(0):\n+\t\tfor (n = 0; n < 4; n++)\n+\t\t\tregs[n] = rd32(IGC_TXDCTL(n));\n+\t\tbreak;\n+\tdefault:\n+\t\tpr_info(\"%-15s %08x\\n\", reginfo->name, rd32(reginfo->ofs));\n+\t\treturn;\n+\t}\n+\n+\tsnprintf(rname, 16, \"%s%s\", reginfo->name, \"[0-3]\");\n+\tpr_info(\"%-15s %08x %08x %08x %08x\\n\", rname, regs[0], regs[1],\n+\t\tregs[2], regs[3]);\n+}\n+\n+/* igc_rings_dump - Tx-rings and Rx-rings */\n+void igc_rings_dump(struct igc_adapter *adapter)\n+{\n+\tstruct net_device *netdev = adapter->netdev;\n+\tstruct my_u0 { u64 a; u64 b; } *u0;\n+\tunion igc_adv_tx_desc *tx_desc;\n+\tunion igc_adv_rx_desc *rx_desc;\n+\tstruct igc_ring *tx_ring;\n+\tstruct igc_ring *rx_ring;\n+\tu32 staterr;\n+\tu16 i, n;\n+\n+\tif (!netif_msg_hw(adapter))\n+\t\treturn;\n+\n+\t/* Print netdevice Info */\n+\tif (netdev) {\n+\t\tdev_info(&adapter->pdev->dev, \"Net device Info\\n\");\n+\t\tpr_info(\"Device Name state trans_start\\n\");\n+\t\tpr_info(\"%-15s %016lX %016lX\\n\", netdev->name,\n+\t\t\tnetdev->state, dev_trans_start(netdev));\n+\t}\n+\n+\t/* Print TX Ring Summary */\n+\tif (!netdev || !netif_running(netdev))\n+\t\tgoto exit;\n+\n+\tdev_info(&adapter->pdev->dev, \"TX Rings Summary\\n\");\n+\tpr_info(\"Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\\n\");\n+\tfor (n = 0; n < adapter->num_tx_queues; n++) {\n+\t\tstruct igc_tx_buffer *buffer_info;\n+\n+\t\ttx_ring = adapter->tx_ring[n];\n+\t\tbuffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];\n+\n+\t\tpr_info(\" %5d %5X %5X %016llX %04X %p %016llX\\n\",\n+\t\t\tn, tx_ring->next_to_use, tx_ring->next_to_clean,\n+\t\t\t(u64)dma_unmap_addr(buffer_info, dma),\n+\t\t\tdma_unmap_len(buffer_info, len),\n+\t\t\tbuffer_info->next_to_watch,\n+\t\t\t(u64)buffer_info->time_stamp);\n+\t}\n+\n+\t/* Print TX Rings */\n+\tif (!netif_msg_tx_done(adapter))\n+\t\tgoto rx_ring_summary;\n+\n+\tdev_info(&adapter->pdev->dev, \"TX Rings Dump\\n\");\n+\n+\t/* Transmit Descriptor Formats\n+\t *\n+\t * Advanced Transmit Descriptor\n+\t * +--------------------------------------------------------------+\n+\t * 0 | Buffer Address [63:0] |\n+\t * +--------------------------------------------------------------+\n+\t * 8 | PAYLEN | PORTS |CC|IDX | STA | DCMD |DTYP|MAC|RSV| DTALEN |\n+\t * +--------------------------------------------------------------+\n+\t * 63 46 45 40 39 38 36 35 32 31 24 15 0\n+\t */\n+\n+\tfor (n = 0; n < adapter->num_tx_queues; n++) {\n+\t\ttx_ring = adapter->tx_ring[n];\n+\t\tpr_info(\"------------------------------------\\n\");\n+\t\tpr_info(\"TX QUEUE INDEX = %d\\n\", tx_ring->queue_index);\n+\t\tpr_info(\"------------------------------------\\n\");\n+\t\tpr_info(\"T [desc] [address 63:0 ] [PlPOCIStDDM Ln] [bi->dma ] leng ntw timestamp bi->skb\\n\");\n+\n+\t\tfor (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {\n+\t\t\tconst char *next_desc;\n+\t\t\tstruct igc_tx_buffer *buffer_info;\n+\n+\t\t\ttx_desc = IGC_TX_DESC(tx_ring, i);\n+\t\t\tbuffer_info = &tx_ring->tx_buffer_info[i];\n+\t\t\tu0 = (struct my_u0 *)tx_desc;\n+\t\t\tif (i == tx_ring->next_to_use &&\n+\t\t\t i == tx_ring->next_to_clean)\n+\t\t\t\tnext_desc = \" NTC/U\";\n+\t\t\telse if (i == tx_ring->next_to_use)\n+\t\t\t\tnext_desc = \" NTU\";\n+\t\t\telse if (i == tx_ring->next_to_clean)\n+\t\t\t\tnext_desc = \" NTC\";\n+\t\t\telse\n+\t\t\t\tnext_desc = \"\";\n+\n+\t\t\tpr_info(\"T [0x%03X] %016llX %016llX %016llX %04X %p %016llX %p%s\\n\",\n+\t\t\t\ti, le64_to_cpu(u0->a),\n+\t\t\t\tle64_to_cpu(u0->b),\n+\t\t\t\t(u64)dma_unmap_addr(buffer_info, dma),\n+\t\t\t\tdma_unmap_len(buffer_info, len),\n+\t\t\t\tbuffer_info->next_to_watch,\n+\t\t\t\t(u64)buffer_info->time_stamp,\n+\t\t\t\tbuffer_info->skb, next_desc);\n+\n+\t\t\tif (netif_msg_pktdata(adapter) && buffer_info->skb)\n+\t\t\t\tprint_hex_dump(KERN_INFO, \"\",\n+\t\t\t\t\t DUMP_PREFIX_ADDRESS,\n+\t\t\t\t\t 16, 1, buffer_info->skb->data,\n+\t\t\t\t\t dma_unmap_len(buffer_info, len),\n+\t\t\t\t\t true);\n+\t\t}\n+\t}\n+\n+\t/* Print RX Rings Summary */\n+rx_ring_summary:\n+\tdev_info(&adapter->pdev->dev, \"RX Rings Summary\\n\");\n+\tpr_info(\"Queue [NTU] [NTC]\\n\");\n+\tfor (n = 0; n < adapter->num_rx_queues; n++) {\n+\t\trx_ring = adapter->rx_ring[n];\n+\t\tpr_info(\" %5d %5X %5X\\n\",\n+\t\t\tn, rx_ring->next_to_use, rx_ring->next_to_clean);\n+\t}\n+\n+\t/* Print RX Rings */\n+\tif (!netif_msg_rx_status(adapter))\n+\t\tgoto exit;\n+\n+\tdev_info(&adapter->pdev->dev, \"RX Rings Dump\\n\");\n+\n+\t/* Advanced Receive Descriptor (Read) Format\n+\t * 63 1 0\n+\t * +-----------------------------------------------------+\n+\t * 0 | Packet Buffer Address [63:1] |A0/NSE|\n+\t * +----------------------------------------------+------+\n+\t * 8 | Header Buffer Address [63:1] | DD |\n+\t * +-----------------------------------------------------+\n+\t *\n+\t *\n+\t * Advanced Receive Descriptor (Write-Back) Format\n+\t *\n+\t * 63 48 47 32 31 30 21 20 17 16 4 3 0\n+\t * +------------------------------------------------------+\n+\t * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |\n+\t * | Checksum Ident | | | | Type | Type |\n+\t * +------------------------------------------------------+\n+\t * 8 | VLAN Tag | Length | Extended Error | Extended Status |\n+\t * +------------------------------------------------------+\n+\t * 63 48 47 32 31 20 19 0\n+\t */\n+\n+\tfor (n = 0; n < adapter->num_rx_queues; n++) {\n+\t\trx_ring = adapter->rx_ring[n];\n+\t\tpr_info(\"------------------------------------\\n\");\n+\t\tpr_info(\"RX QUEUE INDEX = %d\\n\", rx_ring->queue_index);\n+\t\tpr_info(\"------------------------------------\\n\");\n+\t\tpr_info(\"R [desc] [ PktBuf A0] [ HeadBuf DD] [bi->dma ] [bi->skb] <-- Adv Rx Read format\\n\");\n+\t\tpr_info(\"RWB[desc] [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\\n\");\n+\n+\t\tfor (i = 0; i < rx_ring->count; i++) {\n+\t\t\tconst char *next_desc;\n+\t\t\tstruct igc_rx_buffer *buffer_info;\n+\n+\t\t\tbuffer_info = &rx_ring->rx_buffer_info[i];\n+\t\t\trx_desc = IGC_RX_DESC(rx_ring, i);\n+\t\t\tu0 = (struct my_u0 *)rx_desc;\n+\t\t\tstaterr = le32_to_cpu(rx_desc->wb.upper.status_error);\n+\n+\t\t\tif (i == rx_ring->next_to_use)\n+\t\t\t\tnext_desc = \" NTU\";\n+\t\t\telse if (i == rx_ring->next_to_clean)\n+\t\t\t\tnext_desc = \" NTC\";\n+\t\t\telse\n+\t\t\t\tnext_desc = \"\";\n+\n+\t\t\tif (staterr & IGC_RXD_STAT_DD) {\n+\t\t\t\t/* Descriptor Done */\n+\t\t\t\tpr_info(\"%s[0x%03X] %016llX %016llX ---------------- %s\\n\",\n+\t\t\t\t\t\"RWB\", i,\n+\t\t\t\t\tle64_to_cpu(u0->a),\n+\t\t\t\t\tle64_to_cpu(u0->b),\n+\t\t\t\t\tnext_desc);\n+\t\t\t} else {\n+\t\t\t\tpr_info(\"%s[0x%03X] %016llX %016llX %016llX %s\\n\",\n+\t\t\t\t\t\"R \", i,\n+\t\t\t\t\tle64_to_cpu(u0->a),\n+\t\t\t\t\tle64_to_cpu(u0->b),\n+\t\t\t\t\t(u64)buffer_info->dma,\n+\t\t\t\t\tnext_desc);\n+\n+\t\t\t\tif (netif_msg_pktdata(adapter) &&\n+\t\t\t\t buffer_info->dma && buffer_info->page) {\n+\t\t\t\t\tprint_hex_dump(KERN_INFO, \"\",\n+\t\t\t\t\t\t DUMP_PREFIX_ADDRESS,\n+\t\t\t\t\t\t 16, 1,\n+\t\t\t\t\t\t page_address\n+\t\t\t\t\t\t (buffer_info->page) +\n+\t\t\t\t\t\t buffer_info->page_offset,\n+\t\t\t\t\t\t igc_rx_bufsz(rx_ring),\n+\t\t\t\t\t\t true);\n+\t\t\t\t}\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+exit:\n+\treturn;\n+}\n+\n+/* igc_regs_dump - registers dump */\n+void igc_regs_dump(struct igc_adapter *adapter)\n+{\n+\tstruct igc_hw *hw = &adapter->hw;\n+\tstruct igc_reg_info *reginfo;\n+\n+\t/* Print Registers */\n+\tdev_info(&adapter->pdev->dev, \"Register Dump\\n\");\n+\tpr_info(\" Register Name Value\\n\");\n+\tfor (reginfo = (struct igc_reg_info *)igc_reg_info_tbl;\n+\t reginfo->name; reginfo++) {\n+\t\tigc_regdump(hw, reginfo);\n+\t}\n+}\ndiff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c\nindex e7787c0929b2..08ed9796d088 100644\n--- a/drivers/net/ethernet/intel/igc/igc_main.c\n+++ b/drivers/net/ethernet/intel/igc/igc_main.c\n@@ -3546,6 +3546,8 @@ static void igc_reset_task(struct work_struct *work)\n \n \tadapter = container_of(work, struct igc_adapter, reset_task);\n \n+\tigc_rings_dump(adapter);\n+\tigc_regs_dump(adapter);\n \tnetdev_err(adapter->netdev, \"Reset adapter\\n\");\n \tigc_reinit_locked(adapter);\n }\ndiff --git a/drivers/net/ethernet/intel/igc/igc_regs.h b/drivers/net/ethernet/intel/igc/igc_regs.h\nindex 164c42b39dfa..09c1a54372d8 100644\n--- a/drivers/net/ethernet/intel/igc/igc_regs.h\n+++ b/drivers/net/ethernet/intel/igc/igc_regs.h\n@@ -17,6 +17,11 @@\n /* Internal Packet Buffer Size Registers */\n #define IGC_RXPBS\t\t0x02404 /* Rx Packet Buffer Size - RW */\n #define IGC_TXPBS\t\t0x03404 /* Tx Packet Buffer Size - RW */\n+#define IGC_TDFH\t\t0x03410 /* Tx Data FIFO Head - RW */\n+#define IGC_TDFT\t\t0x03418 /* Tx Data FIFO Tail - RW */\n+#define IGC_TDFHS\t\t0x03420 /* Tx Data FIFO Head Saved - RW */\n+#define IGC_TDFTS\t\t0x03428 /* Tx Data FIFO Tail Saved - RW */\n+#define IGC_TDFPC\t\t0x03430 /* Tx Data FIFO Packet Count - RW */\n \n /* NVM Register Descriptions */\n #define IGC_EERD\t\t0x12014 /* EEprom mode read - RW */\n", "prefixes": [ "v1" ] }