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GET /api/patches/1213095/?format=api
{ "id": 1213095, "url": "http://patchwork.ozlabs.org/api/patches/1213095/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/4907f35240ae77bba4a27fd32f1e586e00cd434d.1576745635.git.matti.vaittinen@fi.rohmeurope.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<4907f35240ae77bba4a27fd32f1e586e00cd434d.1576745635.git.matti.vaittinen@fi.rohmeurope.com>", "list_archive_url": null, "date": "2019-12-19T09:52:13", "name": "[v7,07/12] clk: bd718x7: Support ROHM BD71828 clk block", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "718f5861d2c621c560e6e79d21a25fd4538fb125", "submitter": { "id": 74146, "url": "http://patchwork.ozlabs.org/api/people/74146/?format=api", "name": "Matti Vaittinen", "email": "matti.vaittinen@fi.rohmeurope.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/4907f35240ae77bba4a27fd32f1e586e00cd434d.1576745635.git.matti.vaittinen@fi.rohmeurope.com/mbox/", "series": [ { "id": 149534, "url": "http://patchwork.ozlabs.org/api/series/149534/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=149534", "date": "2019-12-19T09:44:08", "name": "Support ROHM BD71828 PMIC", "version": 7, "mbox": "http://patchwork.ozlabs.org/series/149534/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1213095/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1213095/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-gpio-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org; spf=none (no SPF record)\n\tsmtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67;\n\thelo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dmarc=none (p=none dis=none)\n\theader.from=fi.rohmeurope.com" ], "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 47dnH14YKgz9sPn\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 19 Dec 2019 20:52:29 +1100 (AEDT)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1726692AbfLSJwY (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tThu, 19 Dec 2019 04:52:24 -0500", "from mail-lj1-f193.google.com ([209.85.208.193]:35576 \"EHLO\n\tmail-lj1-f193.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1726599AbfLSJwY (ORCPT\n\t<rfc822; linux-gpio@vger.kernel.org>); Thu, 19 Dec 2019 04:52:24 -0500", "by mail-lj1-f193.google.com with SMTP id j6so5517511lja.2;\n\tThu, 19 Dec 2019 01:52:21 -0800 (PST)", "from localhost.localdomain\n\t(dyt4gctb359myxd0pkwmt-4.rev.dnainternet.fi.\n\t[2001:14bb:430:5140:37cf:5409:8fcc:4495])\n\tby smtp.gmail.com with ESMTPSA id\n\ty7sm2478161ljj.58.2019.12.19.01.52.18\n\t(version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n\tThu, 19 Dec 2019 01:52:19 -0800 (PST)" ], "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-disposition:in-reply-to:user-agent;\n\tbh=iU4XGAsaq3/G2hvdMm5W0Ee+bjsQg5k9atppLiusKgg=;\n\tb=PITCqpEQL6Frkn24dw+6X2OWwLH+7KqC36CxohW8xqi5IbRFnSIdi89SRSojru5Mno\n\t9S2bgg5Y2Fs9wP8UuOW4lBlliY4pYWAd5eh2Lg9WqXY9YiVPA/YjKt/H86eKj3UXJoYZ\n\ttNuS04HklAnLR9bZR26I5+vvuHA54uRJcyiNTKCRA/elvh0uoMzNHVCLZ11GBlM9Qfrm\n\tLnRgDv0zOnthq0/HBItqgFH8jxvCAfKqcWtCqqCk3aFgpf7351VAqKz7Ml9B+MA8sOJ5\n\tR2ouFCru8tfoH8APNlpoZQs/eaTnwpHBdan+oZY/Ws1ihhfksDLl57QN5Yd12xNulxAm\n\tawUg==", "X-Gm-Message-State": "APjAAAWeG9Ma51c70ZV036Bb+8UzfOGIVuHWJdmnPoYwXmXrP5hzIEDX\n\tj/pYrvLv66WfWmkdqT9rqVY=", "X-Google-Smtp-Source": "APXvYqwbVnDRrFO7CunxzD3JERbXxyc20f1f8DJtM4sA0CB8GOgA7LRWol6W+/8I1EOnFnqdUtfgFA==", "X-Received": "by 2002:a2e:9196:: with SMTP id f22mr5384218ljg.18.1576749140715;\n\tThu, 19 Dec 2019 01:52:20 -0800 (PST)", "Date": "Thu, 19 Dec 2019 11:52:13 +0200", "From": "Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>", "To": "matti.vaittinen@fi.rohmeurope.com, mazziesaccount@gmail.com", "Cc": "Jacek Anaszewski <jacek.anaszewski@gmail.com>,\n\tPavel Machek <pavel@ucw.cz>, Dan Murphy <dmurphy@ti.com>,\n\tRob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>,\n\tLee Jones <lee.jones@linaro.org>,\n\tMichael Turquette <mturquette@baylibre.com>,\n\tStephen Boyd <sboyd@kernel.org>,\n\tLinus Walleij <linus.walleij@linaro.org>,\n\tBartosz Golaszewski <bgolaszewski@baylibre.com>,\n\tLiam Girdwood <lgirdwood@gmail.com>, Mark Brown <broonie@kernel.org>,\n\tAlessandro Zummo <a.zummo@towertech.it>,\n\tAlexandre Belloni <alexandre.belloni@bootlin.com>,\n\tlinux-leds@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,\n\tlinux-gpio@vger.kernel.org, linux-rtc@vger.kernel.org", "Subject": "[PATCH v7 07/12] clk: bd718x7: Support ROHM BD71828 clk block", "Message-ID": "<4907f35240ae77bba4a27fd32f1e586e00cd434d.1576745635.git.matti.vaittinen@fi.rohmeurope.com>", "References": "<cover.1576745635.git.matti.vaittinen@fi.rohmeurope.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=us-ascii", "Content-Disposition": "inline", "In-Reply-To": "<cover.1576745635.git.matti.vaittinen@fi.rohmeurope.com>", "User-Agent": "Mutt/1.12.1 (2019-06-15)", "Sender": "linux-gpio-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<linux-gpio.vger.kernel.org>", "X-Mailing-List": "linux-gpio@vger.kernel.org" }, "content": "BD71828GW is a single-chip power management IC for battery-powered portable\ndevices. Add support for controlling BD71828 clk using bd718x7 driver.\n\nSigned-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>\nAcked-for-MFD-by: Lee Jones <lee.jones@linaro.org>\n---\n\nNo changes since v6\n\n drivers/clk/Kconfig | 6 ++---\n drivers/clk/clk-bd718x7.c | 38 +++++++++++++++++++++++---------\n include/linux/mfd/rohm-bd70528.h | 6 -----\n include/linux/mfd/rohm-bd71828.h | 4 ----\n include/linux/mfd/rohm-bd718x7.h | 6 -----\n 5 files changed, 31 insertions(+), 29 deletions(-)", "diff": "diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig\nindex 45653a0e6ecd..ac5981ce2477 100644\n--- a/drivers/clk/Kconfig\n+++ b/drivers/clk/Kconfig\n@@ -305,10 +305,10 @@ config COMMON_CLK_MMP2\n \t Support for Marvell MMP2 and MMP3 SoC clocks\n \n config COMMON_CLK_BD718XX\n-\ttristate \"Clock driver for ROHM BD718x7 PMIC\"\n-\tdepends on MFD_ROHM_BD718XX || MFD_ROHM_BD70528\n+\ttristate \"Clock driver for 32K clk gates on ROHM PMICs\"\n+\tdepends on MFD_ROHM_BD718XX || MFD_ROHM_BD70528 || MFD_ROHM_BD71828\n \thelp\n-\t This driver supports ROHM BD71837, ROHM BD71847 and\n+\t This driver supports ROHM BD71837, ROHM BD71847, ROHM BD71828 and\n \t ROHM BD70528 PMICs clock gates.\n \n config COMMON_CLK_FIXED_MMIO\ndiff --git a/drivers/clk/clk-bd718x7.c b/drivers/clk/clk-bd718x7.c\nindex 33699ee1bdf3..b52e8d6f660c 100644\n--- a/drivers/clk/clk-bd718x7.c\n+++ b/drivers/clk/clk-bd718x7.c\n@@ -7,12 +7,25 @@\n #include <linux/err.h>\n #include <linux/platform_device.h>\n #include <linux/slab.h>\n-#include <linux/mfd/rohm-bd718x7.h>\n-#include <linux/mfd/rohm-bd70528.h>\n+#include <linux/mfd/rohm-generic.h>\n #include <linux/clk-provider.h>\n #include <linux/clkdev.h>\n #include <linux/regmap.h>\n \n+/* clk control registers */\n+/* BD70528 */\n+#define BD70528_REG_OUT32K\t0x2c\n+/* BD71828 */\n+#define BD71828_REG_OUT32K\t0x4B\n+/* BD71837 and BD71847 */\n+#define BD718XX_REG_OUT32K\t0x2E\n+\n+/*\n+ * BD71837, BD71847, BD70528 and BD71828 all use bit [0] to clk output control\n+ */\n+#define CLK_OUT_EN_MASK\t\tBIT(0)\n+\n+\n struct bd718xx_clk {\n \tstruct clk_hw hw;\n \tu8 reg;\n@@ -21,10 +34,8 @@ struct bd718xx_clk {\n \tstruct rohm_regmap_dev *mfd;\n };\n \n-static int bd71837_clk_set(struct clk_hw *hw, int status)\n+static int bd71837_clk_set(struct bd718xx_clk *c, unsigned int status)\n {\n-\tstruct bd718xx_clk *c = container_of(hw, struct bd718xx_clk, hw);\n-\n \treturn regmap_update_bits(c->mfd->regmap, c->reg, c->mask, status);\n }\n \n@@ -33,14 +44,16 @@ static void bd71837_clk_disable(struct clk_hw *hw)\n \tint rv;\n \tstruct bd718xx_clk *c = container_of(hw, struct bd718xx_clk, hw);\n \n-\trv = bd71837_clk_set(hw, 0);\n+\trv = bd71837_clk_set(c, 0);\n \tif (rv)\n \t\tdev_dbg(&c->pdev->dev, \"Failed to disable 32K clk (%d)\\n\", rv);\n }\n \n static int bd71837_clk_enable(struct clk_hw *hw)\n {\n-\treturn bd71837_clk_set(hw, 1);\n+\tstruct bd718xx_clk *c = container_of(hw, struct bd718xx_clk, hw);\n+\n+\treturn bd71837_clk_set(c, 0xffffffff);\n }\n \n static int bd71837_clk_is_enabled(struct clk_hw *hw)\n@@ -92,11 +105,15 @@ static int bd71837_clk_probe(struct platform_device *pdev)\n \tcase ROHM_CHIP_TYPE_BD71837:\n \tcase ROHM_CHIP_TYPE_BD71847:\n \t\tc->reg = BD718XX_REG_OUT32K;\n-\t\tc->mask = BD718XX_OUT32K_EN;\n+\t\tc->mask = CLK_OUT_EN_MASK;\n+\t\tbreak;\n+\tcase ROHM_CHIP_TYPE_BD71828:\n+\t\tc->reg = BD71828_REG_OUT32K;\n+\t\tc->mask = CLK_OUT_EN_MASK;\n \t\tbreak;\n \tcase ROHM_CHIP_TYPE_BD70528:\n-\t\tc->reg = BD70528_REG_CLK_OUT;\n-\t\tc->mask = BD70528_CLK_OUT_EN_MASK;\n+\t\tc->reg = BD70528_REG_OUT32K;\n+\t\tc->mask = CLK_OUT_EN_MASK;\n \t\tbreak;\n \tdefault:\n \t\tdev_err(&pdev->dev, \"Unknown clk chip\\n\");\n@@ -126,6 +143,7 @@ static const struct platform_device_id bd718x7_clk_id[] = {\n \t{ \"bd71837-clk\", ROHM_CHIP_TYPE_BD71837 },\n \t{ \"bd71847-clk\", ROHM_CHIP_TYPE_BD71847 },\n \t{ \"bd70528-clk\", ROHM_CHIP_TYPE_BD70528 },\n+\t{ \"bd71828-clk\", ROHM_CHIP_TYPE_BD71828 },\n \t{ },\n };\n MODULE_DEVICE_TABLE(platform, bd718x7_clk_id);\ndiff --git a/include/linux/mfd/rohm-bd70528.h b/include/linux/mfd/rohm-bd70528.h\nindex 1013e60c5b25..2ad2320d0a96 100644\n--- a/include/linux/mfd/rohm-bd70528.h\n+++ b/include/linux/mfd/rohm-bd70528.h\n@@ -89,10 +89,6 @@ struct bd70528_data {\n #define BD70528_REG_GPIO3_OUT\t0x52\n #define BD70528_REG_GPIO4_OUT\t0x54\n \n-/* clk control */\n-\n-#define BD70528_REG_CLK_OUT\t0x2c\n-\n /* RTC */\n \n #define BD70528_REG_RTC_COUNT_H\t\t0x2d\n@@ -309,8 +305,6 @@ enum {\n \n #define BD70528_GPIO_IN_STATE_BASE 1\n \n-#define BD70528_CLK_OUT_EN_MASK 0x1\n-\n /* RTC masks to mask out reserved bits */\n \n #define BD70528_MASK_RTC_SEC\t\t0x7f\ndiff --git a/include/linux/mfd/rohm-bd71828.h b/include/linux/mfd/rohm-bd71828.h\nindex eb0557eb5314..d013e03f742d 100644\n--- a/include/linux/mfd/rohm-bd71828.h\n+++ b/include/linux/mfd/rohm-bd71828.h\n@@ -183,9 +183,6 @@ enum {\n #define BD71828_REG_CHG_STATE\t\t0x65\n #define BD71828_REG_CHG_FULL\t\t0xd2\n \n-/* CLK */\n-#define BD71828_REG_OUT32K\t\t0x4B\n-\n /* LEDs */\n #define BD71828_REG_LED_CTRL\t\t0x4A\n #define BD71828_MASK_LED_AMBER\t\t0x80\n@@ -417,7 +414,6 @@ enum {\n #define BD71828_INT_RTC1_MASK\t\t\t\t0x2\n #define BD71828_INT_RTC2_MASK\t\t\t\t0x4\n \n-#define BD71828_OUT32K_EN\t\t\t\t0x1\n #define BD71828_OUT_TYPE_MASK\t\t\t\t0x2\n #define BD71828_OUT_TYPE_OPEN_DRAIN\t\t\t0x0\n #define BD71828_OUT_TYPE_CMOS\t\t\t\t0x2\ndiff --git a/include/linux/mfd/rohm-bd718x7.h b/include/linux/mfd/rohm-bd718x7.h\nindex 7f2dbde402a1..bee2474a8f9f 100644\n--- a/include/linux/mfd/rohm-bd718x7.h\n+++ b/include/linux/mfd/rohm-bd718x7.h\n@@ -191,12 +191,6 @@ enum {\n #define IRQ_ON_REQ\t\t0x02\n #define IRQ_STBY_REQ\t\t0x01\n \n-/* BD718XX_REG_OUT32K bits */\n-#define BD718XX_OUT32K_EN\t0x01\n-\n-/* BD7183XX gated clock rate */\n-#define BD718XX_CLK_RATE 32768\n-\n /* ROHM BD718XX irqs */\n enum {\n \tBD718XX_INT_STBY_REQ,\n", "prefixes": [ "v7", "07/12" ] }