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GET /api/patches/1208828/?format=api
{ "id": 1208828, "url": "http://patchwork.ozlabs.org/api/patches/1208828/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20191212111307.33566-8-anthony.l.nguyen@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20191212111307.33566-8-anthony.l.nguyen@intel.com>", "list_archive_url": null, "date": "2019-12-12T11:13:00", "name": "[S35,08/15] ice: Remove Rx flex descriptor programming", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "907ed9c6f972d00e285b9cbf72b7bf434f4d954f", "submitter": { "id": 68875, "url": "http://patchwork.ozlabs.org/api/people/68875/?format=api", "name": "Tony Nguyen", "email": "anthony.l.nguyen@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20191212111307.33566-8-anthony.l.nguyen@intel.com/mbox/", "series": [ { "id": 148167, "url": "http://patchwork.ozlabs.org/api/series/148167/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=148167", "date": "2019-12-12T11:13:03", "name": "[S35,01/15] ice: Support UDP segmentation offload", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/148167/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1208828/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1208828/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org; spf=pass (sender SPF authorized)\n\tsmtp.mailfrom=osuosl.org (client-ip=140.211.166.138;\n\thelo=whitealder.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 47Ykll4fXzz9sPL\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 13 Dec 2019 06:44:51 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id D3DBC881A5;\n\tThu, 12 Dec 2019 19:44:49 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id hi1pwRrWzcuK; Thu, 12 Dec 2019 19:44:46 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 0355888448;\n\tThu, 12 Dec 2019 19:44:45 +0000 (UTC)", "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\tby ash.osuosl.org (Postfix) with ESMTP id 422331BF9BD\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 12 Dec 2019 19:44:39 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 36D38881A5\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 12 Dec 2019 19:44:39 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 4c19HRxzE7Nu for <intel-wired-lan@lists.osuosl.org>;\n\tThu, 12 Dec 2019 19:44:38 +0000 (UTC)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n\tby whitealder.osuosl.org (Postfix) with ESMTPS id E024688440\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 12 Dec 2019 19:44:37 +0000 (UTC)", "from orsmga001.jf.intel.com ([10.7.209.18])\n\tby orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t12 Dec 2019 11:44:36 -0800", "from unknown (HELO localhost.jf.intel.com) ([10.166.244.174])\n\tby orsmga001.jf.intel.com with ESMTP; 12 Dec 2019 11:44:34 -0800" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.69,306,1571727600\"; d=\"scan'208\";a=\"296698855\"", "From": "Tony Nguyen <anthony.l.nguyen@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Thu, 12 Dec 2019 03:13:00 -0800", "Message-Id": "<20191212111307.33566-8-anthony.l.nguyen@intel.com>", "X-Mailer": "git-send-email 2.20.1", "In-Reply-To": "<20191212111307.33566-1-anthony.l.nguyen@intel.com>", "References": "<20191212111307.33566-1-anthony.l.nguyen@intel.com>", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [PATCH S35 08/15] ice: Remove Rx flex descriptor\n\tprogramming", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "From: Vignesh Sridhar <vignesh.sridhar@intel.com>\n\nRemove Rx flex descriptor metadata and flag programming; per specification\nthese registers cannot be written to as they are read only.\n\nSigned-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>\nSigned-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>\n---\n drivers/net/ethernet/intel/ice/ice_common.c | 104 ------------------\n .../net/ethernet/intel/ice/ice_hw_autogen.h | 9 --\n 2 files changed, 113 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c\nindex 28958c0a762a..86bf8b2ec51d 100644\n--- a/drivers/net/ethernet/intel/ice/ice_common.c\n+++ b/drivers/net/ethernet/intel/ice/ice_common.c\n@@ -7,25 +7,6 @@\n \n #define ICE_PF_RESET_WAIT_COUNT\t200\n \n-#define ICE_PROG_FLEX_ENTRY(hw, rxdid, mdid, idx) \\\n-\twr32((hw), GLFLXP_RXDID_FLX_WRD_##idx(rxdid), \\\n-\t ((ICE_RX_OPC_MDID << \\\n-\t GLFLXP_RXDID_FLX_WRD_##idx##_RXDID_OPCODE_S) & \\\n-\t GLFLXP_RXDID_FLX_WRD_##idx##_RXDID_OPCODE_M) | \\\n-\t (((mdid) << GLFLXP_RXDID_FLX_WRD_##idx##_PROT_MDID_S) & \\\n-\t GLFLXP_RXDID_FLX_WRD_##idx##_PROT_MDID_M))\n-\n-#define ICE_PROG_FLG_ENTRY(hw, rxdid, flg_0, flg_1, flg_2, flg_3, idx) \\\n-\twr32((hw), GLFLXP_RXDID_FLAGS(rxdid, idx), \\\n-\t (((flg_0) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_S) & \\\n-\t GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_M) | \\\n-\t (((flg_1) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_1_S) & \\\n-\t GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_1_M) | \\\n-\t (((flg_2) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_2_S) & \\\n-\t GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_2_M) | \\\n-\t (((flg_3) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_3_S) & \\\n-\t GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_3_M))\n-\n /**\n * ice_set_mac_type - Sets MAC type\n * @hw: pointer to the HW structure\n@@ -347,88 +328,6 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,\n \treturn 0;\n }\n \n-/**\n- * ice_init_flex_flags\n- * @hw: pointer to the hardware structure\n- * @prof_id: Rx Descriptor Builder profile ID\n- *\n- * Function to initialize Rx flex flags\n- */\n-static void ice_init_flex_flags(struct ice_hw *hw, enum ice_rxdid prof_id)\n-{\n-\tu8 idx = 0;\n-\n-\t/* Flex-flag fields (0-2) are programmed with FLG64 bits with layout:\n-\t * flexiflags0[5:0] - TCP flags, is_packet_fragmented, is_packet_UDP_GRE\n-\t * flexiflags1[3:0] - Not used for flag programming\n-\t * flexiflags2[7:0] - Tunnel and VLAN types\n-\t * 2 invalid fields in last index\n-\t */\n-\tswitch (prof_id) {\n-\t/* Rx flex flags are currently programmed for the NIC profiles only.\n-\t * Different flag bit programming configurations can be added per\n-\t * profile as needed.\n-\t */\n-\tcase ICE_RXDID_FLEX_NIC:\n-\tcase ICE_RXDID_FLEX_NIC_2:\n-\t\tICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_PKT_FRG,\n-\t\t\t\t ICE_FLG_UDP_GRE, ICE_FLG_PKT_DSI,\n-\t\t\t\t ICE_FLG_FIN, idx++);\n-\t\t/* flex flag 1 is not used for flexi-flag programming, skipping\n-\t\t * these four FLG64 bits.\n-\t\t */\n-\t\tICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_SYN, ICE_FLG_RST,\n-\t\t\t\t ICE_FLG_PKT_DSI, ICE_FLG_PKT_DSI, idx++);\n-\t\tICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_PKT_DSI,\n-\t\t\t\t ICE_FLG_PKT_DSI, ICE_FLG_EVLAN_x8100,\n-\t\t\t\t ICE_FLG_EVLAN_x9100, idx++);\n-\t\tICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_VLAN_x8100,\n-\t\t\t\t ICE_FLG_TNL_VLAN, ICE_FLG_TNL_MAC,\n-\t\t\t\t ICE_FLG_TNL0, idx++);\n-\t\tICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_TNL1, ICE_FLG_TNL2,\n-\t\t\t\t ICE_FLG_PKT_DSI, ICE_FLG_PKT_DSI, idx);\n-\t\tbreak;\n-\n-\tdefault:\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"Flag programming for profile ID %d not supported\\n\",\n-\t\t\t prof_id);\n-\t}\n-}\n-\n-/**\n- * ice_init_flex_flds\n- * @hw: pointer to the hardware structure\n- * @prof_id: Rx Descriptor Builder profile ID\n- *\n- * Function to initialize flex descriptors\n- */\n-static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id)\n-{\n-\tenum ice_flex_rx_mdid mdid;\n-\n-\tswitch (prof_id) {\n-\tcase ICE_RXDID_FLEX_NIC:\n-\tcase ICE_RXDID_FLEX_NIC_2:\n-\t\tICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_HASH_LOW, 0);\n-\t\tICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_HASH_HIGH, 1);\n-\t\tICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_FLOW_ID_LOWER, 2);\n-\n-\t\tmdid = (prof_id == ICE_RXDID_FLEX_NIC_2) ?\n-\t\t\tICE_RX_MDID_SRC_VSI : ICE_RX_MDID_FLOW_ID_HIGH;\n-\n-\t\tICE_PROG_FLEX_ENTRY(hw, prof_id, mdid, 3);\n-\n-\t\tice_init_flex_flags(hw, prof_id);\n-\t\tbreak;\n-\n-\tdefault:\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"Field init for profile ID %d not supported\\n\",\n-\t\t\t prof_id);\n-\t}\n-}\n-\n /**\n * ice_init_fltr_mgmt_struct - initializes filter management list and locks\n * @hw: pointer to the HW struct\n@@ -882,9 +781,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw)\n \n \tif (status)\n \t\tgoto err_unroll_fltr_mgmt_struct;\n-\n-\tice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC);\n-\tice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC_2);\n \tstatus = ice_init_hw_tbls(hw);\n \tif (status)\n \t\tgoto err_unroll_fltr_mgmt_struct;\ndiff --git a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h\nindex bf9743c970fe..b2502c7fd6ed 100644\n--- a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h\n+++ b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h\n@@ -61,15 +61,6 @@\n #define PRTDCB_TUP2TC\t\t\t\t0x001D26C0\n #define GL_PREEXT_L2_PMASK0(_i)\t\t\t(0x0020F0FC + ((_i) * 4))\n #define GL_PREEXT_L2_PMASK1(_i)\t\t\t(0x0020F108 + ((_i) * 4))\n-#define GLFLXP_RXDID_FLAGS(_i, _j)\t\t(0x0045D000 + ((_i) * 4 + (_j) * 256))\n-#define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_S\t0\n-#define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_M\tICE_M(0x3F, 0)\n-#define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_1_S\t8\n-#define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_1_M\tICE_M(0x3F, 8)\n-#define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_2_S\t16\n-#define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_2_M\tICE_M(0x3F, 16)\n-#define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_3_S\t24\n-#define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_3_M\tICE_M(0x3F, 24)\n #define GLFLXP_RXDID_FLX_WRD_0(_i)\t\t(0x0045c800 + ((_i) * 4))\n #define GLFLXP_RXDID_FLX_WRD_0_PROT_MDID_S\t0\n #define GLFLXP_RXDID_FLX_WRD_0_PROT_MDID_M\tICE_M(0xFF, 0)\n", "prefixes": [ "S35", "08/15" ] }