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GET /api/patches/1193544/?format=api
{ "id": 1193544, "url": "http://patchwork.ozlabs.org/api/patches/1193544/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20191112133312.21945-1-sasha.neftin@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20191112133312.21945-1-sasha.neftin@intel.com>", "list_archive_url": null, "date": "2019-11-12T13:33:12", "name": "[v1] igc: Add legacy power management support", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "82739acd8707aa2f8ac1a9ff449efada1c635d04", "submitter": { "id": 69860, "url": "http://patchwork.ozlabs.org/api/people/69860/?format=api", "name": "Sasha Neftin", "email": "sasha.neftin@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20191112133312.21945-1-sasha.neftin@intel.com/mbox/", "series": [ { "id": 142321, "url": "http://patchwork.ozlabs.org/api/series/142321/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=142321", "date": "2019-11-12T13:33:12", "name": "[v1] igc: Add legacy power management support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/142321/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1193544/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1193544/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org; spf=pass (sender SPF authorized)\n\tsmtp.mailfrom=osuosl.org (client-ip=140.211.166.138;\n\thelo=whitealder.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 47C7wz09Ktz9sNT\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 13 Nov 2019 00:33:22 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 24231855F1;\n\tTue, 12 Nov 2019 13:33:20 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 5S4ZvsidSaVd; Tue, 12 Nov 2019 13:33:18 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 75B8C86030;\n\tTue, 12 Nov 2019 13:33:18 +0000 (UTC)", "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\tby ash.osuosl.org (Postfix) with ESMTP id 7D8981BF295\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 12 Nov 2019 13:33:17 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 6FC3E86030\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 12 Nov 2019 13:33:17 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id Oxzj2CnWeeD8 for <intel-wired-lan@lists.osuosl.org>;\n\tTue, 12 Nov 2019 13:33:14 +0000 (UTC)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n\tby whitealder.osuosl.org (Postfix) with ESMTPS id 96F74855F1\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 12 Nov 2019 13:33:14 +0000 (UTC)", "from fmsmga004.fm.intel.com ([10.253.24.48])\n\tby fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t12 Nov 2019 05:33:14 -0800", "from ccdlinuxdev08.iil.intel.com ([143.185.161.150])\n\tby fmsmga004.fm.intel.com with ESMTP; 12 Nov 2019 05:33:13 -0800" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.68,296,1569308400\"; d=\"scan'208\";a=\"229392679\"", "From": "Sasha Neftin <sasha.neftin@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Tue, 12 Nov 2019 15:33:12 +0200", "Message-Id": "<20191112133312.21945-1-sasha.neftin@intel.com>", "X-Mailer": "git-send-email 2.11.0", "Subject": "[Intel-wired-lan] [PATCH v1] igc: Add legacy power management\n\tsupport", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "Add suspend, resume, runtime_suspend, runtime_resume and\nruntime_idle callbacks implementation.\n\nSigned-off-by: Sasha Neftin <sasha.neftin@intel.com>\n---\n drivers/net/ethernet/intel/igc/igc.h | 2 +\n drivers/net/ethernet/intel/igc/igc_defines.h | 31 +++++\n drivers/net/ethernet/intel/igc/igc_main.c | 200 +++++++++++++++++++++++++++\n drivers/net/ethernet/intel/igc/igc_regs.h | 9 ++\n 4 files changed, 242 insertions(+)", "diff": "diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/intel/igc/igc.h\nindex 0868677d43ed..612fe9ec81a4 100644\n--- a/drivers/net/ethernet/intel/igc/igc.h\n+++ b/drivers/net/ethernet/intel/igc/igc.h\n@@ -370,6 +370,8 @@ struct igc_adapter {\n \tstruct timer_list dma_err_timer;\n \tstruct timer_list phy_info_timer;\n \n+\tu32 wol;\n+\tu32 en_mng_pt;\n \tu16 link_speed;\n \tu16 link_duplex;\n \ndiff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h\nindex f3788f0b95b4..50dffd5db606 100644\n--- a/drivers/net/ethernet/intel/igc/igc_defines.h\n+++ b/drivers/net/ethernet/intel/igc/igc_defines.h\n@@ -10,6 +10,37 @@\n \n #define IGC_CTRL_EXT_DRV_LOAD\t0x10000000 /* Drv loaded bit for FW */\n \n+/* Definitions for power management and wakeup registers */\n+/* Wake Up Control */\n+#define IGC_WUC_PME_EN\t0x00000002 /* PME Enable */\n+\n+/* Wake Up Filter Control */\n+#define IGC_WUFC_LNKC\t0x00000001 /* Link Status Change Wakeup Enable */\n+#define IGC_WUFC_MC\t0x00000008 /* Directed Multicast Wakeup Enable */\n+\n+#define IGC_CTRL_ADVD3WUC\t0x00100000 /* D3 WUC */\n+\n+/* Wake Up Status */\n+#define IGC_WUS_EX\t0x00000004 /* Directed Exact */\n+#define IGC_WUS_ARPD\t0x00000020 /* Directed ARP Request */\n+#define IGC_WUS_IPV4\t0x00000040 /* Directed IPv4 */\n+#define IGC_WUS_IPV6\t0x00000080 /* Directed IPv6 */\n+#define IGC_WUS_NSD\t0x00000400 /* Directed IPv6 Neighbor Solicitation */\n+\n+/* Packet types that are enabled for wake packet delivery */\n+#define WAKE_PKT_WUS ( \\\n+\tIGC_WUS_EX | \\\n+\tIGC_WUS_ARPD | \\\n+\tIGC_WUS_IPV4 | \\\n+\tIGC_WUS_IPV6 | \\\n+\tIGC_WUS_NSD)\n+\n+/* Wake Up Packet Length */\n+#define IGC_WUPL_MASK\t0x00000FFF\n+\n+/* Wake Up Packet Memory stores the first 128 bytes of the wake up packet */\n+#define IGC_WUPM_BYTES\t128\n+\n /* Physical Func Reset Done Indication */\n #define IGC_CTRL_EXT_LINK_MODE_MASK\t0x00C00000\n \ndiff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c\nindex 833770fd16d2..5d3023ea8a44 100644\n--- a/drivers/net/ethernet/intel/igc/igc_main.c\n+++ b/drivers/net/ethernet/intel/igc/igc_main.c\n@@ -8,6 +8,7 @@\n #include <linux/tcp.h>\n #include <linux/udp.h>\n #include <linux/ip.h>\n+#include <linux/pm_runtime.h>\n \n #include <net/ipv6.h>\n \n@@ -4574,11 +4575,210 @@ static void igc_remove(struct pci_dev *pdev)\n \tpci_disable_device(pdev);\n }\n \n+static int __igc_shutdown(struct pci_dev *pdev, bool *enable_wake,\n+\t\t\t bool runtime)\n+{\n+\tstruct net_device *netdev = pci_get_drvdata(pdev);\n+\tstruct igc_adapter *adapter = netdev_priv(netdev);\n+\tstruct igc_hw *hw = &adapter->hw;\n+\tu32 ctrl, rctl, status;\n+\tu32 wufc = runtime ? IGC_WUFC_LNKC : adapter->wol;\n+\tbool wake;\n+\n+\trtnl_lock();\n+\tnetif_device_detach(netdev);\n+\n+\tif (netif_running(netdev))\n+\t\t__igc_close(netdev, true);\n+\n+\tigc_clear_interrupt_scheme(adapter);\n+\trtnl_unlock();\n+\n+\tstatus = rd32(IGC_STATUS);\n+\tif (status & IGC_STATUS_LU)\n+\t\twufc &= ~IGC_WUFC_LNKC;\n+\n+\tif (wufc) {\n+\t\tigc_setup_rctl(adapter);\n+\t\tigc_set_rx_mode(netdev);\n+\n+\t\t/* turn on all-multi mode if wake on multicast is enabled */\n+\t\tif (wufc & IGC_WUFC_MC) {\n+\t\t\trctl = rd32(IGC_RCTL);\n+\t\t\trctl |= IGC_RCTL_MPE;\n+\t\t\twr32(IGC_RCTL, rctl);\n+\t\t}\n+\n+\t\tctrl = rd32(IGC_CTRL);\n+\t\tctrl |= IGC_CTRL_ADVD3WUC;\n+\t\twr32(IGC_CTRL, ctrl);\n+\n+\t\t/* Allow time for pending master requests to run */\n+\t\tigc_disable_pcie_master(hw);\n+\n+\t\twr32(IGC_WUC, IGC_WUC_PME_EN);\n+\t\twr32(IGC_WUFC, wufc);\n+\t} else {\n+\t\twr32(IGC_WUC, 0);\n+\t\twr32(IGC_WUFC, 0);\n+\t}\n+\n+\twake = wufc || adapter->en_mng_pt;\n+\tif (!wake)\n+\t\tigc_power_down_link(adapter);\n+\telse\n+\t\tigc_power_up_link(adapter);\n+\n+\tif (enable_wake)\n+\t\t*enable_wake = wake;\n+\n+\t/* Release control of h/w to f/w. If f/w is AMT enabled, this\n+\t * would have already happened in close and is redundant.\n+\t */\n+\tigc_release_hw_control(adapter);\n+\n+\tpci_disable_device(pdev);\n+\n+\treturn 0;\n+}\n+\n+static int __maybe_unused igc_runtime_suspend(struct device *dev)\n+{\n+\treturn __igc_shutdown(to_pci_dev(dev), NULL, 1);\n+}\n+\n+static void igc_deliver_wake_packet(struct net_device *netdev)\n+{\n+\tstruct igc_adapter *adapter = netdev_priv(netdev);\n+\tstruct igc_hw *hw = &adapter->hw;\n+\tstruct sk_buff *skb;\n+\tu32 wupl;\n+\n+\twupl = rd32(IGC_WUPL) & IGC_WUPL_MASK;\n+\n+\t/* WUPM stores only the first 128 bytes of the wake packet.\n+\t * Read the packet only if we have the whole thing.\n+\t */\n+\tif (wupl == 0 || wupl > IGC_WUPM_BYTES)\n+\t\treturn;\n+\n+\tskb = netdev_alloc_skb_ip_align(netdev, IGC_WUPM_BYTES);\n+\tif (!skb)\n+\t\treturn;\n+\n+\tskb_put(skb, wupl);\n+\n+\t/* Ensure reads are 32-bit aligned */\n+\twupl = roundup(wupl, 4);\n+\n+\tmemcpy_fromio(skb->data, hw->hw_addr + IGC_WUPM_REG(0), wupl);\n+\n+\tskb->protocol = eth_type_trans(skb, netdev);\n+\tnetif_rx(skb);\n+}\n+\n+static int __maybe_unused igc_resume(struct device *dev)\n+{\n+\tstruct pci_dev *pdev = to_pci_dev(dev);\n+\tstruct net_device *netdev = pci_get_drvdata(pdev);\n+\tstruct igc_adapter *adapter = netdev_priv(netdev);\n+\tstruct igc_hw *hw = &adapter->hw;\n+\tu32 err, val;\n+\n+\tpci_set_power_state(pdev, PCI_D0);\n+\tpci_restore_state(pdev);\n+\tpci_save_state(pdev);\n+\n+\tif (!pci_device_is_present(pdev))\n+\t\treturn -ENODEV;\n+\terr = pci_enable_device_mem(pdev);\n+\tif (err) {\n+\t\tdev_err(&pdev->dev,\n+\t\t\t\"igc: Cannot enable PCI device from suspend\\n\");\n+\t\treturn err;\n+\t}\n+\tpci_set_master(pdev);\n+\n+\tpci_enable_wake(pdev, PCI_D3hot, 0);\n+\tpci_enable_wake(pdev, PCI_D3cold, 0);\n+\n+\tif (igc_init_interrupt_scheme(adapter, true)) {\n+\t\tdev_err(&pdev->dev, \"Unable to allocate memory for queues\\n\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tigc_reset(adapter);\n+\n+\t/* let the f/w know that the h/w is now under the control of the\n+\t * driver.\n+\t */\n+\tigc_get_hw_control(adapter);\n+\n+\tval = rd32(IGC_WUS);\n+\tif (val & WAKE_PKT_WUS)\n+\t\tigc_deliver_wake_packet(netdev);\n+\n+\twr32(IGC_WUS, ~0);\n+\n+\trtnl_lock();\n+\tif (!err && netif_running(netdev))\n+\t\terr = __igc_open(netdev, true);\n+\n+\tif (!err)\n+\t\tnetif_device_attach(netdev);\n+\trtnl_unlock();\n+\n+\treturn err;\n+}\n+\n+static int __maybe_unused igc_runtime_resume(struct device *dev)\n+{\n+\treturn igc_resume(dev);\n+}\n+\n+static int __maybe_unused igc_suspend(struct device *dev)\n+{\n+\treturn __igc_shutdown(to_pci_dev(dev), NULL, 0);\n+}\n+\n+static int __maybe_unused igc_runtime_idle(struct device *dev)\n+{\n+\tstruct net_device *netdev = dev_get_drvdata(dev);\n+\tstruct igc_adapter *adapter = netdev_priv(netdev);\n+\n+\tif (!igc_has_link(adapter))\n+\t\tpm_schedule_suspend(dev, MSEC_PER_SEC * 5);\n+\n+\treturn -EBUSY;\n+}\n+\n+static void igc_shutdown(struct pci_dev *pdev)\n+{\n+\tbool wake;\n+\n+\t__igc_shutdown(pdev, &wake, 0);\n+\n+\tif (system_state == SYSTEM_POWER_OFF) {\n+\t\tpci_wake_from_d3(pdev, wake);\n+\t\tpci_set_power_state(pdev, PCI_D3hot);\n+\t}\n+}\n+\n+static const struct dev_pm_ops igc_pm_ops = {\n+\tSET_SYSTEM_SLEEP_PM_OPS(igc_suspend, igc_resume)\n+\tSET_RUNTIME_PM_OPS(igc_runtime_suspend, igc_runtime_resume,\n+\t\t\t igc_runtime_idle)\n+};\n+\n static struct pci_driver igc_driver = {\n \t.name = igc_driver_name,\n \t.id_table = igc_pci_tbl,\n \t.probe = igc_probe,\n \t.remove = igc_remove,\n+#ifdef CONFIG_PM\n+\t.driver.pm = &igc_pm_ops,\n+#endif\n+\t.shutdown = igc_shutdown,\n };\n \n void igc_set_flag_queue_pairs(struct igc_adapter *adapter,\ndiff --git a/drivers/net/ethernet/intel/igc/igc_regs.h b/drivers/net/ethernet/intel/igc/igc_regs.h\nindex 50d7c04dccf5..93a9139f08c5 100644\n--- a/drivers/net/ethernet/intel/igc/igc_regs.h\n+++ b/drivers/net/ethernet/intel/igc/igc_regs.h\n@@ -215,6 +215,15 @@\n /* Shadow Ram Write Register - RW */\n #define IGC_SRWR\t0x12018\n \n+/* Wake Up registers */\n+#define IGC_WUC\t\t0x05800 /* Wakeup Control - RW */\n+#define IGC_WUFC\t0x05808 /* Wakeup Filter Control - RW */\n+#define IGC_WUS\t\t0x05810 /* Wakeup Status - R/W1C */\n+#define IGC_WUPL\t0x05900 /* Wakeup Packet Length - RW */\n+\n+/* Wake Up packet memory */\n+#define IGC_WUPM_REG(_i)\t(0x05A00 + ((_i) * 4))\n+\n /* forward declaration */\n struct igc_hw;\n u32 igc_rd32(struct igc_hw *hw, u32 reg);\n", "prefixes": [ "v1" ] }