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GET /api/patches/1191925/?format=api
{ "id": 1191925, "url": "http://patchwork.ozlabs.org/api/patches/1191925/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20191108130123.6839-27-linux@rasmusvillemoes.dk/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20191108130123.6839-27-linux@rasmusvillemoes.dk>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20191108130123.6839-27-linux@rasmusvillemoes.dk/", "date": "2019-11-08T13:01:02", "name": "[v4,26/47] soc: fsl: move cpm.h from powerpc/include/asm to include/soc/fsl", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": false, "hash": "d3d05d0906817add3f32cd4738cfcb6815cec964", "submitter": { "id": 27394, "url": "http://patchwork.ozlabs.org/api/people/27394/?format=api", "name": "Rasmus Villemoes", "email": "linux@rasmusvillemoes.dk" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20191108130123.6839-27-linux@rasmusvillemoes.dk/mbox/", "series": [ { "id": 141654, "url": "http://patchwork.ozlabs.org/api/series/141654/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=141654", "date": "2019-11-08T13:00:38", "name": "QUICC Engine support on ARM and ARM64", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/141654/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1191925/comments/", "check": "warning", "checks": "http://patchwork.ozlabs.org/api/patches/1191925/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\tkey-exchange X25519 server-signature RSA-PSS (4096 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 478jY33dLCz9s4Y\n\tfor <patchwork-incoming@ozlabs.org>;\n\tSat, 9 Nov 2019 01:37:43 +1100 (AEDT)", "from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 478jY31Jc6zF7KM\n\tfor <patchwork-incoming@ozlabs.org>;\n\tSat, 9 Nov 2019 01:37:43 +1100 (AEDT)", "from mail-lj1-x242.google.com (mail-lj1-x242.google.com\n\t[IPv6:2a00:1450:4864:20::242])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\tkey-exchange X25519 server-signature RSA-PSS (2048 bits)\n\tserver-digest SHA256) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 478gQh5S7vzF6vT\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tSat, 9 Nov 2019 00:02:04 +1100 (AEDT)", "by mail-lj1-x242.google.com with SMTP id t5so6157033ljk.0\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tFri, 08 Nov 2019 05:02:04 -0800 (PST)", "from prevas-ravi.prevas.se ([81.216.59.226])\n\tby smtp.gmail.com with ESMTPSA id\n\td28sm2454725lfn.33.2019.11.08.05.01.59\n\t(version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n\tFri, 08 Nov 2019 05:02:00 -0800 (PST)" ], "Authentication-Results": [ "ozlabs.org; dmarc=none (p=none dis=none)\n\theader.from=rasmusvillemoes.dk", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=rasmusvillemoes.dk header.i=@rasmusvillemoes.dk\n\theader.b=\"TGHGF61o\"; dkim-atps=neutral", "lists.ozlabs.org; spf=pass (sender SPF authorized)\n\tsmtp.mailfrom=rasmusvillemoes.dk (client-ip=2a00:1450:4864:20::242;\n\thelo=mail-lj1-x242.google.com; envelope-from=linux@rasmusvillemoes.dk;\n\treceiver=<UNKNOWN>)", "lists.ozlabs.org; dmarc=none (p=none dis=none)\n\theader.from=rasmusvillemoes.dk", "lists.ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=rasmusvillemoes.dk header.i=@rasmusvillemoes.dk\n\theader.b=\"TGHGF61o\"; dkim-atps=neutral" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=rasmusvillemoes.dk; s=google;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references\n\t:mime-version:content-transfer-encoding;\n\tbh=kflmqvkrnbAdjtigGqKs8mrz9iivtun3aqewA1JiMFE=;\n\tb=TGHGF61osdTEgPuFhw4TYWMZ9pw0ZW8qNZZOCisVRZq0yBDV2RV4eLjDBBTQm6mF+p\n\t2oZtlcxJGEhp3x8xeuLtPvsevFAbInwTWTvcwEer+qGiNi5WUP2xog/vL0SOeIVy2EDD\n\tPkvp3MGEGrWDxNH1QFB6iE8D4YYPdhvtDumq8=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:mime-version:content-transfer-encoding;\n\tbh=kflmqvkrnbAdjtigGqKs8mrz9iivtun3aqewA1JiMFE=;\n\tb=L7iur2dtdfkaBaCspIf3uA0OpucpB/1I0T06kQrFslkmnHk3Lk53ua8tY/NjdikGfA\n\tTW/oHV1xonLWSOXg3v/hj2jK9ynis43l6QhJrcV/LN/tl6IVE4W7RkR/fxjbdmh4iLrB\n\tJAWVi5+KAgRP9vWMB1dm5t/DfEVDMR8S821m6FsuGba4YDDlrFRDAtsHLlfZTti5gpzd\n\tTLI6e/4mDVKEFH09QosF+mvSgXtBgSH9XB43o+XOKO9kt3KoLHnxLCqADGQ4li7VjR44\n\tsICDPX6aS6abc+hs9fXo50r2skUrIpjWY21yuIa0XV2U84SOQrQZDmnGW7VsQpwU8Mnc\n\tylMA==", "X-Gm-Message-State": "APjAAAXM/Jc1ja580qjBrX2bKMYPsnAc6PHvtKm7gB3+QgzmsfewCHVn\n\txan++PGI1Jf1q4woU8v62yoV8g==", "X-Google-Smtp-Source": "APXvYqzoqn2vsRSI/gMtkT/kP4DeMqWqmdEeC2ghYpxbCPgNC+MaTwz5gZnyRHVXbYk2acqJ08XP+Q==", "X-Received": "by 2002:a2e:7c12:: with SMTP id\n\tx18mr6891744ljc.130.1573218120935; \n\tFri, 08 Nov 2019 05:02:00 -0800 (PST)", "From": "Rasmus Villemoes <linux@rasmusvillemoes.dk>", "To": "Qiang Zhao <qiang.zhao@nxp.com>, Li Yang <leoyang.li@nxp.com>,\n\tChristophe Leroy <christophe.leroy@c-s.fr>", "Subject": "[PATCH v4 26/47] soc: fsl: move cpm.h from powerpc/include/asm to\n\tinclude/soc/fsl", "Date": "Fri, 8 Nov 2019 14:01:02 +0100", "Message-Id": "<20191108130123.6839-27-linux@rasmusvillemoes.dk>", "X-Mailer": "git-send-email 2.23.0", "In-Reply-To": "<20191108130123.6839-1-linux@rasmusvillemoes.dk>", "References": "<20191108130123.6839-1-linux@rasmusvillemoes.dk>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "Scott Wood <oss@buserror.net>,\n\tRasmus Villemoes <linux@rasmusvillemoes.dk>, \n\tlinuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "Some drivers, e.g. ucc_uart, need definitions from cpm.h. In order to\nallow building those drivers for non-ppc based SOCs, move the header\nto include/soc/fsl. For now, leave a trivial wrapper at the old\nlocation so drivers can be updated one by one.\n\nSigned-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>\n---\n arch/powerpc/include/asm/cpm.h | 172 +--------------------------------\n include/soc/fsl/cpm.h | 171 ++++++++++++++++++++++++++++++++\n 2 files changed, 172 insertions(+), 171 deletions(-)\n create mode 100644 include/soc/fsl/cpm.h", "diff": "diff --git a/arch/powerpc/include/asm/cpm.h b/arch/powerpc/include/asm/cpm.h\nindex 4c24ea8209bb..ce483b0f8a4d 100644\n--- a/arch/powerpc/include/asm/cpm.h\n+++ b/arch/powerpc/include/asm/cpm.h\n@@ -1,171 +1 @@\n-/* SPDX-License-Identifier: GPL-2.0 */\n-#ifndef __CPM_H\n-#define __CPM_H\n-\n-#include <linux/compiler.h>\n-#include <linux/types.h>\n-#include <linux/errno.h>\n-#include <linux/of.h>\n-#include <soc/fsl/qe/qe.h>\n-\n-/*\n- * SPI Parameter RAM common to QE and CPM.\n- */\n-struct spi_pram {\n-\t__be16\trbase;\t/* Rx Buffer descriptor base address */\n-\t__be16\ttbase;\t/* Tx Buffer descriptor base address */\n-\tu8\trfcr;\t/* Rx function code */\n-\tu8\ttfcr;\t/* Tx function code */\n-\t__be16\tmrblr;\t/* Max receive buffer length */\n-\t__be32\trstate;\t/* Internal */\n-\t__be32\trdp;\t/* Internal */\n-\t__be16\trbptr;\t/* Internal */\n-\t__be16\trbc;\t/* Internal */\n-\t__be32\trxtmp;\t/* Internal */\n-\t__be32\ttstate;\t/* Internal */\n-\t__be32\ttdp;\t/* Internal */\n-\t__be16\ttbptr;\t/* Internal */\n-\t__be16\ttbc;\t/* Internal */\n-\t__be32\ttxtmp;\t/* Internal */\n-\t__be32\tres;\t/* Tx temp. */\n-\t__be16 rpbase;\t/* Relocation pointer (CPM1 only) */\n-\t__be16\tres1;\t/* Reserved */\n-};\n-\n-/*\n- * USB Controller pram common to QE and CPM.\n- */\n-struct usb_ctlr {\n-\tu8\tusb_usmod;\n-\tu8\tusb_usadr;\n-\tu8\tusb_uscom;\n-\tu8\tres1[1];\n-\t__be16\tusb_usep[4];\n-\tu8\tres2[4];\n-\t__be16\tusb_usber;\n-\tu8\tres3[2];\n-\t__be16\tusb_usbmr;\n-\tu8\tres4[1];\n-\tu8\tusb_usbs;\n-\t/* Fields down below are QE-only */\n-\t__be16\tusb_ussft;\n-\tu8\tres5[2];\n-\t__be16\tusb_usfrn;\n-\tu8\tres6[0x22];\n-} __attribute__ ((packed));\n-\n-/*\n- * Function code bits, usually generic to devices.\n- */\n-#ifdef CONFIG_CPM1\n-#define CPMFCR_GBL\t((u_char)0x00)\t/* Flag doesn't exist in CPM1 */\n-#define CPMFCR_TC2\t((u_char)0x00)\t/* Flag doesn't exist in CPM1 */\n-#define CPMFCR_DTB\t((u_char)0x00)\t/* Flag doesn't exist in CPM1 */\n-#define CPMFCR_BDB\t((u_char)0x00)\t/* Flag doesn't exist in CPM1 */\n-#else\n-#define CPMFCR_GBL\t((u_char)0x20)\t/* Set memory snooping */\n-#define CPMFCR_TC2\t((u_char)0x04)\t/* Transfer code 2 value */\n-#define CPMFCR_DTB\t((u_char)0x02)\t/* Use local bus for data when set */\n-#define CPMFCR_BDB\t((u_char)0x01)\t/* Use local bus for BD when set */\n-#endif\n-#define CPMFCR_EB\t((u_char)0x10)\t/* Set big endian byte order */\n-\n-/* Opcodes common to CPM1 and CPM2\n-*/\n-#define CPM_CR_INIT_TRX\t\t((ushort)0x0000)\n-#define CPM_CR_INIT_RX\t\t((ushort)0x0001)\n-#define CPM_CR_INIT_TX\t\t((ushort)0x0002)\n-#define CPM_CR_HUNT_MODE\t((ushort)0x0003)\n-#define CPM_CR_STOP_TX\t\t((ushort)0x0004)\n-#define CPM_CR_GRA_STOP_TX\t((ushort)0x0005)\n-#define CPM_CR_RESTART_TX\t((ushort)0x0006)\n-#define CPM_CR_CLOSE_RX_BD\t((ushort)0x0007)\n-#define CPM_CR_SET_GADDR\t((ushort)0x0008)\n-#define CPM_CR_SET_TIMER\t((ushort)0x0008)\n-#define CPM_CR_STOP_IDMA\t((ushort)0x000b)\n-\n-/* Buffer descriptors used by many of the CPM protocols. */\n-typedef struct cpm_buf_desc {\n-\tushort\tcbd_sc;\t\t/* Status and Control */\n-\tushort\tcbd_datlen;\t/* Data length in buffer */\n-\tuint\tcbd_bufaddr;\t/* Buffer address in host memory */\n-} cbd_t;\n-\n-/* Buffer descriptor control/status used by serial\n- */\n-\n-#define BD_SC_EMPTY\t(0x8000)\t/* Receive is empty */\n-#define BD_SC_READY\t(0x8000)\t/* Transmit is ready */\n-#define BD_SC_WRAP\t(0x2000)\t/* Last buffer descriptor */\n-#define BD_SC_INTRPT\t(0x1000)\t/* Interrupt on change */\n-#define BD_SC_LAST\t(0x0800)\t/* Last buffer in frame */\n-#define BD_SC_TC\t(0x0400)\t/* Transmit CRC */\n-#define BD_SC_CM\t(0x0200)\t/* Continuous mode */\n-#define BD_SC_ID\t(0x0100)\t/* Rec'd too many idles */\n-#define BD_SC_P\t\t(0x0100)\t/* xmt preamble */\n-#define BD_SC_BR\t(0x0020)\t/* Break received */\n-#define BD_SC_FR\t(0x0010)\t/* Framing error */\n-#define BD_SC_PR\t(0x0008)\t/* Parity error */\n-#define BD_SC_NAK\t(0x0004)\t/* NAK - did not respond */\n-#define BD_SC_OV\t(0x0002)\t/* Overrun */\n-#define BD_SC_UN\t(0x0002)\t/* Underrun */\n-#define BD_SC_CD\t(0x0001)\t/* */\n-#define BD_SC_CL\t(0x0001)\t/* Collision */\n-\n-/* Buffer descriptor control/status used by Ethernet receive.\n- * Common to SCC and FCC.\n- */\n-#define BD_ENET_RX_EMPTY\t(0x8000)\n-#define BD_ENET_RX_WRAP\t\t(0x2000)\n-#define BD_ENET_RX_INTR\t\t(0x1000)\n-#define BD_ENET_RX_LAST\t\t(0x0800)\n-#define BD_ENET_RX_FIRST\t(0x0400)\n-#define BD_ENET_RX_MISS\t\t(0x0100)\n-#define BD_ENET_RX_BC\t\t(0x0080)\t/* FCC Only */\n-#define BD_ENET_RX_MC\t\t(0x0040)\t/* FCC Only */\n-#define BD_ENET_RX_LG\t\t(0x0020)\n-#define BD_ENET_RX_NO\t\t(0x0010)\n-#define BD_ENET_RX_SH\t\t(0x0008)\n-#define BD_ENET_RX_CR\t\t(0x0004)\n-#define BD_ENET_RX_OV\t\t(0x0002)\n-#define BD_ENET_RX_CL\t\t(0x0001)\n-#define BD_ENET_RX_STATS\t(0x01ff)\t/* All status bits */\n-\n-/* Buffer descriptor control/status used by Ethernet transmit.\n- * Common to SCC and FCC.\n- */\n-#define BD_ENET_TX_READY\t(0x8000)\n-#define BD_ENET_TX_PAD\t\t(0x4000)\n-#define BD_ENET_TX_WRAP\t\t(0x2000)\n-#define BD_ENET_TX_INTR\t\t(0x1000)\n-#define BD_ENET_TX_LAST\t\t(0x0800)\n-#define BD_ENET_TX_TC\t\t(0x0400)\n-#define BD_ENET_TX_DEF\t\t(0x0200)\n-#define BD_ENET_TX_HB\t\t(0x0100)\n-#define BD_ENET_TX_LC\t\t(0x0080)\n-#define BD_ENET_TX_RL\t\t(0x0040)\n-#define BD_ENET_TX_RCMASK\t(0x003c)\n-#define BD_ENET_TX_UN\t\t(0x0002)\n-#define BD_ENET_TX_CSL\t\t(0x0001)\n-#define BD_ENET_TX_STATS\t(0x03ff)\t/* All status bits */\n-\n-/* Buffer descriptor control/status used by Transparent mode SCC.\n- */\n-#define BD_SCC_TX_LAST\t\t(0x0800)\n-\n-/* Buffer descriptor control/status used by I2C.\n- */\n-#define BD_I2C_START\t\t(0x0400)\n-\n-#ifdef CONFIG_CPM\n-int cpm_command(u32 command, u8 opcode);\n-#else\n-static inline int cpm_command(u32 command, u8 opcode)\n-{\n-\treturn -ENOSYS;\n-}\n-#endif /* CONFIG_CPM */\n-\n-int cpm2_gpiochip_add32(struct device *dev);\n-\n-#endif\n+#include <soc/fsl/cpm.h>\ndiff --git a/include/soc/fsl/cpm.h b/include/soc/fsl/cpm.h\nnew file mode 100644\nindex 000000000000..4c24ea8209bb\n--- /dev/null\n+++ b/include/soc/fsl/cpm.h\n@@ -0,0 +1,171 @@\n+/* SPDX-License-Identifier: GPL-2.0 */\n+#ifndef __CPM_H\n+#define __CPM_H\n+\n+#include <linux/compiler.h>\n+#include <linux/types.h>\n+#include <linux/errno.h>\n+#include <linux/of.h>\n+#include <soc/fsl/qe/qe.h>\n+\n+/*\n+ * SPI Parameter RAM common to QE and CPM.\n+ */\n+struct spi_pram {\n+\t__be16\trbase;\t/* Rx Buffer descriptor base address */\n+\t__be16\ttbase;\t/* Tx Buffer descriptor base address */\n+\tu8\trfcr;\t/* Rx function code */\n+\tu8\ttfcr;\t/* Tx function code */\n+\t__be16\tmrblr;\t/* Max receive buffer length */\n+\t__be32\trstate;\t/* Internal */\n+\t__be32\trdp;\t/* Internal */\n+\t__be16\trbptr;\t/* Internal */\n+\t__be16\trbc;\t/* Internal */\n+\t__be32\trxtmp;\t/* Internal */\n+\t__be32\ttstate;\t/* Internal */\n+\t__be32\ttdp;\t/* Internal */\n+\t__be16\ttbptr;\t/* Internal */\n+\t__be16\ttbc;\t/* Internal */\n+\t__be32\ttxtmp;\t/* Internal */\n+\t__be32\tres;\t/* Tx temp. */\n+\t__be16 rpbase;\t/* Relocation pointer (CPM1 only) */\n+\t__be16\tres1;\t/* Reserved */\n+};\n+\n+/*\n+ * USB Controller pram common to QE and CPM.\n+ */\n+struct usb_ctlr {\n+\tu8\tusb_usmod;\n+\tu8\tusb_usadr;\n+\tu8\tusb_uscom;\n+\tu8\tres1[1];\n+\t__be16\tusb_usep[4];\n+\tu8\tres2[4];\n+\t__be16\tusb_usber;\n+\tu8\tres3[2];\n+\t__be16\tusb_usbmr;\n+\tu8\tres4[1];\n+\tu8\tusb_usbs;\n+\t/* Fields down below are QE-only */\n+\t__be16\tusb_ussft;\n+\tu8\tres5[2];\n+\t__be16\tusb_usfrn;\n+\tu8\tres6[0x22];\n+} __attribute__ ((packed));\n+\n+/*\n+ * Function code bits, usually generic to devices.\n+ */\n+#ifdef CONFIG_CPM1\n+#define CPMFCR_GBL\t((u_char)0x00)\t/* Flag doesn't exist in CPM1 */\n+#define CPMFCR_TC2\t((u_char)0x00)\t/* Flag doesn't exist in CPM1 */\n+#define CPMFCR_DTB\t((u_char)0x00)\t/* Flag doesn't exist in CPM1 */\n+#define CPMFCR_BDB\t((u_char)0x00)\t/* Flag doesn't exist in CPM1 */\n+#else\n+#define CPMFCR_GBL\t((u_char)0x20)\t/* Set memory snooping */\n+#define CPMFCR_TC2\t((u_char)0x04)\t/* Transfer code 2 value */\n+#define CPMFCR_DTB\t((u_char)0x02)\t/* Use local bus for data when set */\n+#define CPMFCR_BDB\t((u_char)0x01)\t/* Use local bus for BD when set */\n+#endif\n+#define CPMFCR_EB\t((u_char)0x10)\t/* Set big endian byte order */\n+\n+/* Opcodes common to CPM1 and CPM2\n+*/\n+#define CPM_CR_INIT_TRX\t\t((ushort)0x0000)\n+#define CPM_CR_INIT_RX\t\t((ushort)0x0001)\n+#define CPM_CR_INIT_TX\t\t((ushort)0x0002)\n+#define CPM_CR_HUNT_MODE\t((ushort)0x0003)\n+#define CPM_CR_STOP_TX\t\t((ushort)0x0004)\n+#define CPM_CR_GRA_STOP_TX\t((ushort)0x0005)\n+#define CPM_CR_RESTART_TX\t((ushort)0x0006)\n+#define CPM_CR_CLOSE_RX_BD\t((ushort)0x0007)\n+#define CPM_CR_SET_GADDR\t((ushort)0x0008)\n+#define CPM_CR_SET_TIMER\t((ushort)0x0008)\n+#define CPM_CR_STOP_IDMA\t((ushort)0x000b)\n+\n+/* Buffer descriptors used by many of the CPM protocols. */\n+typedef struct cpm_buf_desc {\n+\tushort\tcbd_sc;\t\t/* Status and Control */\n+\tushort\tcbd_datlen;\t/* Data length in buffer */\n+\tuint\tcbd_bufaddr;\t/* Buffer address in host memory */\n+} cbd_t;\n+\n+/* Buffer descriptor control/status used by serial\n+ */\n+\n+#define BD_SC_EMPTY\t(0x8000)\t/* Receive is empty */\n+#define BD_SC_READY\t(0x8000)\t/* Transmit is ready */\n+#define BD_SC_WRAP\t(0x2000)\t/* Last buffer descriptor */\n+#define BD_SC_INTRPT\t(0x1000)\t/* Interrupt on change */\n+#define BD_SC_LAST\t(0x0800)\t/* Last buffer in frame */\n+#define BD_SC_TC\t(0x0400)\t/* Transmit CRC */\n+#define BD_SC_CM\t(0x0200)\t/* Continuous mode */\n+#define BD_SC_ID\t(0x0100)\t/* Rec'd too many idles */\n+#define BD_SC_P\t\t(0x0100)\t/* xmt preamble */\n+#define BD_SC_BR\t(0x0020)\t/* Break received */\n+#define BD_SC_FR\t(0x0010)\t/* Framing error */\n+#define BD_SC_PR\t(0x0008)\t/* Parity error */\n+#define BD_SC_NAK\t(0x0004)\t/* NAK - did not respond */\n+#define BD_SC_OV\t(0x0002)\t/* Overrun */\n+#define BD_SC_UN\t(0x0002)\t/* Underrun */\n+#define BD_SC_CD\t(0x0001)\t/* */\n+#define BD_SC_CL\t(0x0001)\t/* Collision */\n+\n+/* Buffer descriptor control/status used by Ethernet receive.\n+ * Common to SCC and FCC.\n+ */\n+#define BD_ENET_RX_EMPTY\t(0x8000)\n+#define BD_ENET_RX_WRAP\t\t(0x2000)\n+#define BD_ENET_RX_INTR\t\t(0x1000)\n+#define BD_ENET_RX_LAST\t\t(0x0800)\n+#define BD_ENET_RX_FIRST\t(0x0400)\n+#define BD_ENET_RX_MISS\t\t(0x0100)\n+#define BD_ENET_RX_BC\t\t(0x0080)\t/* FCC Only */\n+#define BD_ENET_RX_MC\t\t(0x0040)\t/* FCC Only */\n+#define BD_ENET_RX_LG\t\t(0x0020)\n+#define BD_ENET_RX_NO\t\t(0x0010)\n+#define BD_ENET_RX_SH\t\t(0x0008)\n+#define BD_ENET_RX_CR\t\t(0x0004)\n+#define BD_ENET_RX_OV\t\t(0x0002)\n+#define BD_ENET_RX_CL\t\t(0x0001)\n+#define BD_ENET_RX_STATS\t(0x01ff)\t/* All status bits */\n+\n+/* Buffer descriptor control/status used by Ethernet transmit.\n+ * Common to SCC and FCC.\n+ */\n+#define BD_ENET_TX_READY\t(0x8000)\n+#define BD_ENET_TX_PAD\t\t(0x4000)\n+#define BD_ENET_TX_WRAP\t\t(0x2000)\n+#define BD_ENET_TX_INTR\t\t(0x1000)\n+#define BD_ENET_TX_LAST\t\t(0x0800)\n+#define BD_ENET_TX_TC\t\t(0x0400)\n+#define BD_ENET_TX_DEF\t\t(0x0200)\n+#define BD_ENET_TX_HB\t\t(0x0100)\n+#define BD_ENET_TX_LC\t\t(0x0080)\n+#define BD_ENET_TX_RL\t\t(0x0040)\n+#define BD_ENET_TX_RCMASK\t(0x003c)\n+#define BD_ENET_TX_UN\t\t(0x0002)\n+#define BD_ENET_TX_CSL\t\t(0x0001)\n+#define BD_ENET_TX_STATS\t(0x03ff)\t/* All status bits */\n+\n+/* Buffer descriptor control/status used by Transparent mode SCC.\n+ */\n+#define BD_SCC_TX_LAST\t\t(0x0800)\n+\n+/* Buffer descriptor control/status used by I2C.\n+ */\n+#define BD_I2C_START\t\t(0x0400)\n+\n+#ifdef CONFIG_CPM\n+int cpm_command(u32 command, u8 opcode);\n+#else\n+static inline int cpm_command(u32 command, u8 opcode)\n+{\n+\treturn -ENOSYS;\n+}\n+#endif /* CONFIG_CPM */\n+\n+int cpm2_gpiochip_add32(struct device *dev);\n+\n+#endif\n", "prefixes": [ "v4", "26/47" ] }