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GET /api/patches/1191911/?format=api
{ "id": 1191911, "url": "http://patchwork.ozlabs.org/api/patches/1191911/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20191108130123.6839-21-linux@rasmusvillemoes.dk/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20191108130123.6839-21-linux@rasmusvillemoes.dk>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20191108130123.6839-21-linux@rasmusvillemoes.dk/", "date": "2019-11-08T13:00:56", "name": "[v4,20/47] soc: fsl: qe: simplify qe_ic_init()", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": false, "hash": "00a01d5244738e042ea13d9f66b10f4387c010ac", "submitter": { "id": 27394, "url": "http://patchwork.ozlabs.org/api/people/27394/?format=api", "name": "Rasmus Villemoes", "email": "linux@rasmusvillemoes.dk" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20191108130123.6839-21-linux@rasmusvillemoes.dk/mbox/", "series": [ { "id": 141654, "url": "http://patchwork.ozlabs.org/api/series/141654/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=141654", "date": "2019-11-08T13:00:38", "name": "QUICC Engine support on ARM and ARM64", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/141654/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1191911/comments/", "check": "success", "checks": "http://patchwork.ozlabs.org/api/patches/1191911/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\tkey-exchange X25519 server-signature RSA-PSS (4096 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 478j7J67hWz9s4Y\n\tfor <patchwork-incoming@ozlabs.org>;\n\tSat, 9 Nov 2019 01:18:52 +1100 (AEDT)", "from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 478j7J3fXjzF34x\n\tfor <patchwork-incoming@ozlabs.org>;\n\tSat, 9 Nov 2019 01:18:52 +1100 (AEDT)", "from mail-lj1-x242.google.com (mail-lj1-x242.google.com\n\t[IPv6:2a00:1450:4864:20::242])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\tkey-exchange X25519 server-signature RSA-PSS (2048 bits)\n\tserver-digest SHA256) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 478gQY547FzF6tH\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tSat, 9 Nov 2019 00:01:57 +1100 (AEDT)", "by mail-lj1-x242.google.com with SMTP id n5so6123251ljc.9\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tFri, 08 Nov 2019 05:01:57 -0800 (PST)", "from prevas-ravi.prevas.se ([81.216.59.226])\n\tby smtp.gmail.com with ESMTPSA id\n\td28sm2454725lfn.33.2019.11.08.05.01.52\n\t(version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n\tFri, 08 Nov 2019 05:01:53 -0800 (PST)" ], "Authentication-Results": [ "ozlabs.org; dmarc=none (p=none dis=none)\n\theader.from=rasmusvillemoes.dk", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=rasmusvillemoes.dk header.i=@rasmusvillemoes.dk\n\theader.b=\"Zbn0TqUq\"; dkim-atps=neutral", "lists.ozlabs.org; spf=pass (sender SPF authorized)\n\tsmtp.mailfrom=rasmusvillemoes.dk (client-ip=2a00:1450:4864:20::242;\n\thelo=mail-lj1-x242.google.com; envelope-from=linux@rasmusvillemoes.dk;\n\treceiver=<UNKNOWN>)", "lists.ozlabs.org; dmarc=none (p=none dis=none)\n\theader.from=rasmusvillemoes.dk", "lists.ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=rasmusvillemoes.dk header.i=@rasmusvillemoes.dk\n\theader.b=\"Zbn0TqUq\"; dkim-atps=neutral" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=rasmusvillemoes.dk; s=google;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references\n\t:mime-version:content-transfer-encoding;\n\tbh=vCPu9Gq+U2RPRhQiWL2MkNy7+uq9EAlYdyc3guVWBBY=;\n\tb=Zbn0TqUqcD96YghRBc/X/iOQIByImvq3b2H28LP6E3WW+L6HtOuQk199BV9LvKz/db\n\tBpjx/GQAiq4IrmQChi7ORWA8wF6geONwz6VbNjMJZmFxnguPZi+6cWDfilXtwsGeOkTo\n\t6ZTAj+XUacs5EP1T4WFXCqrdnXAiLz+s4ibxA=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:mime-version:content-transfer-encoding;\n\tbh=vCPu9Gq+U2RPRhQiWL2MkNy7+uq9EAlYdyc3guVWBBY=;\n\tb=jJpXVXTI6lED5dk2jXGJW2PvJDxy6IJLI1wiEwNupLHEaWY3v+YqMfEDiYrNtEW9ie\n\t0iUvwgXhYU7kOzQXc/AH7CBMFGEb5PhwfD8dzCqIq0TzmzSiL7gQtSXNDeMlZ3A/sPwx\n\tmIVY+GE4vNESF6ki/OV7hz4kwGQ5QWoM/y1v+kKzw5AStiJamDtaOtV2Ypme4A/NxbUa\n\t/tKDs3Vnm0jGdZc2uU6NisA2peeg8Tyik1weRGp91+Mtm0bw+GhU+3EnIxdRHMG0i1bm\n\tc4ubiV1jRC38zmieovJitt0QFyg9ycKaIJnIifrGUPZrCHbH1GR/1k/6o+V5gX48dolO\n\tzyXw==", "X-Gm-Message-State": "APjAAAV5BS5FeqB23qdXNqfsObxliJAb4U6nFpbeHNVR5Wbi0+LtzHe9\n\tFZqyqgZBSejEjRlCKd2h8WxChQYovZ+zRr8y", "X-Google-Smtp-Source": "APXvYqxwDPhHpkko9Bt/I2cILjd0+W6V/QCJlMsaEtYR7+B6IZRZpXjupVNQn9evCDrLDJvydWLhBw==", "X-Received": "by 2002:a2e:9216:: with SMTP id\n\tk22mr6887824ljg.157.1573218113677; \n\tFri, 08 Nov 2019 05:01:53 -0800 (PST)", "From": "Rasmus Villemoes <linux@rasmusvillemoes.dk>", "To": "Qiang Zhao <qiang.zhao@nxp.com>, Li Yang <leoyang.li@nxp.com>,\n\tChristophe Leroy <christophe.leroy@c-s.fr>", "Subject": "[PATCH v4 20/47] soc: fsl: qe: simplify qe_ic_init()", "Date": "Fri, 8 Nov 2019 14:00:56 +0100", "Message-Id": "<20191108130123.6839-21-linux@rasmusvillemoes.dk>", "X-Mailer": "git-send-email 2.23.0", "In-Reply-To": "<20191108130123.6839-1-linux@rasmusvillemoes.dk>", "References": "<20191108130123.6839-1-linux@rasmusvillemoes.dk>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "Scott Wood <oss@buserror.net>,\n\tRasmus Villemoes <linux@rasmusvillemoes.dk>, \n\tlinuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "qe_ic_init() takes a flags parameter, but all callers (including the\nsole remaining one) have always passed 0. So remove that parameter and\nsimplify the body accordingly. We still explicitly initialize the\nInterrupt Configuration Register (CICR) to its reset value of\nall-zeroes, just in case the bootloader has played funny games.\n\nSigned-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>\n---\n drivers/soc/fsl/qe/qe_ic.c | 27 ++++-----------------------\n 1 file changed, 4 insertions(+), 23 deletions(-)", "diff": "diff --git a/drivers/soc/fsl/qe/qe_ic.c b/drivers/soc/fsl/qe/qe_ic.c\nindex 23b457e884d8..4832884da5bb 100644\n--- a/drivers/soc/fsl/qe/qe_ic.c\n+++ b/drivers/soc/fsl/qe/qe_ic.c\n@@ -356,13 +356,13 @@ static void qe_ic_cascade_muxed_mpic(struct irq_desc *desc)\n \tchip->irq_eoi(&desc->irq_data);\n }\n \n-static void __init qe_ic_init(struct device_node *node, unsigned int flags)\n+static void __init qe_ic_init(struct device_node *node)\n {\n \tvoid (*low_handler)(struct irq_desc *desc);\n \tvoid (*high_handler)(struct irq_desc *desc);\n \tstruct qe_ic *qe_ic;\n \tstruct resource res;\n-\tu32 temp = 0, ret;\n+\tu32 ret;\n \n \tret = of_address_to_resource(node, 0, &res);\n \tif (ret)\n@@ -399,26 +399,7 @@ static void __init qe_ic_init(struct device_node *node, unsigned int flags)\n \t\thigh_handler = NULL;\n \t}\n \n-\t/* default priority scheme is grouped. If spread mode is */\n-\t/* required, configure cicr accordingly. */\n-\tif (flags & QE_IC_SPREADMODE_GRP_W)\n-\t\ttemp |= CICR_GWCC;\n-\tif (flags & QE_IC_SPREADMODE_GRP_X)\n-\t\ttemp |= CICR_GXCC;\n-\tif (flags & QE_IC_SPREADMODE_GRP_Y)\n-\t\ttemp |= CICR_GYCC;\n-\tif (flags & QE_IC_SPREADMODE_GRP_Z)\n-\t\ttemp |= CICR_GZCC;\n-\tif (flags & QE_IC_SPREADMODE_GRP_RISCA)\n-\t\ttemp |= CICR_GRTA;\n-\tif (flags & QE_IC_SPREADMODE_GRP_RISCB)\n-\t\ttemp |= CICR_GRTB;\n-\n-\t/* choose destination signal for highest priority interrupt */\n-\tif (flags & QE_IC_HIGH_SIGNAL)\n-\t\ttemp |= (SIGNAL_HIGH << CICR_HPIT_SHIFT);\n-\n-\tqe_ic_write(qe_ic->regs, QEIC_CICR, temp);\n+\tqe_ic_write(qe_ic->regs, QEIC_CICR, 0);\n \n \tirq_set_handler_data(qe_ic->virq_low, qe_ic);\n \tirq_set_chained_handler(qe_ic->virq_low, low_handler);\n@@ -439,7 +420,7 @@ static int __init qe_ic_of_init(void)\n \t\tif (!np)\n \t\t\treturn -ENODEV;\n \t}\n-\tqe_ic_init(np, 0);\n+\tqe_ic_init(np);\n \tof_node_put(np);\n \treturn 0;\n }\n", "prefixes": [ "v4", "20/47" ] }