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GET /api/patches/1191897/?format=api
{ "id": 1191897, "url": "http://patchwork.ozlabs.org/api/patches/1191897/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20191108130123.6839-13-linux@rasmusvillemoes.dk/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20191108130123.6839-13-linux@rasmusvillemoes.dk>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20191108130123.6839-13-linux@rasmusvillemoes.dk/", "date": "2019-11-08T13:00:48", "name": "[v4,12/47] soc: fsl: qe: move calls of qe_ic_init out of arch/powerpc/", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": false, "hash": "f07427b42d7ff0e0d705a40281fe08a6093a503e", "submitter": { "id": 27394, "url": "http://patchwork.ozlabs.org/api/people/27394/?format=api", "name": "Rasmus Villemoes", "email": "linux@rasmusvillemoes.dk" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20191108130123.6839-13-linux@rasmusvillemoes.dk/mbox/", "series": [ { "id": 141654, "url": "http://patchwork.ozlabs.org/api/series/141654/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=141654", "date": "2019-11-08T13:00:38", "name": "QUICC Engine support on ARM and ARM64", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/141654/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1191897/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1191897/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\tkey-exchange X25519 server-signature RSA-PSS (4096 bits)\n\tserver-digest SHA256) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 478hWL4L67z9sNT\n\tfor <patchwork-incoming@ozlabs.org>;\n\tSat, 9 Nov 2019 00:51:10 +1100 (AEDT)", "from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 478hWL02bGzF6fC\n\tfor <patchwork-incoming@ozlabs.org>;\n\tSat, 9 Nov 2019 00:51:10 +1100 (AEDT)", "from mail-lj1-x241.google.com (mail-lj1-x241.google.com\n\t[IPv6:2a00:1450:4864:20::241])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\tkey-exchange X25519 server-signature RSA-PSS (2048 bits)\n\tserver-digest SHA256) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 478gQM5hQfzF6vm\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tSat, 9 Nov 2019 00:01:47 +1100 (AEDT)", "by mail-lj1-x241.google.com with SMTP id q2so6130998ljg.7\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tFri, 08 Nov 2019 05:01:47 -0800 (PST)", "from prevas-ravi.prevas.se ([81.216.59.226])\n\tby smtp.gmail.com with ESMTPSA id\n\td28sm2454725lfn.33.2019.11.08.05.01.42\n\t(version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n\tFri, 08 Nov 2019 05:01:42 -0800 (PST)" ], "Authentication-Results": [ "ozlabs.org; dmarc=none (p=none dis=none)\n\theader.from=rasmusvillemoes.dk", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=rasmusvillemoes.dk header.i=@rasmusvillemoes.dk\n\theader.b=\"g7KiSRPb\"; dkim-atps=neutral", "lists.ozlabs.org; spf=pass (sender SPF authorized)\n\tsmtp.mailfrom=rasmusvillemoes.dk (client-ip=2a00:1450:4864:20::241;\n\thelo=mail-lj1-x241.google.com; envelope-from=linux@rasmusvillemoes.dk;\n\treceiver=<UNKNOWN>)", "lists.ozlabs.org; dmarc=none (p=none dis=none)\n\theader.from=rasmusvillemoes.dk", "lists.ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=rasmusvillemoes.dk header.i=@rasmusvillemoes.dk\n\theader.b=\"g7KiSRPb\"; dkim-atps=neutral" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=rasmusvillemoes.dk; s=google;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references\n\t:mime-version:content-transfer-encoding;\n\tbh=T+KHWoZFWeQroCzQkpqKDeeI72keMT8L4+xk/eIgXuc=;\n\tb=g7KiSRPbHuKdA4T55GMOn6guYsU05eaRICujvFXBMGKOpj8SC4wtrUyKKg2agYBpoz\n\tPA66ZOI+bmBdzpVYqMkfb1rg8JE8NDUJXNiqKBar+Dgsse23jloTa41gZYL1ig6Stles\n\toji8dS8Fbe7CLnGwghIisbdwPd/7zLBIl3FII=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:mime-version:content-transfer-encoding;\n\tbh=T+KHWoZFWeQroCzQkpqKDeeI72keMT8L4+xk/eIgXuc=;\n\tb=ZA7qKz+3yRJtbDSXvUf0U/vwR8y6ucj/bmGyP4AjAlvl2Moj2J1IKikg6Oh8arjeQS\n\t39DeqD0/3C8dX2+QNha84K+sVfc5aBoxTbHoCyG7P9V7LGS2X19lXFuoRe23hPCsvCBz\n\t/3aXzQekJjkJkeavRw3j8I9S2sTRoQCRqoicgkmhcQfEUzzxPaWdYA4TljEyhE0+qq/D\n\tadP0ionmA60zsNCdLMK6u4U9xpa/vxTCwSJyLEkS8VDBNoIUdJszVvNtGdKvWyenRugN\n\tZcJ0mp0Aau1LWA1oDvcrvyyKQe3LJS9w6jvyTWQ/xeAdE+CucS+WmGkxtvG2Kq9embPD\n\totNA==", "X-Gm-Message-State": "APjAAAUjhbrgGpIn+iftXthAgdryrltybTBcr7DXzGHE00BW2ypiJbRV\n\tNXXT+sXqDy812NmQfgTuE7j9Eg==", "X-Google-Smtp-Source": "APXvYqwjJFDfItRqpbHph7Wn5Fp0iYV8+40RahfeG8ylFCG12x2egtOJdyqJsWYibZVpf6JWdEELhw==", "X-Received": "by 2002:a2e:478a:: with SMTP id\n\tu132mr6704339lja.181.1573218103348; \n\tFri, 08 Nov 2019 05:01:43 -0800 (PST)", "From": "Rasmus Villemoes <linux@rasmusvillemoes.dk>", "To": "Qiang Zhao <qiang.zhao@nxp.com>, Li Yang <leoyang.li@nxp.com>,\n\tChristophe Leroy <christophe.leroy@c-s.fr>", "Subject": "[PATCH v4 12/47] soc: fsl: qe: move calls of qe_ic_init out of\n\tarch/powerpc/", "Date": "Fri, 8 Nov 2019 14:00:48 +0100", "Message-Id": "<20191108130123.6839-13-linux@rasmusvillemoes.dk>", "X-Mailer": "git-send-email 2.23.0", "In-Reply-To": "<20191108130123.6839-1-linux@rasmusvillemoes.dk>", "References": "<20191108130123.6839-1-linux@rasmusvillemoes.dk>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "Scott Wood <oss@buserror.net>,\n\tRasmus Villemoes <linux@rasmusvillemoes.dk>, \n\tlinuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "Having to call qe_ic_init() from platform-specific code makes it\nawkward to allow building the QE drivers for ARM. It's also a needless\nduplication of code, and slightly error-prone: Instead of the caller\nneeding to know the details of whether the QUICC Engine High and QUICC\nEngine Low are actually the same interrupt (see e.g. the machine_is()\nin mpc85xx_mds_qeic_init), just let the init function choose the\nappropriate handlers after it has parsed the DT and figured it out. If\nthe two interrupts are distinct, use separate handlers, otherwise use\nthe handler which first checks the CHIVEC register (for the high\npriority interrupts), then the CIVEC.\n\nAll existing callers pass 0 for flags, so continue to do that from the\nnew single caller. Later cleanups will remove that argument\nfrom qe_ic_init and simplify the body, as well as make qe_ic_init into\na proper init function for an IRQCHIP_DECLARE, eliminating the need to\nmanually look up the fsl,qe-ic node.\n\nSigned-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>\n---\n arch/powerpc/platforms/83xx/km83xx.c | 1 -\n arch/powerpc/platforms/83xx/misc.c | 16 ----------\n arch/powerpc/platforms/83xx/mpc832x_mds.c | 1 -\n arch/powerpc/platforms/83xx/mpc832x_rdb.c | 1 -\n arch/powerpc/platforms/83xx/mpc836x_mds.c | 1 -\n arch/powerpc/platforms/83xx/mpc836x_rdk.c | 1 -\n arch/powerpc/platforms/83xx/mpc83xx.h | 2 --\n arch/powerpc/platforms/85xx/corenet_generic.c | 10 -------\n arch/powerpc/platforms/85xx/mpc85xx_mds.c | 27 -----------------\n arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 17 -----------\n arch/powerpc/platforms/85xx/twr_p102x.c | 15 ----------\n drivers/soc/fsl/qe/qe_ic.c | 29 +++++++++++++++++--\n include/soc/fsl/qe/qe_ic.h | 7 -----\n 13 files changed, 26 insertions(+), 102 deletions(-)", "diff": "diff --git a/arch/powerpc/platforms/83xx/km83xx.c b/arch/powerpc/platforms/83xx/km83xx.c\nindex 273145aed90a..5c6227f7bc37 100644\n--- a/arch/powerpc/platforms/83xx/km83xx.c\n+++ b/arch/powerpc/platforms/83xx/km83xx.c\n@@ -34,7 +34,6 @@\n #include <sysdev/fsl_soc.h>\n #include <sysdev/fsl_pci.h>\n #include <soc/fsl/qe/qe.h>\n-#include <soc/fsl/qe/qe_ic.h>\n \n #include \"mpc83xx.h\"\n \ndiff --git a/arch/powerpc/platforms/83xx/misc.c b/arch/powerpc/platforms/83xx/misc.c\nindex 779791c0570f..6935a5b9fbd1 100644\n--- a/arch/powerpc/platforms/83xx/misc.c\n+++ b/arch/powerpc/platforms/83xx/misc.c\n@@ -14,7 +14,6 @@\n #include <asm/io.h>\n #include <asm/hw_irq.h>\n #include <asm/ipic.h>\n-#include <soc/fsl/qe/qe_ic.h>\n #include <sysdev/fsl_soc.h>\n #include <sysdev/fsl_pci.h>\n \n@@ -90,24 +89,9 @@ void __init mpc83xx_ipic_init_IRQ(void)\n }\n \n #ifdef CONFIG_QUICC_ENGINE\n-void __init mpc83xx_qe_init_IRQ(void)\n-{\n-\tstruct device_node *np;\n-\n-\tnp = of_find_compatible_node(NULL, NULL, \"fsl,qe-ic\");\n-\tif (!np) {\n-\t\tnp = of_find_node_by_type(NULL, \"qeic\");\n-\t\tif (!np)\n-\t\t\treturn;\n-\t}\n-\tqe_ic_init(np, 0, qe_ic_cascade_low_mpic, qe_ic_cascade_high_mpic);\n-\tof_node_put(np);\n-}\n-\n void __init mpc83xx_ipic_and_qe_init_IRQ(void)\n {\n \tmpc83xx_ipic_init_IRQ();\n-\tmpc83xx_qe_init_IRQ();\n }\n #endif /* CONFIG_QUICC_ENGINE */\n \ndiff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.c b/arch/powerpc/platforms/83xx/mpc832x_mds.c\nindex b428835e5919..1c73af104d19 100644\n--- a/arch/powerpc/platforms/83xx/mpc832x_mds.c\n+++ b/arch/powerpc/platforms/83xx/mpc832x_mds.c\n@@ -33,7 +33,6 @@\n #include <sysdev/fsl_soc.h>\n #include <sysdev/fsl_pci.h>\n #include <soc/fsl/qe/qe.h>\n-#include <soc/fsl/qe/qe_ic.h>\n \n #include \"mpc83xx.h\"\n \ndiff --git a/arch/powerpc/platforms/83xx/mpc832x_rdb.c b/arch/powerpc/platforms/83xx/mpc832x_rdb.c\nindex 4588ce632484..87f68ca06255 100644\n--- a/arch/powerpc/platforms/83xx/mpc832x_rdb.c\n+++ b/arch/powerpc/platforms/83xx/mpc832x_rdb.c\n@@ -22,7 +22,6 @@\n #include <asm/ipic.h>\n #include <asm/udbg.h>\n #include <soc/fsl/qe/qe.h>\n-#include <soc/fsl/qe/qe_ic.h>\n #include <sysdev/fsl_soc.h>\n #include <sysdev/fsl_pci.h>\n \ndiff --git a/arch/powerpc/platforms/83xx/mpc836x_mds.c b/arch/powerpc/platforms/83xx/mpc836x_mds.c\nindex 4a4efa906d35..5b484da9533e 100644\n--- a/arch/powerpc/platforms/83xx/mpc836x_mds.c\n+++ b/arch/powerpc/platforms/83xx/mpc836x_mds.c\n@@ -41,7 +41,6 @@\n #include <sysdev/fsl_pci.h>\n #include <sysdev/simple_gpio.h>\n #include <soc/fsl/qe/qe.h>\n-#include <soc/fsl/qe/qe_ic.h>\n \n #include \"mpc83xx.h\"\n \ndiff --git a/arch/powerpc/platforms/83xx/mpc836x_rdk.c b/arch/powerpc/platforms/83xx/mpc836x_rdk.c\nindex 9923059cb111..b7119e443920 100644\n--- a/arch/powerpc/platforms/83xx/mpc836x_rdk.c\n+++ b/arch/powerpc/platforms/83xx/mpc836x_rdk.c\n@@ -17,7 +17,6 @@\n #include <asm/ipic.h>\n #include <asm/udbg.h>\n #include <soc/fsl/qe/qe.h>\n-#include <soc/fsl/qe/qe_ic.h>\n #include <sysdev/fsl_soc.h>\n #include <sysdev/fsl_pci.h>\n \ndiff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/platforms/83xx/mpc83xx.h\nindex 459145623334..d343f6ce2599 100644\n--- a/arch/powerpc/platforms/83xx/mpc83xx.h\n+++ b/arch/powerpc/platforms/83xx/mpc83xx.h\n@@ -73,10 +73,8 @@ extern int mpc834x_usb_cfg(void);\n extern int mpc831x_usb_cfg(void);\n extern void mpc83xx_ipic_init_IRQ(void);\n #ifdef CONFIG_QUICC_ENGINE\n-extern void mpc83xx_qe_init_IRQ(void);\n extern void mpc83xx_ipic_and_qe_init_IRQ(void);\n #else\n-static inline void __init mpc83xx_qe_init_IRQ(void) {}\n #define mpc83xx_ipic_and_qe_init_IRQ mpc83xx_ipic_init_IRQ\n #endif /* CONFIG_QUICC_ENGINE */\n \ndiff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c\nindex 7ee2c6628f64..8c1bb3941642 100644\n--- a/arch/powerpc/platforms/85xx/corenet_generic.c\n+++ b/arch/powerpc/platforms/85xx/corenet_generic.c\n@@ -24,7 +24,6 @@\n #include <asm/mpic.h>\n #include <asm/ehv_pic.h>\n #include <asm/swiotlb.h>\n-#include <soc/fsl/qe/qe_ic.h>\n \n #include <linux/of_platform.h>\n #include <sysdev/fsl_soc.h>\n@@ -38,8 +37,6 @@ void __init corenet_gen_pic_init(void)\n \tunsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |\n \t\tMPIC_NO_RESET;\n \n-\tstruct device_node *np;\n-\n \tif (ppc_md.get_irq == mpic_get_coreint_irq)\n \t\tflags |= MPIC_ENABLE_COREINT;\n \n@@ -47,13 +44,6 @@ void __init corenet_gen_pic_init(void)\n \tBUG_ON(mpic == NULL);\n \n \tmpic_init(mpic);\n-\n-\tnp = of_find_compatible_node(NULL, NULL, \"fsl,qe-ic\");\n-\tif (np) {\n-\t\tqe_ic_init(np, 0, qe_ic_cascade_low_mpic,\n-\t\t\t\tqe_ic_cascade_high_mpic);\n-\t\tof_node_put(np);\n-\t}\n }\n \n /*\ndiff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c\nindex 5ca254256c47..4bc49e5ec0b6 100644\n--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c\n+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c\n@@ -45,7 +45,6 @@\n #include <sysdev/fsl_pci.h>\n #include <sysdev/simple_gpio.h>\n #include <soc/fsl/qe/qe.h>\n-#include <soc/fsl/qe/qe_ic.h>\n #include <asm/mpic.h>\n #include <asm/swiotlb.h>\n #include \"smp.h\"\n@@ -270,33 +269,8 @@ static void __init mpc85xx_mds_qe_init(void)\n \t}\n }\n \n-static void __init mpc85xx_mds_qeic_init(void)\n-{\n-\tstruct device_node *np;\n-\n-\tnp = of_find_compatible_node(NULL, NULL, \"fsl,qe\");\n-\tif (!of_device_is_available(np)) {\n-\t\tof_node_put(np);\n-\t\treturn;\n-\t}\n-\n-\tnp = of_find_compatible_node(NULL, NULL, \"fsl,qe-ic\");\n-\tif (!np) {\n-\t\tnp = of_find_node_by_type(NULL, \"qeic\");\n-\t\tif (!np)\n-\t\t\treturn;\n-\t}\n-\n-\tif (machine_is(p1021_mds))\n-\t\tqe_ic_init(np, 0, qe_ic_cascade_low_mpic,\n-\t\t\t\tqe_ic_cascade_high_mpic);\n-\telse\n-\t\tqe_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);\n-\tof_node_put(np);\n-}\n #else\n static void __init mpc85xx_mds_qe_init(void) { }\n-static void __init mpc85xx_mds_qeic_init(void) { }\n #endif\t/* CONFIG_QUICC_ENGINE */\n \n static void __init mpc85xx_mds_setup_arch(void)\n@@ -371,7 +345,6 @@ static void __init mpc85xx_mds_pic_init(void)\n \tBUG_ON(mpic == NULL);\n \n \tmpic_init(mpic);\n-\tmpc85xx_mds_qeic_init();\n }\n \n static int __init mpc85xx_mds_probe(void)\ndiff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c\nindex d3c540ee558f..14b5a61d49c1 100644\n--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c\n+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c\n@@ -23,7 +23,6 @@\n #include <asm/udbg.h>\n #include <asm/mpic.h>\n #include <soc/fsl/qe/qe.h>\n-#include <soc/fsl/qe/qe_ic.h>\n \n #include <sysdev/fsl_soc.h>\n #include <sysdev/fsl_pci.h>\n@@ -44,10 +43,6 @@ void __init mpc85xx_rdb_pic_init(void)\n {\n \tstruct mpic *mpic;\n \n-#ifdef CONFIG_QUICC_ENGINE\n-\tstruct device_node *np;\n-#endif\n-\n \tif (of_machine_is_compatible(\"fsl,MPC85XXRDB-CAMP\")) {\n \t\tmpic = mpic_alloc(NULL, 0, MPIC_NO_RESET |\n \t\t\tMPIC_BIG_ENDIAN |\n@@ -62,18 +57,6 @@ void __init mpc85xx_rdb_pic_init(void)\n \n \tBUG_ON(mpic == NULL);\n \tmpic_init(mpic);\n-\n-#ifdef CONFIG_QUICC_ENGINE\n-\tnp = of_find_compatible_node(NULL, NULL, \"fsl,qe-ic\");\n-\tif (np) {\n-\t\tqe_ic_init(np, 0, qe_ic_cascade_low_mpic,\n-\t\t\t\tqe_ic_cascade_high_mpic);\n-\t\tof_node_put(np);\n-\n-\t} else\n-\t\tpr_err(\"%s: Could not find qe-ic node\\n\", __func__);\n-#endif\n-\n }\n \n /*\ndiff --git a/arch/powerpc/platforms/85xx/twr_p102x.c b/arch/powerpc/platforms/85xx/twr_p102x.c\nindex 720b0c0f03ba..b099f5607120 100644\n--- a/arch/powerpc/platforms/85xx/twr_p102x.c\n+++ b/arch/powerpc/platforms/85xx/twr_p102x.c\n@@ -19,7 +19,6 @@\n #include <asm/udbg.h>\n #include <asm/mpic.h>\n #include <soc/fsl/qe/qe.h>\n-#include <soc/fsl/qe/qe_ic.h>\n \n #include <sysdev/fsl_soc.h>\n #include <sysdev/fsl_pci.h>\n@@ -31,26 +30,12 @@ static void __init twr_p1025_pic_init(void)\n {\n \tstruct mpic *mpic;\n \n-#ifdef CONFIG_QUICC_ENGINE\n-\tstruct device_node *np;\n-#endif\n-\n \tmpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |\n \t\t\tMPIC_SINGLE_DEST_CPU,\n \t\t\t0, 256, \" OpenPIC \");\n \n \tBUG_ON(mpic == NULL);\n \tmpic_init(mpic);\n-\n-#ifdef CONFIG_QUICC_ENGINE\n-\tnp = of_find_compatible_node(NULL, NULL, \"fsl,qe-ic\");\n-\tif (np) {\n-\t\tqe_ic_init(np, 0, qe_ic_cascade_low_mpic,\n-\t\t\t\tqe_ic_cascade_high_mpic);\n-\t\tof_node_put(np);\n-\t} else\n-\t\tpr_err(\"Could not find qe-ic node\\n\");\n-#endif\n }\n \n /* ************************************************************************\ndiff --git a/drivers/soc/fsl/qe/qe_ic.c b/drivers/soc/fsl/qe/qe_ic.c\nindex f170926ce4d1..a062efac398b 100644\n--- a/drivers/soc/fsl/qe/qe_ic.c\n+++ b/drivers/soc/fsl/qe/qe_ic.c\n@@ -314,10 +314,10 @@ unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic)\n \treturn irq_linear_revmap(qe_ic->irqhost, irq);\n }\n \n-void __init qe_ic_init(struct device_node *node, unsigned int flags,\n-\t\t void (*low_handler)(struct irq_desc *desc),\n-\t\t void (*high_handler)(struct irq_desc *desc))\n+static void __init qe_ic_init(struct device_node *node, unsigned int flags)\n {\n+\tvoid (*low_handler)(struct irq_desc *desc);\n+\tvoid (*high_handler)(struct irq_desc *desc);\n \tstruct qe_ic *qe_ic;\n \tstruct resource res;\n \tu32 temp = 0, ret;\n@@ -349,6 +349,13 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags,\n \t\tkfree(qe_ic);\n \t\treturn;\n \t}\n+\tif (qe_ic->virq_high != qe_ic->virq_low) {\n+\t\tlow_handler = qe_ic_cascade_low_mpic;\n+\t\thigh_handler = qe_ic_cascade_high_mpic;\n+\t} else {\n+\t\tlow_handler = qe_ic_cascade_muxed_mpic;\n+\t\thigh_handler = NULL;\n+\t}\n \n \t/* default priority scheme is grouped. If spread mode is */\n \t/* required, configure cicr accordingly. */\n@@ -381,6 +388,22 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags,\n \t}\n }\n \n+static int __init qe_ic_of_init(void)\n+{\n+\tstruct device_node *np;\n+\n+\tnp = of_find_compatible_node(NULL, NULL, \"fsl,qe-ic\");\n+\tif (!np) {\n+\t\tnp = of_find_node_by_type(NULL, \"qeic\");\n+\t\tif (!np)\n+\t\t\treturn -ENODEV;\n+\t}\n+\tqe_ic_init(np, 0);\n+\tof_node_put(np);\n+\treturn 0;\n+}\n+subsys_initcall(qe_ic_of_init);\n+\n void qe_ic_set_highest_priority(unsigned int virq, int high)\n {\n \tstruct qe_ic *qe_ic = qe_ic_from_irq(virq);\ndiff --git a/include/soc/fsl/qe/qe_ic.h b/include/soc/fsl/qe/qe_ic.h\nindex bfaa233d8328..a47a0d26acbd 100644\n--- a/include/soc/fsl/qe/qe_ic.h\n+++ b/include/soc/fsl/qe/qe_ic.h\n@@ -54,16 +54,9 @@ enum qe_ic_grp_id {\n };\n \n #ifdef CONFIG_QUICC_ENGINE\n-void qe_ic_init(struct device_node *node, unsigned int flags,\n-\t\tvoid (*low_handler)(struct irq_desc *desc),\n-\t\tvoid (*high_handler)(struct irq_desc *desc));\n unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic);\n unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic);\n #else\n-static inline void qe_ic_init(struct device_node *node, unsigned int flags,\n-\t\tvoid (*low_handler)(struct irq_desc *desc),\n-\t\tvoid (*high_handler)(struct irq_desc *desc))\n-{}\n static inline unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic)\n { return 0; }\n static inline unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic)\n", "prefixes": [ "v4", "12/47" ] }