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GET /api/patches/1191879/?format=api
{ "id": 1191879, "url": "http://patchwork.ozlabs.org/api/patches/1191879/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20191108130123.6839-7-linux@rasmusvillemoes.dk/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20191108130123.6839-7-linux@rasmusvillemoes.dk>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20191108130123.6839-7-linux@rasmusvillemoes.dk/", "date": "2019-11-08T13:00:42", "name": "[v4,06/47] soc: fsl: qe: replace spin_event_timeout by readx_poll_timeout_atomic", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": false, "hash": "7eceaec17d7d07eb822353c284d0eab242b4bad6", "submitter": { "id": 27394, "url": "http://patchwork.ozlabs.org/api/people/27394/?format=api", "name": "Rasmus Villemoes", "email": "linux@rasmusvillemoes.dk" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20191108130123.6839-7-linux@rasmusvillemoes.dk/mbox/", "series": [ { "id": 141654, "url": "http://patchwork.ozlabs.org/api/series/141654/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=141654", "date": "2019-11-08T13:00:38", "name": "QUICC Engine support on ARM and ARM64", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/141654/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1191879/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1191879/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\tkey-exchange X25519 server-signature RSA-PSS (4096 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 478gzX6cnlz9s4Y\n\tfor <patchwork-incoming@ozlabs.org>;\n\tSat, 9 Nov 2019 00:27:04 +1100 (AEDT)", "from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 478gzX5W66zF729\n\tfor <patchwork-incoming@ozlabs.org>;\n\tSat, 9 Nov 2019 00:27:04 +1100 (AEDT)", "from mail-lj1-x242.google.com (mail-lj1-x242.google.com\n\t[IPv6:2a00:1450:4864:20::242])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\tkey-exchange X25519 server-signature RSA-PSS (2048 bits)\n\tserver-digest SHA256) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 478gQB44z9zF6qJ\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tSat, 9 Nov 2019 00:01:38 +1100 (AEDT)", "by mail-lj1-x242.google.com with SMTP id p18so6128454ljc.6\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tFri, 08 Nov 2019 05:01:38 -0800 (PST)", "from prevas-ravi.prevas.se ([81.216.59.226])\n\tby smtp.gmail.com with ESMTPSA id\n\td28sm2454725lfn.33.2019.11.08.05.01.34\n\t(version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n\tFri, 08 Nov 2019 05:01:35 -0800 (PST)" ], "Authentication-Results": [ "ozlabs.org; dmarc=none (p=none dis=none)\n\theader.from=rasmusvillemoes.dk", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=rasmusvillemoes.dk header.i=@rasmusvillemoes.dk\n\theader.b=\"jCP7ncOr\"; dkim-atps=neutral", "lists.ozlabs.org; spf=pass (sender SPF authorized)\n\tsmtp.mailfrom=rasmusvillemoes.dk (client-ip=2a00:1450:4864:20::242;\n\thelo=mail-lj1-x242.google.com; envelope-from=linux@rasmusvillemoes.dk;\n\treceiver=<UNKNOWN>)", "lists.ozlabs.org; dmarc=none (p=none dis=none)\n\theader.from=rasmusvillemoes.dk", "lists.ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=rasmusvillemoes.dk header.i=@rasmusvillemoes.dk\n\theader.b=\"jCP7ncOr\"; dkim-atps=neutral" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=rasmusvillemoes.dk; s=google;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references\n\t:mime-version:content-transfer-encoding;\n\tbh=KLof2Ot2O0jJsk//b5zfFITAj/UOtVeGro1UsWAolSk=;\n\tb=jCP7ncOrlS9V+R3cn5ptO3MSbytb9V/nOEyYaHDdTAuICV+rBxthP4W2CHez0HZDiS\n\tYx5Ju4fDxbp0NxnFiHEjo5QTOyvtFvHRctjxQAvjU2l7kKTy29JWehdL20U6Iybx6HD2\n\tosrcSPnJAZYtH6b9nc/143h02+9RvjyefOv2Q=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:mime-version:content-transfer-encoding;\n\tbh=KLof2Ot2O0jJsk//b5zfFITAj/UOtVeGro1UsWAolSk=;\n\tb=qg9qlCUSnPLFPEQ6fWlMyXCTZldub8i9ilyxNl+xuDIgZRWEySU6qP9bCrxzUkG4li\n\tqNZDMGZNpq09nnyBpFcuhzvyXO91Yd7ViaWXP/7AdRexVO/3swy4wyXbEXqTCLloQHmT\n\tcMECFqAO7e9JkyMjCa5Yixgn4mJX9ZgDRhUAVeNormNjrsGHCn+FZu9hjmqQ3m0nIRE9\n\tXHnpehqumlYds6Twfr7mcBzMn2F4R5XvRWrKNiUwOiGgUzXmaAsJWcAnFRYT9aerSon+\n\tK+yft2ZQ7KaKEysfUYK6nZZJZd7HbIj94KXfmxKTnuWJ8t3ZgrqAHGrREziWj+H8jRVR\n\te7PA==", "X-Gm-Message-State": "APjAAAUBoxLDy+wc5AhjSOglk7FwcFhVAc35+ynNBq/Y391Kbd2gjIF7\n\tr6UotMrz405tJVrhcBUZyUoDoQ==", "X-Google-Smtp-Source": "APXvYqwznZFGp1Fw3DbicIfyzdwRL4WKmsCqwntFcEZldqkryvHNh+dxThjls+WNtclCmbq6A/BMZw==", "X-Received": "by 2002:a2e:9610:: with SMTP id\n\tv16mr6626644ljh.219.1573218095535; \n\tFri, 08 Nov 2019 05:01:35 -0800 (PST)", "From": "Rasmus Villemoes <linux@rasmusvillemoes.dk>", "To": "Qiang Zhao <qiang.zhao@nxp.com>, Li Yang <leoyang.li@nxp.com>,\n\tChristophe Leroy <christophe.leroy@c-s.fr>", "Subject": "[PATCH v4 06/47] soc: fsl: qe: replace spin_event_timeout by\n\treadx_poll_timeout_atomic", "Date": "Fri, 8 Nov 2019 14:00:42 +0100", "Message-Id": "<20191108130123.6839-7-linux@rasmusvillemoes.dk>", "X-Mailer": "git-send-email 2.23.0", "In-Reply-To": "<20191108130123.6839-1-linux@rasmusvillemoes.dk>", "References": "<20191108130123.6839-1-linux@rasmusvillemoes.dk>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "Scott Wood <oss@buserror.net>,\n\tRasmus Villemoes <linux@rasmusvillemoes.dk>, \n\tlinuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "In preparation for allowing QE to be built for architectures other\nthan ppc, use the generic readx_poll_timeout_atomic() helper from\niopoll.h rather than the ppc-only spin_event_timeout().\n\nSigned-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>\n---\n drivers/soc/fsl/qe/qe.c | 13 +++++++------\n 1 file changed, 7 insertions(+), 6 deletions(-)", "diff": "diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c\nindex 456bd7416876..85737e6f5b62 100644\n--- a/drivers/soc/fsl/qe/qe.c\n+++ b/drivers/soc/fsl/qe/qe.c\n@@ -22,6 +22,7 @@\n #include <linux/module.h>\n #include <linux/delay.h>\n #include <linux/ioport.h>\n+#include <linux/iopoll.h>\n #include <linux/crc32.h>\n #include <linux/mod_devicetable.h>\n #include <linux/of_platform.h>\n@@ -108,7 +109,8 @@ int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input)\n {\n \tunsigned long flags;\n \tu8 mcn_shift = 0, dev_shift = 0;\n-\tu32 ret;\n+\tu32 val;\n+\tint ret;\n \n \tspin_lock_irqsave(&qe_lock, flags);\n \tif (cmd == QE_RESET) {\n@@ -135,13 +137,12 @@ int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input)\n \t}\n \n \t/* wait for the QE_CR_FLG to clear */\n-\tret = spin_event_timeout((qe_ioread32be(&qe_immr->cp.cecr) & QE_CR_FLG) == 0,\n-\t\t\t\t 100, 0);\n-\t/* On timeout (e.g. failure), the expression will be false (ret == 0),\n-\t otherwise it will be true (ret == 1). */\n+\tret = readx_poll_timeout_atomic(qe_ioread32be, &qe_immr->cp.cecr, val,\n+\t\t\t\t\t(val & QE_CR_FLG) == 0, 0, 100);\n+\t/* On timeout, ret is -ETIMEDOUT, otherwise it will be 0. */\n \tspin_unlock_irqrestore(&qe_lock, flags);\n \n-\treturn ret == 1;\n+\treturn ret == 0;\n }\n EXPORT_SYMBOL(qe_issue_cmd);\n \n", "prefixes": [ "v4", "06/47" ] }