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GET /api/patches/1189931/?format=api
{ "id": 1189931, "url": "http://patchwork.ozlabs.org/api/patches/1189931/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20191105122214.50556-1-alice.michael@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20191105122214.50556-1-alice.michael@intel.com>", "list_archive_url": null, "date": "2019-11-05T12:22:14", "name": "iavf: initialize ITRN registers with correct values", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "ccc120591e8003897da09367d23e6974e84c75f8", "submitter": { "id": 71123, "url": "http://patchwork.ozlabs.org/api/people/71123/?format=api", "name": "Michael, Alice", "email": "alice.michael@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20191105122214.50556-1-alice.michael@intel.com/mbox/", "series": [ { "id": 140895, "url": "http://patchwork.ozlabs.org/api/series/140895/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=140895", "date": "2019-11-05T12:22:14", "name": "iavf: initialize ITRN registers with correct values", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/140895/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1189931/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1189931/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org; spf=pass (sender SPF authorized)\n\tsmtp.mailfrom=osuosl.org (client-ip=140.211.166.136;\n\thelo=silver.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 4771rr50Hsz9sP3\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 6 Nov 2019 07:45:32 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 1DF9022650;\n\tTue, 5 Nov 2019 20:45:31 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id Wbf66xHDefdd; Tue, 5 Nov 2019 20:45:29 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby silver.osuosl.org (Postfix) with ESMTP id E8A0022225;\n\tTue, 5 Nov 2019 20:45:29 +0000 (UTC)", "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\tby ash.osuosl.org (Postfix) with ESMTP id AFF8F1BF334\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 5 Nov 2019 20:45:28 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 34FFE87605\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 5 Nov 2019 20:45:28 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 1nz3A4lecMvy for <intel-wired-lan@lists.osuosl.org>;\n\tTue, 5 Nov 2019 20:45:27 +0000 (UTC)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n\tby whitealder.osuosl.org (Postfix) with ESMTPS id 50D2787034\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 5 Nov 2019 20:45:27 +0000 (UTC)", "from orsmga005.jf.intel.com ([10.7.209.41])\n\tby fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t05 Nov 2019 12:45:26 -0800", "from alicemic-1.jf.intel.com ([10.166.17.62])\n\tby orsmga005.jf.intel.com with ESMTP; 05 Nov 2019 12:45:26 -0800" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.68,271,1569308400\"; d=\"scan'208\";a=\"376820621\"", "From": "Alice Michael <alice.michael@intel.com>", "To": "alice.michael@intel.com,\n\tintel-wired-lan@lists.osuosl.org", "Date": "Tue, 5 Nov 2019 04:22:14 -0800", "Message-Id": "<20191105122214.50556-1-alice.michael@intel.com>", "X-Mailer": "git-send-email 2.21.0", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [PATCH] iavf: initialize ITRN registers with\n\tcorrect values", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "From: Nicholas Nunley <nicholas.d.nunley@intel.com>\n\nSince commit 92418fb14750 (\"i40e/i40evf: Use usec value instead of reg\nvalue for ITR defines\") the driver tracks the interrupt throttling\nintervals in single usec units, although the actual ITRN registers are\nprogrammed in 2 usec units. Most register programming flows in the driver\ncorrectly handle the conversion, although it is currently not applied when\nthe registers are initialized to their default values. Most of the time\nthis doesn't present a problem since the default values are usually\nimmediately overwritten through the standard adaptive throttling mechanism,\nor updated manually by the user, but if adaptive throttling is disabled and\nthe interval values are left alone then the incorrect value will persist.\n\nSince the intended default interval of 50 usecs (vs. 100 usecs as\nprogrammed) performs better for most traffic workloads, this can lead to\nperformance regressions.\n\nThis patch adds the correct conversion when writing the initial values to\nthe ITRN registers.\n\nSigned-off-by: Nicholas Nunley <nicholas.d.nunley@intel.com>\n---\n drivers/net/ethernet/intel/iavf/iavf_main.c | 4 ++--\n 1 file changed, 2 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/iavf/iavf_main.c b/drivers/net/ethernet/intel/iavf/iavf_main.c\nindex 8f310e520b06..821987da5698 100644\n--- a/drivers/net/ethernet/intel/iavf/iavf_main.c\n+++ b/drivers/net/ethernet/intel/iavf/iavf_main.c\n@@ -314,7 +314,7 @@ iavf_map_vector_to_rxq(struct iavf_adapter *adapter, int v_idx, int r_idx)\n \tq_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting);\n \tq_vector->ring_mask |= BIT(r_idx);\n \twr32(hw, IAVF_VFINT_ITRN1(IAVF_RX_ITR, q_vector->reg_idx),\n-\t q_vector->rx.current_itr);\n+\t q_vector->rx.current_itr >> 1);\n \tq_vector->rx.current_itr = q_vector->rx.target_itr;\n }\n \n@@ -340,7 +340,7 @@ iavf_map_vector_to_txq(struct iavf_adapter *adapter, int v_idx, int t_idx)\n \tq_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting);\n \tq_vector->num_ringpairs++;\n \twr32(hw, IAVF_VFINT_ITRN1(IAVF_TX_ITR, q_vector->reg_idx),\n-\t q_vector->tx.target_itr);\n+\t q_vector->tx.target_itr >> 1);\n \tq_vector->tx.current_itr = q_vector->tx.target_itr;\n }\n \n", "prefixes": [] }