Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/1184478/?format=api
{ "id": 1184478, "url": "http://patchwork.ozlabs.org/api/patches/1184478/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20191025143441.50151-14-anthony.l.nguyen@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20191025143441.50151-14-anthony.l.nguyen@intel.com>", "list_archive_url": null, "date": "2019-10-25T14:34:40", "name": "[S32,14/15] ice: use more accurate ICE_DBG mask types", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "8d0276826186fbd9420cd354e1882481dd8df73d", "submitter": { "id": 68875, "url": "http://patchwork.ozlabs.org/api/people/68875/?format=api", "name": "Tony Nguyen", "email": "anthony.l.nguyen@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20191025143441.50151-14-anthony.l.nguyen@intel.com/mbox/", "series": [ { "id": 138814, "url": "http://patchwork.ozlabs.org/api/series/138814/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=138814", "date": "2019-10-25T14:34:39", "name": "[S32,01/15] ice: Use ice_ena_vsi and ice_dis_vsi in DCB configuration flow", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/138814/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1184478/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1184478/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org; spf=pass (sender SPF authorized)\n\tsmtp.mailfrom=osuosl.org (client-ip=140.211.166.136;\n\thelo=silver.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 470KTF5jcPz9sP4\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 26 Oct 2019 10:05:21 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 57C5523B7F;\n\tFri, 25 Oct 2019 23:05:20 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id j2GpMKcUi49q; Fri, 25 Oct 2019 23:05:16 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby silver.osuosl.org (Postfix) with ESMTP id E52C223E6B;\n\tFri, 25 Oct 2019 23:05:15 +0000 (UTC)", "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\tby ash.osuosl.org (Postfix) with ESMTP id D39E61BF9CC\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 25 Oct 2019 23:05:12 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id AC27186B8D\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 25 Oct 2019 23:05:12 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id FQlbCJ1JT01r for <intel-wired-lan@lists.osuosl.org>;\n\tFri, 25 Oct 2019 23:05:11 +0000 (UTC)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n\tby fraxinus.osuosl.org (Postfix) with ESMTPS id B9E5286B8E\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 25 Oct 2019 23:05:11 +0000 (UTC)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t25 Oct 2019 16:05:09 -0700", "from unknown (HELO localhost.jf.intel.com) ([10.166.244.174])\n\tby orsmga002.jf.intel.com with ESMTP; 25 Oct 2019 16:05:08 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.68,230,1569308400\"; d=\"scan'208\";a=\"210868749\"", "From": "Tony Nguyen <anthony.l.nguyen@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Fri, 25 Oct 2019 07:34:40 -0700", "Message-Id": "<20191025143441.50151-14-anthony.l.nguyen@intel.com>", "X-Mailer": "git-send-email 2.20.1", "In-Reply-To": "<20191025143441.50151-1-anthony.l.nguyen@intel.com>", "References": "<20191025143441.50151-1-anthony.l.nguyen@intel.com>", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [PATCH S32 14/15] ice: use more accurate ICE_DBG\n\tmask types", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "From: Jacob Keller <jacob.e.keller@intel.com>\n\nice_debug_cq is passed a mask which is always ICE_DBG_AQ_CMD. Modify this\nfunction, removing the mask parameter entirely, and directly use the more\nappropriate ICE_DBG_AQ_DESC and ICE_DBG_AQ_DESC_BUF.\n\nThe function is only called from ice_controlq.c, and has no\nother callers outside of that file. Move it and mark it static to avoid\nnamespace pollution.\n\nSigned-off-by: Jacob Keller <jacob.e.keller@intel.com>\nSigned-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>\n---\n drivers/net/ethernet/intel/ice/ice_common.c | 50 ----------------\n drivers/net/ethernet/intel/ice/ice_common.h | 2 -\n drivers/net/ethernet/intel/ice/ice_controlq.c | 57 +++++++++++++++++--\n drivers/net/ethernet/intel/ice/ice_type.h | 2 +\n 4 files changed, 53 insertions(+), 58 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c\nindex eb01c218c596..2c0dd2e2c232 100644\n--- a/drivers/net/ethernet/intel/ice/ice_common.c\n+++ b/drivers/net/ethernet/intel/ice/ice_common.c\n@@ -1273,56 +1273,6 @@ const struct ice_ctx_ele ice_tlan_ctx_info[] = {\n \t{ 0 }\n };\n \n-/**\n- * ice_debug_cq\n- * @hw: pointer to the hardware structure\n- * @mask: debug mask\n- * @desc: pointer to control queue descriptor\n- * @buf: pointer to command buffer\n- * @buf_len: max length of buf\n- *\n- * Dumps debug log about control command with descriptor contents.\n- */\n-void\n-ice_debug_cq(struct ice_hw *hw, u32 __maybe_unused mask, void *desc, void *buf,\n-\t u16 buf_len)\n-{\n-\tstruct ice_aq_desc *cq_desc = (struct ice_aq_desc *)desc;\n-\tu16 len;\n-\n-#ifndef CONFIG_DYNAMIC_DEBUG\n-\tif (!(mask & hw->debug_mask))\n-\t\treturn;\n-#endif\n-\n-\tif (!desc)\n-\t\treturn;\n-\n-\tlen = le16_to_cpu(cq_desc->datalen);\n-\n-\tice_debug(hw, mask,\n-\t\t \"CQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\\n\",\n-\t\t le16_to_cpu(cq_desc->opcode),\n-\t\t le16_to_cpu(cq_desc->flags),\n-\t\t le16_to_cpu(cq_desc->datalen), le16_to_cpu(cq_desc->retval));\n-\tice_debug(hw, mask, \"\\tcookie (h,l) 0x%08X 0x%08X\\n\",\n-\t\t le32_to_cpu(cq_desc->cookie_high),\n-\t\t le32_to_cpu(cq_desc->cookie_low));\n-\tice_debug(hw, mask, \"\\tparam (0,1) 0x%08X 0x%08X\\n\",\n-\t\t le32_to_cpu(cq_desc->params.generic.param0),\n-\t\t le32_to_cpu(cq_desc->params.generic.param1));\n-\tice_debug(hw, mask, \"\\taddr (h,l) 0x%08X 0x%08X\\n\",\n-\t\t le32_to_cpu(cq_desc->params.generic.addr_high),\n-\t\t le32_to_cpu(cq_desc->params.generic.addr_low));\n-\tif (buf && cq_desc->datalen != 0) {\n-\t\tice_debug(hw, mask, \"Buffer:\\n\");\n-\t\tif (buf_len < len)\n-\t\t\tlen = buf_len;\n-\n-\t\tice_debug_array(hw, mask, 16, 1, (u8 *)buf, len);\n-\t}\n-}\n-\n /* FW Admin Queue command wrappers */\n \n /* Software lock/mutex that is meant to be held while the Global Config Lock\ndiff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h\nindex c17c5724d33b..63d7963221a0 100644\n--- a/drivers/net/ethernet/intel/ice/ice_common.h\n+++ b/drivers/net/ethernet/intel/ice/ice_common.h\n@@ -20,8 +20,6 @@ enum ice_fw_modes {\n \n enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw);\n \n-void\n-ice_debug_cq(struct ice_hw *hw, u32 mask, void *desc, void *buf, u16 buf_len);\n enum ice_status ice_init_hw(struct ice_hw *hw);\n void ice_deinit_hw(struct ice_hw *hw);\n enum ice_status\ndiff --git a/drivers/net/ethernet/intel/ice/ice_controlq.c b/drivers/net/ethernet/intel/ice/ice_controlq.c\nindex c68709c7ef81..947728aada46 100644\n--- a/drivers/net/ethernet/intel/ice/ice_controlq.c\n+++ b/drivers/net/ethernet/intel/ice/ice_controlq.c\n@@ -809,6 +809,52 @@ static u16 ice_clean_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)\n \treturn ICE_CTL_Q_DESC_UNUSED(sq);\n }\n \n+/**\n+ * ice_debug_cq\n+ * @hw: pointer to the hardware structure\n+ * @desc: pointer to control queue descriptor\n+ * @buf: pointer to command buffer\n+ * @buf_len: max length of buf\n+ *\n+ * Dumps debug log about control command with descriptor contents.\n+ */\n+static void ice_debug_cq(struct ice_hw *hw, void *desc, void *buf, u16 buf_len)\n+{\n+\tstruct ice_aq_desc *cq_desc = (struct ice_aq_desc *)desc;\n+\tu16 len;\n+\n+\tif (!IS_ENABLED(CONFIG_DYNAMIC_DEBUG) &&\n+\t !((ICE_DBG_AQ_DESC | ICE_DBG_AQ_DESC_BUF) & hw->debug_mask))\n+\t\treturn;\n+\n+\tif (!desc)\n+\t\treturn;\n+\n+\tlen = le16_to_cpu(cq_desc->datalen);\n+\n+\tice_debug(hw, ICE_DBG_AQ_DESC,\n+\t\t \"CQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\\n\",\n+\t\t le16_to_cpu(cq_desc->opcode),\n+\t\t le16_to_cpu(cq_desc->flags),\n+\t\t le16_to_cpu(cq_desc->datalen), le16_to_cpu(cq_desc->retval));\n+\tice_debug(hw, ICE_DBG_AQ_DESC, \"\\tcookie (h,l) 0x%08X 0x%08X\\n\",\n+\t\t le32_to_cpu(cq_desc->cookie_high),\n+\t\t le32_to_cpu(cq_desc->cookie_low));\n+\tice_debug(hw, ICE_DBG_AQ_DESC, \"\\tparam (0,1) 0x%08X 0x%08X\\n\",\n+\t\t le32_to_cpu(cq_desc->params.generic.param0),\n+\t\t le32_to_cpu(cq_desc->params.generic.param1));\n+\tice_debug(hw, ICE_DBG_AQ_DESC, \"\\taddr (h,l) 0x%08X 0x%08X\\n\",\n+\t\t le32_to_cpu(cq_desc->params.generic.addr_high),\n+\t\t le32_to_cpu(cq_desc->params.generic.addr_low));\n+\tif (buf && cq_desc->datalen != 0) {\n+\t\tice_debug(hw, ICE_DBG_AQ_DESC_BUF, \"Buffer:\\n\");\n+\t\tif (buf_len < len)\n+\t\t\tlen = buf_len;\n+\n+\t\tice_debug_array(hw, ICE_DBG_AQ_DESC_BUF, 16, 1, (u8 *)buf, len);\n+\t}\n+}\n+\n /**\n * ice_sq_done - check if FW has processed the Admin Send Queue (ATQ)\n * @hw: pointer to the HW struct\n@@ -934,10 +980,10 @@ ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,\n \t}\n \n \t/* Debug desc and buffer */\n-\tice_debug(hw, ICE_DBG_AQ_MSG,\n+\tice_debug(hw, ICE_DBG_AQ_DESC,\n \t\t \"ATQ: Control Send queue desc and buffer:\\n\");\n \n-\tice_debug_cq(hw, ICE_DBG_AQ_CMD, (void *)desc_on_ring, buf, buf_size);\n+\tice_debug_cq(hw, (void *)desc_on_ring, buf, buf_size);\n \n \t(cq->sq.next_to_use)++;\n \tif (cq->sq.next_to_use == cq->sq.count)\n@@ -986,7 +1032,7 @@ ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,\n \tice_debug(hw, ICE_DBG_AQ_MSG,\n \t\t \"ATQ: desc and buffer writeback:\\n\");\n \n-\tice_debug_cq(hw, ICE_DBG_AQ_CMD, (void *)desc, buf, buf_size);\n+\tice_debug_cq(hw, (void *)desc, buf, buf_size);\n \n \t/* save writeback AQ if requested */\n \tif (details->wb_desc)\n@@ -1084,10 +1130,9 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,\n \tif (e->msg_buf && e->msg_len)\n \t\tmemcpy(e->msg_buf, cq->rq.r.rq_bi[desc_idx].va, e->msg_len);\n \n-\tice_debug(hw, ICE_DBG_AQ_MSG, \"ARQ: desc and buffer:\\n\");\n+\tice_debug(hw, ICE_DBG_AQ_DESC, \"ARQ: desc and buffer:\\n\");\n \n-\tice_debug_cq(hw, ICE_DBG_AQ_CMD, (void *)desc, e->msg_buf,\n-\t\t cq->rq_buf_size);\n+\tice_debug_cq(hw, (void *)desc, e->msg_buf, cq->rq_buf_size);\n \n \t/* Restore the original datalen and buffer address in the desc,\n \t * FW updates datalen to indicate the event message size\ndiff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h\nindex d3d7049c97f0..eba8b04b8cbd 100644\n--- a/drivers/net/ethernet/intel/ice/ice_type.h\n+++ b/drivers/net/ethernet/intel/ice/ice_type.h\n@@ -46,6 +46,8 @@ static inline u32 ice_round_to_num(u32 N, u32 R)\n #define ICE_DBG_PKG\t\tBIT_ULL(16)\n #define ICE_DBG_RES\t\tBIT_ULL(17)\n #define ICE_DBG_AQ_MSG\t\tBIT_ULL(24)\n+#define ICE_DBG_AQ_DESC\t\tBIT_ULL(25)\n+#define ICE_DBG_AQ_DESC_BUF\tBIT_ULL(26)\n #define ICE_DBG_AQ_CMD\t\tBIT_ULL(27)\n #define ICE_DBG_USER\t\tBIT_ULL(31)\n \n", "prefixes": [ "S32", "14/15" ] }