Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/1178235/?format=api
{ "id": 1178235, "url": "http://patchwork.ozlabs.org/api/patches/1178235/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20191016150201.41597-2-anthony.l.nguyen@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20191016150201.41597-2-anthony.l.nguyen@intel.com>", "list_archive_url": null, "date": "2019-10-16T15:01:54", "name": "[S30,v2,2/9] ice: get rid of per-tc flow in Tx queue configuration routines", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "25e313b2f5675c58a1e21aa989c434c6fb4849da", "submitter": { "id": 68875, "url": "http://patchwork.ozlabs.org/api/people/68875/?format=api", "name": "Tony Nguyen", "email": "anthony.l.nguyen@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20191016150201.41597-2-anthony.l.nguyen@intel.com/mbox/", "series": [ { "id": 136670, "url": "http://patchwork.ozlabs.org/api/series/136670/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=136670", "date": "2019-10-16T15:01:54", "name": "[S30,v2,1/9] ice: Introduce ice_base.c", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/136670/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1178235/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1178235/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org; spf=pass (sender SPF authorized)\n\tsmtp.mailfrom=osuosl.org (client-ip=140.211.166.137;\n\thelo=fraxinus.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 46tpVT2tvzz9sNw\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 17 Oct 2019 10:32:16 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 404E186BA3;\n\tWed, 16 Oct 2019 23:32:14 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 3jA2ljfF8cY8; Wed, 16 Oct 2019 23:32:11 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id D0B8386B18;\n\tWed, 16 Oct 2019 23:32:11 +0000 (UTC)", "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ash.osuosl.org (Postfix) with ESMTP id 8FBB91BF5A1\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 16 Oct 2019 23:32:09 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 689D18853D\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 16 Oct 2019 23:32:09 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id YoQ2x8CAQI93 for <intel-wired-lan@lists.osuosl.org>;\n\tWed, 16 Oct 2019 23:32:08 +0000 (UTC)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n\tby hemlock.osuosl.org (Postfix) with ESMTPS id D76D48786C\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 16 Oct 2019 23:32:07 +0000 (UTC)", "from orsmga007.jf.intel.com ([10.7.209.58])\n\tby fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t16 Oct 2019 16:32:07 -0700", "from unknown (HELO localhost.jf.intel.com) ([10.166.244.174])\n\tby orsmga007.jf.intel.com with ESMTP; 16 Oct 2019 16:32:06 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.67,305,1566889200\"; d=\"scan'208\";a=\"186310790\"", "From": "Tony Nguyen <anthony.l.nguyen@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Wed, 16 Oct 2019 08:01:54 -0700", "Message-Id": "<20191016150201.41597-2-anthony.l.nguyen@intel.com>", "X-Mailer": "git-send-email 2.20.1", "In-Reply-To": "<20191016150201.41597-1-anthony.l.nguyen@intel.com>", "References": "<20191016150201.41597-1-anthony.l.nguyen@intel.com>", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [PATCH S30 v2 2/9] ice: get rid of per-tc flow in\n\tTx queue configuration routines", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "From: Maciej Fijalkowski <maciej.fijalkowski@intel.com>\n\nThere's no reason for treating DCB as first class citizen when configuring\nthe Tx queues and going through TCs. Reverse the logic and base the\nconfiguration logic on rings, which is the object of interest anyway.\n\nSigned-off-by: Maciej Fijalkowski <maciej.fijalkowski@intel.com>\nSigned-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>\n---\n drivers/net/ethernet/intel/ice/ice_base.c | 29 +++++++++--\n drivers/net/ethernet/intel/ice/ice_base.h | 4 +-\n drivers/net/ethernet/intel/ice/ice_lib.c | 63 ++++++++---------------\n 3 files changed, 47 insertions(+), 49 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ice/ice_base.c b/drivers/net/ethernet/intel/ice/ice_base.c\nindex 735922a4d632..1dd9c18ecd8c 100644\n--- a/drivers/net/ethernet/intel/ice/ice_base.c\n+++ b/drivers/net/ethernet/intel/ice/ice_base.c\n@@ -190,6 +190,21 @@ static void ice_cfg_itr_gran(struct ice_hw *hw)\n \twr32(hw, GLINT_CTL, regval);\n }\n \n+/**\n+ * ice_calc_q_handle - calculate the queue handle\n+ * @vsi: VSI that ring belongs to\n+ * @ring: ring to get the absolute queue index\n+ * @tc: traffic class number\n+ */\n+static u16 ice_calc_q_handle(struct ice_vsi *vsi, struct ice_ring *ring, u8 tc)\n+{\n+\t/* idea here for calculation is that we subtract the number of queue\n+\t * count from TC that ring belongs to from it's absolute queue index\n+\t * and as a result we get the queue's index within TC.\n+\t */\n+\treturn ring->q_index - vsi->tc_cfg.tc_info[tc].qoffset;\n+}\n+\n /**\n * ice_setup_tx_ctx - setup a struct ice_tlan_ctx instance\n * @ring: The Tx ring to configure\n@@ -522,13 +537,11 @@ void ice_vsi_free_q_vectors(struct ice_vsi *vsi)\n * ice_vsi_cfg_txq - Configure single Tx queue\n * @vsi: the VSI that queue belongs to\n * @ring: Tx ring to be configured\n- * @tc_q_idx: queue index within given TC\n * @qg_buf: queue group buffer\n- * @tc: TC that Tx ring belongs to\n */\n int\n-ice_vsi_cfg_txq(struct ice_vsi *vsi, struct ice_ring *ring, u16 tc_q_idx,\n-\t\tstruct ice_aqc_add_tx_qgrp *qg_buf, u8 tc)\n+ice_vsi_cfg_txq(struct ice_vsi *vsi, struct ice_ring *ring,\n+\t\tstruct ice_aqc_add_tx_qgrp *qg_buf)\n {\n \tstruct ice_tlan_ctx tlan_ctx = { 0 };\n \tstruct ice_aqc_add_txqs_perq *txq;\n@@ -536,6 +549,7 @@ ice_vsi_cfg_txq(struct ice_vsi *vsi, struct ice_ring *ring, u16 tc_q_idx,\n \tu8 buf_len = sizeof(*qg_buf);\n \tenum ice_status status;\n \tu16 pf_q;\n+\tu8 tc;\n \n \tpf_q = ring->reg_idx;\n \tice_setup_tx_ctx(ring, &tlan_ctx, pf_q);\n@@ -549,10 +563,15 @@ ice_vsi_cfg_txq(struct ice_vsi *vsi, struct ice_ring *ring, u16 tc_q_idx,\n \t */\n \tring->tail = pf->hw.hw_addr + QTX_COMM_DBELL(pf_q);\n \n+\tif (IS_ENABLED(CONFIG_DCB))\n+\t\ttc = ring->dcb_tc;\n+\telse\n+\t\ttc = 0;\n+\n \t/* Add unique software queue handle of the Tx queue per\n \t * TC into the VSI Tx ring\n \t */\n-\tring->q_handle = tc_q_idx;\n+\tring->q_handle = ice_calc_q_handle(vsi, ring, tc);\n \n \tstatus = ice_ena_vsi_txq(vsi->port_info, vsi->idx, tc, ring->q_handle,\n \t\t\t\t 1, qg_buf, buf_len, NULL);\ndiff --git a/drivers/net/ethernet/intel/ice/ice_base.h b/drivers/net/ethernet/intel/ice/ice_base.h\nindex db456862b35b..407995e8e944 100644\n--- a/drivers/net/ethernet/intel/ice/ice_base.h\n+++ b/drivers/net/ethernet/intel/ice/ice_base.h\n@@ -13,8 +13,8 @@ int ice_vsi_alloc_q_vectors(struct ice_vsi *vsi);\n void ice_vsi_map_rings_to_vectors(struct ice_vsi *vsi);\n void ice_vsi_free_q_vectors(struct ice_vsi *vsi);\n int\n-ice_vsi_cfg_txq(struct ice_vsi *vsi, struct ice_ring *ring, u16 tc_q_idx,\n-\t\tstruct ice_aqc_add_tx_qgrp *qg_buf, u8 tc);\n+ice_vsi_cfg_txq(struct ice_vsi *vsi, struct ice_ring *ring,\n+\t\tstruct ice_aqc_add_tx_qgrp *qg_buf);\n void ice_cfg_itr(struct ice_hw *hw, struct ice_q_vector *q_vector);\n void\n ice_cfg_txq_interrupt(struct ice_vsi *vsi, u16 txq, u16 msix_idx, u16 itr_idx);\ndiff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c\nindex fe7f43d2e734..74c3bd191671 100644\n--- a/drivers/net/ethernet/intel/ice/ice_lib.c\n+++ b/drivers/net/ethernet/intel/ice/ice_lib.c\n@@ -1260,42 +1260,31 @@ int ice_vsi_cfg_rxqs(struct ice_vsi *vsi)\n * ice_vsi_cfg_txqs - Configure the VSI for Tx\n * @vsi: the VSI being configured\n * @rings: Tx ring array to be configured\n- * @offset: offset within vsi->txq_map\n *\n * Return 0 on success and a negative value on error\n * Configure the Tx VSI for operation.\n */\n static int\n-ice_vsi_cfg_txqs(struct ice_vsi *vsi, struct ice_ring **rings, int offset)\n+ice_vsi_cfg_txqs(struct ice_vsi *vsi, struct ice_ring **rings)\n {\n \tstruct ice_aqc_add_tx_qgrp *qg_buf;\n-\tstruct ice_pf *pf = vsi->back;\n-\tu16 q_idx = 0, i;\n+\tu16 q_idx = 0;\n \tint err = 0;\n-\tu8 tc;\n \n-\tqg_buf = devm_kzalloc(&pf->pdev->dev, sizeof(*qg_buf), GFP_KERNEL);\n+\tqg_buf = kzalloc(sizeof(*qg_buf), GFP_KERNEL);\n \tif (!qg_buf)\n \t\treturn -ENOMEM;\n \n \tqg_buf->num_txqs = 1;\n \n-\t/* set up and configure the Tx queues for each enabled TC */\n-\tice_for_each_traffic_class(tc) {\n-\t\tif (!(vsi->tc_cfg.ena_tc & BIT(tc)))\n-\t\t\tbreak;\n-\n-\t\tfor (i = 0; i < vsi->tc_cfg.tc_info[tc].qcount_tx; i++) {\n-\t\t\terr = ice_vsi_cfg_txq(vsi, rings[q_idx], i + offset,\n-\t\t\t\t\t qg_buf, tc);\n-\t\t\tif (err)\n-\t\t\t\tgoto err_cfg_txqs;\n-\n-\t\t\tq_idx++;\n-\t\t}\n+\tfor (q_idx = 0; q_idx < vsi->num_txq; q_idx++) {\n+\t\terr = ice_vsi_cfg_txq(vsi, rings[q_idx], qg_buf);\n+\t\tif (err)\n+\t\t\tgoto err_cfg_txqs;\n \t}\n+\n err_cfg_txqs:\n-\tdevm_kfree(&pf->pdev->dev, qg_buf);\n+\tkfree(qg_buf);\n \treturn err;\n }\n \n@@ -1308,7 +1297,7 @@ ice_vsi_cfg_txqs(struct ice_vsi *vsi, struct ice_ring **rings, int offset)\n */\n int ice_vsi_cfg_lan_txqs(struct ice_vsi *vsi)\n {\n-\treturn ice_vsi_cfg_txqs(vsi, vsi->tx_rings, 0);\n+\treturn ice_vsi_cfg_txqs(vsi, vsi->tx_rings);\n }\n \n /**\n@@ -1498,34 +1487,24 @@ static int\n ice_vsi_stop_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src,\n \t\t u16 rel_vmvf_num, struct ice_ring **rings)\n {\n-\tu16 i, q_idx = 0;\n-\tint status;\n-\tu8 tc;\n+\tu16 q_idx;\n \n \tif (vsi->num_txq > ICE_LAN_TXQ_MAX_QDIS)\n \t\treturn -EINVAL;\n \n-\t/* set up the Tx queue list to be disabled for each enabled TC */\n-\tice_for_each_traffic_class(tc) {\n-\t\tif (!(vsi->tc_cfg.ena_tc & BIT(tc)))\n-\t\t\tbreak;\n-\n-\t\tfor (i = 0; i < vsi->tc_cfg.tc_info[tc].qcount_tx; i++) {\n-\t\t\tstruct ice_txq_meta txq_meta = { };\n+\tfor (q_idx = 0; q_idx < vsi->num_txq; q_idx++) {\n+\t\tstruct ice_txq_meta txq_meta = { };\n+\t\tint status;\n \n-\t\t\tif (!rings || !rings[q_idx])\n-\t\t\t\treturn -EINVAL;\n+\t\tif (!rings || !rings[q_idx])\n+\t\t\treturn -EINVAL;\n \n-\t\t\tice_fill_txq_meta(vsi, rings[q_idx], &txq_meta);\n-\t\t\tstatus = ice_vsi_stop_tx_ring(vsi, rst_src,\n-\t\t\t\t\t\t rel_vmvf_num,\n-\t\t\t\t\t\t rings[q_idx], &txq_meta);\n+\t\tice_fill_txq_meta(vsi, rings[q_idx], &txq_meta);\n+\t\tstatus = ice_vsi_stop_tx_ring(vsi, rst_src, rel_vmvf_num,\n+\t\t\t\t\t rings[q_idx], &txq_meta);\n \n-\t\t\tif (status)\n-\t\t\t\treturn status;\n-\n-\t\t\tq_idx++;\n-\t\t}\n+\t\tif (status)\n+\t\t\treturn status;\n \t}\n \n \treturn 0;\n", "prefixes": [ "S30", "v2", "2/9" ] }