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GET /api/patches/1174134/?format=api
{ "id": 1174134, "url": "http://patchwork.ozlabs.org/api/patches/1174134/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20191009140925.13997-7-anthony.l.nguyen@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20191009140925.13997-7-anthony.l.nguyen@intel.com>", "list_archive_url": null, "date": "2019-10-09T14:09:23", "name": "[S30,7/9] ice: introduce frame padding computation logic", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "b7e875eb575d71918e51ff8d1c2c0a68d7bba610", "submitter": { "id": 68875, "url": "http://patchwork.ozlabs.org/api/people/68875/?format=api", "name": "Tony Nguyen", "email": "anthony.l.nguyen@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20191009140925.13997-7-anthony.l.nguyen@intel.com/mbox/", "series": [ { "id": 135202, "url": "http://patchwork.ozlabs.org/api/series/135202/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=135202", "date": "2019-10-09T14:09:18", "name": "[S30,1/9] ice: Introduce ice_base.c", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/135202/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1174134/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1174134/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.137; helo=fraxinus.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 46pTg75pzFz9sCJ\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 10 Oct 2019 09:39:47 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 2F5D9844DC;\n\tWed, 9 Oct 2019 22:39:46 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 2OQECvUcJzkd; Wed, 9 Oct 2019 22:39:43 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 831A4844BA;\n\tWed, 9 Oct 2019 22:39:41 +0000 (UTC)", "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ash.osuosl.org (Postfix) with ESMTP id 0C9BA1BF3CC\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 9 Oct 2019 22:39:39 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 09457883D6\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 9 Oct 2019 22:39:39 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id iM4bZyus3xwS for <intel-wired-lan@lists.osuosl.org>;\n\tWed, 9 Oct 2019 22:39:38 +0000 (UTC)", "from mga06.intel.com (mga06.intel.com [134.134.136.31])\n\tby hemlock.osuosl.org (Postfix) with ESMTPS id D2C588835E\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 9 Oct 2019 22:39:37 +0000 (UTC)", "from orsmga007.jf.intel.com ([10.7.209.58])\n\tby orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t09 Oct 2019 15:39:34 -0700", "from unknown (HELO localhost.jf.intel.com) ([10.166.244.174])\n\tby orsmga007.jf.intel.com with ESMTP; 09 Oct 2019 15:39:33 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.67,277,1566889200\"; d=\"scan'208\";a=\"184218359\"", "From": "Tony Nguyen <anthony.l.nguyen@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Wed, 9 Oct 2019 07:09:23 -0700", "Message-Id": "<20191009140925.13997-7-anthony.l.nguyen@intel.com>", "X-Mailer": "git-send-email 2.20.1", "In-Reply-To": "<20191009140925.13997-1-anthony.l.nguyen@intel.com>", "References": "<20191009140925.13997-1-anthony.l.nguyen@intel.com>", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [PATCH S30 7/9] ice: introduce frame padding\n\tcomputation logic", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "From: Maciej Fijalkowski <maciej.fijalkowski@intel.com>\n\nTake into account the underlying architecture specific settings and\nbased on that calculate the possible padding that can be supplied.\nTypically, for x86 and standard MTU size we will end up with 192 bytes\nof headroom. This is the same behavior as our other drivers have and we\ncan dedicate it for XDP purposes.\n\nFurthermore, introduce the Rx ring flag for indicating whether build_skb\nis used on particular. Based on that invoke the routines for padding\ncalculation.\n\nSigned-off-by: Maciej Fijalkowski <maciej.fijalkowski@intel.com>\nSigned-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>\n---\n drivers/net/ethernet/intel/ice/ice_base.c | 6 ++\n drivers/net/ethernet/intel/ice/ice_ethtool.c | 2 +-\n drivers/net/ethernet/intel/ice/ice_lib.c | 3 +-\n drivers/net/ethernet/intel/ice/ice_txrx.c | 42 +++++-----\n drivers/net/ethernet/intel/ice/ice_txrx.h | 81 ++++++++++++++++++++\n 5 files changed, 114 insertions(+), 20 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ice/ice_base.c b/drivers/net/ethernet/intel/ice/ice_base.c\nindex 4db042e88476..afc70515bff0 100644\n--- a/drivers/net/ethernet/intel/ice/ice_base.c\n+++ b/drivers/net/ethernet/intel/ice/ice_base.c\n@@ -406,6 +406,12 @@ int ice_setup_rx_ctx(struct ice_ring *ring)\n \tif (vsi->type == ICE_VSI_VF)\n \t\treturn 0;\n \n+\t/* configure Rx buffer alignment */\n+\tif (!vsi->netdev || test_bit(ICE_FLAG_LEGACY_RX, vsi->back->flags))\n+\t\tice_clear_ring_build_skb_ena(ring);\n+\telse\n+\t\tice_set_ring_build_skb_ena(ring);\n+\n \t/* init queue specific tail register */\n \tring->tail = hw->hw_addr + QRX_TAIL(pf_q);\n \twritel(0, ring->tail);\ndiff --git a/drivers/net/ethernet/intel/ice/ice_ethtool.c b/drivers/net/ethernet/intel/ice/ice_ethtool.c\nindex c1737625bbc2..7e779060069c 100644\n--- a/drivers/net/ethernet/intel/ice/ice_ethtool.c\n+++ b/drivers/net/ethernet/intel/ice/ice_ethtool.c\n@@ -624,7 +624,7 @@ static int ice_lbtest_receive_frames(struct ice_ring *rx_ring)\n \t\t\tcontinue;\n \n \t\trx_buf = &rx_ring->rx_buf[i];\n-\t\treceived_buf = page_address(rx_buf->page);\n+\t\treceived_buf = page_address(rx_buf->page) + rx_buf->page_offset;\n \n \t\tif (ice_lbtest_check_frame(received_buf))\n \t\t\tvalid_frames++;\ndiff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c\nindex d54ba4bbebf8..f69a1a59d70e 100644\n--- a/drivers/net/ethernet/intel/ice/ice_lib.c\n+++ b/drivers/net/ethernet/intel/ice/ice_lib.c\n@@ -1229,7 +1229,8 @@ void ice_vsi_cfg_frame_size(struct ice_vsi *vsi)\n \t\tvsi->max_frame = ICE_AQ_SET_MAC_FRAME_SIZE_MAX;\n \t\tvsi->rx_buf_len = ICE_RXBUF_2048;\n #if (PAGE_SIZE < 8192)\n-\t} else if (vsi->netdev->mtu <= ETH_DATA_LEN) {\n+\t} else if (!ICE_2K_TOO_SMALL_WITH_PADDING &&\n+\t\t (vsi->netdev->mtu <= ETH_DATA_LEN)) {\n \t\tvsi->max_frame = ICE_RXBUF_1536 - NET_IP_ALIGN;\n \t\tvsi->rx_buf_len = ICE_RXBUF_1536 - NET_IP_ALIGN;\n #endif\ndiff --git a/drivers/net/ethernet/intel/ice/ice_txrx.c b/drivers/net/ethernet/intel/ice/ice_txrx.c\nindex 63fe73c5097c..71c4464934af 100644\n--- a/drivers/net/ethernet/intel/ice/ice_txrx.c\n+++ b/drivers/net/ethernet/intel/ice/ice_txrx.c\n@@ -415,7 +415,12 @@ int ice_setup_rx_ring(struct ice_ring *rx_ring)\n */\n static unsigned int ice_rx_offset(struct ice_ring *rx_ring)\n {\n-\treturn ice_is_xdp_ena_vsi(rx_ring->vsi) ? XDP_PACKET_HEADROOM : 0;\n+\tif (ice_ring_uses_build_skb(rx_ring))\n+\t\treturn ICE_SKB_PAD;\n+\telse if (ice_is_xdp_ena_vsi(rx_ring->vsi))\n+\t\treturn XDP_PACKET_HEADROOM;\n+\n+\treturn 0;\n }\n \n /**\n@@ -710,7 +715,7 @@ ice_add_rx_frag(struct ice_ring *rx_ring, struct ice_rx_buf *rx_buf,\n \t\tstruct sk_buff *skb, unsigned int size)\n {\n #if (PAGE_SIZE >= 8192)\n-\tunsigned int truesize = SKB_DATA_ALIGN(size);\n+\tunsigned int truesize = SKB_DATA_ALIGN(size + ice_rx_offset(rx_ring));\n #else\n \tunsigned int truesize = ice_rx_pg_size(rx_ring) / 2;\n #endif\n@@ -1008,27 +1013,28 @@ static int ice_clean_rx_irq(struct ice_ring *rx_ring, int budget)\n \n \t\txdp_res = ice_run_xdp(rx_ring, &xdp, xdp_prog);\n \t\trcu_read_unlock();\n-\t\tif (xdp_res) {\n-\t\t\tif (xdp_res & (ICE_XDP_TX | ICE_XDP_REDIR)) {\n-\t\t\t\tunsigned int truesize;\n+\t\tif (!xdp_res)\n+\t\t\tgoto construct_skb;\n+\t\tif (xdp_res & (ICE_XDP_TX | ICE_XDP_REDIR)) {\n+\t\t\tunsigned int truesize;\n \n #if (PAGE_SIZE < 8192)\n-\t\t\t\ttruesize = ice_rx_pg_size(rx_ring) / 2;\n+\t\t\ttruesize = ice_rx_pg_size(rx_ring) / 2;\n #else\n-\t\t\t\ttruesize = SKB_DATA_ALIGN(size);\n+\t\t\ttruesize = SKB_DATA_ALIGN(ice_rx_offset(rx_ring) +\n+\t\t\t\t\t\t size);\n #endif\n-\t\t\t\txdp_xmit |= xdp_res;\n-\t\t\t\tice_rx_buf_adjust_pg_offset(rx_buf, truesize);\n-\t\t\t} else {\n-\t\t\t\trx_buf->pagecnt_bias++;\n-\t\t\t}\n-\t\t\ttotal_rx_bytes += size;\n-\t\t\ttotal_rx_pkts++;\n-\n-\t\t\tcleaned_count++;\n-\t\t\tice_put_rx_buf(rx_ring, rx_buf);\n-\t\t\tcontinue;\n+\t\t\txdp_xmit |= xdp_res;\n+\t\t\tice_rx_buf_adjust_pg_offset(rx_buf, truesize);\n+\t\t} else {\n+\t\t\trx_buf->pagecnt_bias++;\n \t\t}\n+\t\ttotal_rx_bytes += size;\n+\t\ttotal_rx_pkts++;\n+\n+\t\tcleaned_count++;\n+\t\tice_put_rx_buf(rx_ring, rx_buf);\n+\t\tcontinue;\n construct_skb:\n \t\tif (skb)\n \t\t\tice_add_rx_frag(rx_ring, rx_buf, skb, size);\ndiff --git a/drivers/net/ethernet/intel/ice/ice_txrx.h b/drivers/net/ethernet/intel/ice/ice_txrx.h\nindex b37154c577fc..63cc3f764911 100644\n--- a/drivers/net/ethernet/intel/ice/ice_txrx.h\n+++ b/drivers/net/ethernet/intel/ice/ice_txrx.h\n@@ -26,6 +26,20 @@\n #define ICE_RX_BUF_WRITE\t16\t/* Must be power of 2 */\n #define ICE_MAX_TXQ_PER_TXQG\t128\n \n+/* Attempt to maximize the headroom available for incoming frames. We use a 2K\n+ * buffer for MTUs <= 1500 and need 1536/1534 to store the data for the frame.\n+ * This leaves us with 512 bytes of room. From that we need to deduct the\n+ * space needed for the shared info and the padding needed to IP align the\n+ * frame.\n+ *\n+ * Note: For cache line sizes 256 or larger this value is going to end\n+ *\t up negative. In these cases we should fall back to the legacy\n+ *\t receive path.\n+ */\n+#if (PAGE_SIZE < 8192)\n+#define ICE_2K_TOO_SMALL_WITH_PADDING \\\n+((NET_SKB_PAD + ICE_RXBUF_1536) > SKB_WITH_OVERHEAD(ICE_RXBUF_2048))\n+\n static inline __le64\n ice_build_ctob(u64 td_cmd, u64 td_offset, unsigned int size, u64 td_tag)\n {\n@@ -36,6 +50,57 @@ ice_build_ctob(u64 td_cmd, u64 td_offset, unsigned int size, u64 td_tag)\n \t\t\t (td_tag << ICE_TXD_QW1_L2TAG1_S));\n }\n \n+/**\n+ * ice_compute_pad - compute the padding\n+ * rx_buf_len: buffer length\n+ *\n+ * Figure out the size of half page based on given buffer length and\n+ * then subtract the skb_shared_info followed by subtraction of the\n+ * actual buffer length; this in turn results in the actual space that\n+ * is left for padding usage\n+ */\n+static inline int ice_compute_pad(int rx_buf_len)\n+{\n+\tint half_page_size;\n+\n+\thalf_page_size = ALIGN(rx_buf_len, PAGE_SIZE / 2);\n+\treturn SKB_WITH_OVERHEAD(half_page_size) - rx_buf_len;\n+}\n+\n+/**\n+ * ice_skb_pad - determine the padding that we can supply\n+ *\n+ * Figure out the right Rx buffer size and based on that calculate the\n+ * padding\n+ */\n+static inline int ice_skb_pad(void)\n+{\n+\tint rx_buf_len;\n+\n+\t/* If a 2K buffer cannot handle a standard Ethernet frame then\n+\t * optimize padding for a 3K buffer instead of a 1.5K buffer.\n+\t *\n+\t * For a 3K buffer we need to add enough padding to allow for\n+\t * tailroom due to NET_IP_ALIGN possibly shifting us out of\n+\t * cache-line alignment.\n+\t */\n+\tif (ICE_2K_TOO_SMALL_WITH_PADDING)\n+\t\trx_buf_len = ICE_RXBUF_3072 + SKB_DATA_ALIGN(NET_IP_ALIGN);\n+\telse\n+\t\trx_buf_len = ICE_RXBUF_1536;\n+\n+\t/* if needed make room for NET_IP_ALIGN */\n+\trx_buf_len -= NET_IP_ALIGN;\n+\n+\treturn ice_compute_pad(rx_buf_len);\n+}\n+\n+#define ICE_SKB_PAD ice_skb_pad()\n+#else\n+#define ICE_2K_TOO_SMALL_WITH_PADDING false\n+#define ICE_SKB_PAD (NET_SKB_PAD + NET_IP_ALIGN)\n+#endif\n+\n /* We are assuming that the cache line is always 64 Bytes here for ice.\n * In order to make sure that is a correct assumption there is a check in probe\n * to print a warning if the read from GLPCI_CNF2 tells us that the cache line\n@@ -241,6 +306,7 @@ struct ice_ring {\n \t * in their own cache line if possible\n \t */\n #define ICE_TX_FLAGS_RING_XDP\t\tBIT(0)\n+#define ICE_RX_FLAGS_RING_BUILD_SKB\tBIT(1)\n \tu8 flags;\n \tdma_addr_t dma;\t\t\t/* physical address of ring */\n \tunsigned int size;\t\t/* length of descriptor ring in bytes */\n@@ -249,6 +315,21 @@ struct ice_ring {\n \tu8 dcb_tc;\t\t\t/* Traffic class of ring */\n } ____cacheline_internodealigned_in_smp;\n \n+static inline bool ice_ring_uses_build_skb(struct ice_ring *ring)\n+{\n+\treturn !!(ring->flags & ICE_RX_FLAGS_RING_BUILD_SKB);\n+}\n+\n+static inline void ice_set_ring_build_skb_ena(struct ice_ring *ring)\n+{\n+\tring->flags |= ICE_RX_FLAGS_RING_BUILD_SKB;\n+}\n+\n+static inline void ice_clear_ring_build_skb_ena(struct ice_ring *ring)\n+{\n+\tring->flags &= ~ICE_RX_FLAGS_RING_BUILD_SKB;\n+}\n+\n static inline bool ice_ring_is_xdp(struct ice_ring *ring)\n {\n \treturn !!(ring->flags & ICE_TX_FLAGS_RING_XDP);\n", "prefixes": [ "S30", "7/9" ] }