Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/116153/?format=api
{ "id": 116153, "url": "http://patchwork.ozlabs.org/api/patches/116153/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/patch/1316797284-21010-1-git-send-email-shawn.guo@linaro.org/", "project": { "id": 19, "url": "http://patchwork.ozlabs.org/api/projects/19/?format=api", "name": "Linux IMX development", "link_name": "linux-imx", "list_id": "linux-imx-kernel.lists.patchwork.ozlabs.org", "list_email": "linux-imx-kernel@lists.patchwork.ozlabs.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1316797284-21010-1-git-send-email-shawn.guo@linaro.org>", "list_archive_url": null, "date": "2011-09-23T17:01:24", "name": "ARM i.MX gic: add handle_irq function", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "a496ba0f7694caba2a6cf096229a83b888c8758a", "submitter": { "id": 7857, "url": "http://patchwork.ozlabs.org/api/people/7857/?format=api", "name": "Shawn Guo", "email": "shawn.guo@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-imx/patch/1316797284-21010-1-git-send-email-shawn.guo@linaro.org/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/116153/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/116153/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming-imx@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-imx@bilbo.ozlabs.org", "Received": [ "from merlin.infradead.org (merlin.infradead.org\n\t[IPv6:2001:4978:20e::2])\n\t(using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits))\n\t(Client did not present a certificate)\n\tby ozlabs.org (Postfix) with ESMTPS id 9F70EB6F82\n\tfor <incoming-imx@patchwork.ozlabs.org>;\n\tSat, 24 Sep 2011 02:59:24 +1000 (EST)", "from canuck.infradead.org ([2001:4978:20e::1])\n\tby merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux))\n\tid 1R795r-0003D2-Fu; Fri, 23 Sep 2011 16:59:19 +0000", "from localhost ([127.0.0.1] helo=canuck.infradead.org)\n\tby canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux))\n\tid 1R795r-0005QU-2z; Fri, 23 Sep 2011 16:59:19 +0000", "from mail-yw0-f49.google.com ([209.85.213.49])\n\tby canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux))\n\tid 1R795n-0005Q9-PE for linux-arm-kernel@lists.infradead.org;\n\tFri, 23 Sep 2011 16:59:16 +0000", "by ywf9 with SMTP id 9so3400923ywf.36\n\tfor <linux-arm-kernel@lists.infradead.org>;\n\tFri, 23 Sep 2011 09:59:14 -0700 (PDT)", "by 10.68.35.73 with SMTP id f9mr11247508pbj.92.1316797152540;\n\tFri, 23 Sep 2011 09:59:12 -0700 (PDT)", "from localhost.localdomain ([117.82.33.48])\n\tby mx.google.com with ESMTPS id\n\ti3sm40003618pbg.10.2011.09.23.09.59.04\n\t(version=TLSv1/SSLv3 cipher=OTHER);\n\tFri, 23 Sep 2011 09:59:11 -0700 (PDT)" ], "From": "Shawn Guo <shawn.guo@linaro.org>", "To": "Sascha Hauer <s.hauer@pengutronix.de>", "Subject": "[PATCH] ARM i.MX gic: add handle_irq function", "Date": "Sat, 24 Sep 2011 01:01:24 +0800", "Message-Id": "<1316797284-21010-1-git-send-email-shawn.guo@linaro.org>", "X-Mailer": "git-send-email 1.7.4.1", "In-Reply-To": "<1316522956-28530-1-git-send-email-s.hauer@pengutronix.de>", "References": "<1316522956-28530-1-git-send-email-s.hauer@pengutronix.de>", "X-CRM114-Version": "20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) )\n\tMR-646709E3 ", "X-CRM114-CacheID": "sfid-20110923_125915_941992_2943E880 ", "X-CRM114-Status": "GOOD ( 18.80 )", "X-Spam-Score": "-0.7 (/)", "X-Spam-Report": "SpamAssassin version 3.3.1 on canuck.infradead.org summary:\n\tContent analysis details: (-0.7 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/,\n\tlow trust [209.85.213.49 listed in list.dnswl.org]", "Cc": "Shawn Guo <shawn.guo@linaro.org>,\n\tRussell King - ARM Linux <linux@arm.linux.org.uk>,\n\tlinux-arm-kernel@lists.infradead.org, patches@linaro.org", "X-BeenThere": "linux-arm-kernel@lists.infradead.org", "X-Mailman-Version": "2.1.12", "Precedence": "list", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/linux-arm-kernel/>", "List-Post": "<mailto:linux-arm-kernel@lists.infradead.org>", "List-Help": "<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "linux-arm-kernel-bounces@lists.infradead.org", "Errors-To": "linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org", "List-Id": "linux-imx-kernel.lists.patchwork.ozlabs.org" }, "content": "This is a plain translation of assembly gic irq handler to C function\nfor CONFIG_MULTI_IRQ_HANDLER support on imx family.\n\nAs the speed of gic_handle_irq() is much more important than code\nclean, the patch chooses to plug the ifdef in the function to compile\nout the corresponding codes.\n\nSigned-off-by: Shawn Guo <shawn.guo@linaro.org>\n---\nRight, ideally the arch/arm/plat-mxc/gic.c should be merged into\narch/arm/common/gic.c. But before rmk asks me to do that, I would\nlet it stay in imx platform.\n\n arch/arm/plat-mxc/Makefile | 2 +-\n arch/arm/plat-mxc/gic.c | 47 ++++++++++++++++++++++++++\n arch/arm/plat-mxc/include/mach/common.h | 2 +\n arch/arm/plat-mxc/include/mach/entry-macro.S | 6 +++\n 4 files changed, 56 insertions(+), 1 deletions(-)\n create mode 100644 arch/arm/plat-mxc/gic.c", "diff": "diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile\nindex d53c35f..b9f0f5f 100644\n--- a/arch/arm/plat-mxc/Makefile\n+++ b/arch/arm/plat-mxc/Makefile\n@@ -5,7 +5,7 @@\n # Common support\n obj-y := clock.o time.o devices.o cpu.o system.o irq-common.o\n \n-# MX51 uses the TZIC interrupt controller, older platforms use AVIC\n+obj-$(CONFIG_ARM_GIC) += gic.o\n obj-$(CONFIG_MXC_TZIC) += tzic.o\n obj-$(CONFIG_MXC_AVIC) += avic.o\n \ndiff --git a/arch/arm/plat-mxc/gic.c b/arch/arm/plat-mxc/gic.c\nnew file mode 100644\nindex 0000000..487d12c\n--- /dev/null\n+++ b/arch/arm/plat-mxc/gic.c\n@@ -0,0 +1,47 @@\n+/*\n+ * Copyright 2011 Freescale Semiconductor, Inc.\n+ * Copyright 2011 Linaro Ltd.\n+ *\n+ * The code contained herein is licensed under the GNU General Public\n+ * License. You may obtain a copy of the GNU General Public License\n+ * Version 2 or later at the following locations:\n+ *\n+ * http://www.opensource.org/licenses/gpl-license.html\n+ * http://www.gnu.org/copyleft/gpl.html\n+ */\n+\n+#include <linux/io.h>\n+#include <asm/localtimer.h>\n+#include <asm/hardware/gic.h>\n+#ifdef CONFIG_SMP\n+#include <asm/smp.h>\n+#endif\n+\n+asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)\n+{\n+\tu32 irqstat, irqnr;\n+\n+\tdo {\n+\t\tirqstat = readl_relaxed(gic_cpu_base_addr + GIC_CPU_INTACK);\n+\t\tirqnr = irqstat & 0x3ff;\n+\t\tif (irqnr == 1023)\n+\t\t\tbreak;\n+\n+\t\tif (irqnr > 29 && irqnr < 1021)\n+\t\t\thandle_IRQ(irqnr, regs);\n+#ifdef CONFIG_SMP\n+\t\telse if (irqnr < 16) {\n+\t\t\twritel_relaxed(irqstat, gic_cpu_base_addr +\n+\t\t\t\t\t\tGIC_CPU_EOI);\n+\t\t\tdo_IPI(irqnr, regs);\n+\t\t}\n+#endif\n+#ifdef CONFIG_LOCAL_TIMERS\n+\t\telse if (irqnr == 29) {\n+\t\t\twritel_relaxed(irqstat, gic_cpu_base_addr +\n+\t\t\t\t\t\tGIC_CPU_EOI);\n+\t\t\tdo_local_timer(regs);\n+\t\t}\n+#endif\n+\t} while (1);\n+}\ndiff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h\nindex 2e8802b..49cad2a 100644\n--- a/arch/arm/plat-mxc/include/mach/common.h\n+++ b/arch/arm/plat-mxc/include/mach/common.h\n@@ -75,6 +75,7 @@ extern int mx53_display_revision(void);\n \n void avic_handle_irq(struct pt_regs *);\n void tzic_handle_irq(struct pt_regs *);\n+void gic_handle_irq(struct pt_regs *);\n \n #define mx1_handle_irq avic_handle_irq\n #define mx21_handle_irq avic_handle_irq\n@@ -85,5 +86,6 @@ void tzic_handle_irq(struct pt_regs *);\n #define mx50_handle_irq tzic_handle_irq\n #define mx51_handle_irq tzic_handle_irq\n #define mx53_handle_irq tzic_handle_irq\n+#define imx6q_handle_irq gic_handle_irq\n \n #endif\ndiff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S\nindex 842fbcb..9fe0dfc 100644\n--- a/arch/arm/plat-mxc/include/mach/entry-macro.S\n+++ b/arch/arm/plat-mxc/include/mach/entry-macro.S\n@@ -22,3 +22,9 @@\n \n \t.macro\tget_irqnr_and_base, irqnr, irqstat, base, tmp\n \t.endm\n+\n+\t.macro test_for_ipi, irqnr, irqstat, base, tmp\n+\t.endm\n+\n+\t.macro test_for_ltirq, irqnr, irqstat, base, tmp\n+\t.endm\n", "prefixes": [] }