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GET /api/patches/1153801/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 1153801,
    "url": "http://patchwork.ozlabs.org/api/patches/1153801/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20190827110440.11523-43-Zhiqiang.Hou@nxp.com/",
    "project": {
        "id": 18,
        "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api",
        "name": "U-Boot",
        "link_name": "uboot",
        "list_id": "u-boot.lists.denx.de",
        "list_email": "u-boot@lists.denx.de",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20190827110440.11523-43-Zhiqiang.Hou@nxp.com>",
    "list_archive_url": null,
    "date": "2019-08-27T11:05:12",
    "name": "[U-Boot,PATCHv2,42/47] powerpc: MPC8548CDS: Compile legacy PCIe routines conditionally",
    "commit_ref": "d15471e6c49de61dbd8195c670ede3170c7f3fdb",
    "pull_url": null,
    "state": "accepted",
    "archived": false,
    "hash": "da472884693c87027c25cd8121ebbbb9445ec729",
    "submitter": {
        "id": 67929,
        "url": "http://patchwork.ozlabs.org/api/people/67929/?format=api",
        "name": "Z.Q. Hou",
        "email": "zhiqiang.hou@nxp.com"
    },
    "delegate": {
        "id": 2467,
        "url": "http://patchwork.ozlabs.org/api/users/2467/?format=api",
        "username": "prabhu_kush",
        "first_name": "Prabhakar",
        "last_name": "Kushwaha",
        "email": "prabhakar@freescale.com"
    },
    "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20190827110440.11523-43-Zhiqiang.Hou@nxp.com/mbox/",
    "series": [
        {
            "id": 127526,
            "url": "http://patchwork.ozlabs.org/api/series/127526/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=127526",
            "date": "2019-08-27T11:02:49",
            "name": "powerpc: Enable PCIe DM drvier for some platforms",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/127526/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/1153801/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/1153801/checks/",
    "tags": {},
    "related": [],
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        "From": "\"Z.q. Hou\" <zhiqiang.hou@nxp.com>",
        "To": "\"u-boot@lists.denx.de\" <u-boot@lists.denx.de>, Prabhakar Kushwaha\n\t<prabhakar.kushwaha@nxp.com>, \"wd@denx.de\" <wd@denx.de>, Priyanka Jain\n\t<priyanka.jain@nxp.com>, Shengzhou Liu <shengzhou.liu@nxp.com>,\n\t\"bmeng.cn@gmail.com\" <bmeng.cn@gmail.com>",
        "Thread-Topic": "[PATCHv2 42/47] powerpc: MPC8548CDS: Compile legacy PCIe\n\troutines conditionally",
        "Thread-Index": "AQHVXMdMCJmNGq1reEOSSvGbC9bdGA==",
        "Date": "Tue, 27 Aug 2019 11:05:12 +0000",
        "Message-ID": "<20190827110440.11523-43-Zhiqiang.Hou@nxp.com>",
        "References": "<20190827110440.11523-1-Zhiqiang.Hou@nxp.com>",
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        "Cc": "\"Z.q. Hou\" <zhiqiang.hou@nxp.com>",
        "Subject": "[U-Boot] [PATCHv2 42/47] powerpc: MPC8548CDS: Compile legacy PCIe\n\troutines conditionally",
        "X-BeenThere": "u-boot@lists.denx.de",
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    "content": "From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>\n\nCompile the legacy PCIe initialization reoutines only when\nDM_PCI is not enabled.\n\nSigned-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>\nReviewed-by: Bin Meng <bmeng.cn@gmail.com>\n---\nV2:\n - Rebased the patch.\n\n board/freescale/mpc8548cds/mpc8548cds.c | 6 ++++--\n 1 file changed, 4 insertions(+), 2 deletions(-)",
    "diff": "diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c\nindex 7d819d8df5..2799b5b5a4 100644\n--- a/board/freescale/mpc8548cds/mpc8548cds.c\n+++ b/board/freescale/mpc8548cds/mpc8548cds.c\n@@ -164,7 +164,7 @@ void lbc_sdram_init(void)\n #endif\t/* enable SDRAM init */\n }\n \n-#if defined(CONFIG_PCI) || defined(CONFIG_PCI1)\n+#if (defined(CONFIG_PCI) || defined(CONFIG_PCI1)) && !defined(CONFIG_DM_PCI)\n /* For some reason the Tundra PCI bridge shows up on itself as a\n  * different device.  Work around that by refusing to configure it.\n  */\n@@ -189,6 +189,7 @@ static struct pci_config_table pci_mpc85xxcds_config_table[] = {\n static struct pci_controller pci1_hose;\n #endif\t/* CONFIG_PCI */\n \n+#if !defined(CONFIG_DM_PCI)\n void pci_init_board(void)\n {\n \tvolatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);\n@@ -268,6 +269,7 @@ void pci_init_board(void)\n \n \tfsl_pcie_init_board(first_free_busno);\n }\n+#endif\n \n void configure_rgmii(void)\n {\n@@ -349,7 +351,7 @@ int board_eth_init(bd_t *bis)\n \treturn pci_eth_init(bis);\n }\n \n-#if defined(CONFIG_OF_BOARD_SETUP)\n+#if defined(CONFIG_OF_BOARD_SETUP) && !defined(CONFIG_DM_PCI)\n void ft_pci_setup(void *blob, bd_t *bd)\n {\n \tFT_FSL_PCI_SETUP;\n",
    "prefixes": [
        "U-Boot",
        "PATCHv2",
        "42/47"
    ]
}