Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/1153758/?format=api
{ "id": 1153758, "url": "http://patchwork.ozlabs.org/api/patches/1153758/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20190827110440.11523-35-Zhiqiang.Hou@nxp.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20190827110440.11523-35-Zhiqiang.Hou@nxp.com>", "list_archive_url": null, "date": "2019-08-27T11:04:45", "name": "[U-Boot,PATCHv2,34/47] powerpc: corenet_ds: Disable legacy PCIe driver when DM_PCI is enabled", "commit_ref": "7bf7edd4231c5dbf0d4f7a9606a39ae4a622b4d9", "pull_url": null, "state": "accepted", "archived": false, "hash": "485d0d4b27e70b6825a23f7e6357db9aeee7fb57", "submitter": { "id": 67929, "url": "http://patchwork.ozlabs.org/api/people/67929/?format=api", "name": "Z.Q. Hou", "email": "zhiqiang.hou@nxp.com" }, "delegate": { "id": 2467, "url": "http://patchwork.ozlabs.org/api/users/2467/?format=api", "username": "prabhu_kush", "first_name": "Prabhakar", "last_name": "Kushwaha", "email": "prabhakar@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20190827110440.11523-35-Zhiqiang.Hou@nxp.com/mbox/", "series": [ { "id": 127526, "url": "http://patchwork.ozlabs.org/api/series/127526/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=127526", "date": "2019-08-27T11:02:49", "name": "powerpc: Enable PCIe DM drvier for some platforms", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/127526/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1153758/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1153758/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=nxp.com", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=nxp.com header.i=@nxp.com header.b=\"Lu8uVV9l\";\n\tdkim-atps=neutral", "spf=none (sender IP is )\n\tsmtp.mailfrom=zhiqiang.hou@nxp.com; " ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 46HmLk0mGMz9sDB\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 27 Aug 2019 21:07:58 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid B5071C21EC8; Tue, 27 Aug 2019 11:05:51 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 79D19C2204C;\n\tTue, 27 Aug 2019 11:05:39 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 891F5C2204F; Tue, 27 Aug 2019 11:04:49 +0000 (UTC)", "from EUR04-HE1-obe.outbound.protection.outlook.com\n\t(mail-eopbgr70078.outbound.protection.outlook.com [40.107.7.78])\n\tby lists.denx.de (Postfix) with ESMTPS id E6812C21F7E\n\tfor <u-boot@lists.denx.de>; Tue, 27 Aug 2019 11:04:46 +0000 (UTC)", "from DB8PR04MB6747.eurprd04.prod.outlook.com (20.179.250.159) by\n\tDB8PR04MB5849.eurprd04.prod.outlook.com (20.179.11.223) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n\t15.20.2199.20; Tue, 27 Aug 2019 11:04:45 +0000", "from DB8PR04MB6747.eurprd04.prod.outlook.com\n\t([fe80::7c8a:ab5d:dc27:be5f]) by\n\tDB8PR04MB6747.eurprd04.prod.outlook.com\n\t([fe80::7c8a:ab5d:dc27:be5f%6]) with mapi id 15.20.2199.021;\n\tTue, 27 Aug 2019 11:04:45 +0000" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=SPF_HELO_PASS, T_DKIM_INVALID\n\tautolearn=unavailable autolearn_force=no version=3.4.0", "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n\tb=VGYo7cFBSbskgLcsQ9VBTHchuvn/0xkK3I7eFRQq6XprW+R/IPyt/1XNczcZgq5ent8xISWONyarr1AcjMq7UY2jc07K1aH64stFr7n7/SbK8gpKauzJhi6m8Bj4lu4zyVVsle5534biDkMbwGPvE08QZwo00bAqq0Z0a78vRTtJkgwqijKFweAsiH0OYF3NdmIDdjvYuO9d1wUsagHAzitK7+/vDOPe6KgDrSPdkzm+OXu5H060hlA49YZKR/iGE6bRFZfxfY6Sfez1qabzBTFv8CFWl629jUCCaco4Uh84Y3wLo9IoXkanfIMYc5lnQE8/IcTkd0a7eGyWCdjbXA==", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n\ts=arcselector9901;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n\tbh=MLd7kdVBex9H0YB4lEPEKR6Ysm6HCgbCVNWmw8JwxLY=;\n\tb=C1nrsxZrwAKKCU9Vj9eU638i1yJlHqT70Uw5hnH8oP94FeGb2qIteRiCDBKtgaGdQbLDBMrtFDzqmYWE4Ev6V3GJS45IgHnC2+QqGqCvlv1rZNt4eFh3D8wCSpMa267SfeeoId1IIO4TM9SPot17vHhTmRPCLC510c9MsVcroz/qAyfKzIrwIX/AvgM5qWzewkBTu6Izpru1502LqfBUSXIMuK0gntUIsyJrfeBAJuXNKfVFKDb7NnPypUp3TkphO17D5broVo+aaTwsXX9xd52X4gppFuYjLylj5vUK9WguuxlCbiqnHoSE/Vk/N25eibUKH8gPp1wRtR5miESg8g==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass\n\tsmtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com;\n\tdkim=pass header.d=nxp.com; arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n\tbh=MLd7kdVBex9H0YB4lEPEKR6Ysm6HCgbCVNWmw8JwxLY=;\n\tb=Lu8uVV9lLuHJ0LO7ZDCVAeR/OhEm645GPRRgf75hzkq2IeOYVldz+m7fkkRA0OW4zWxPbRkRrhEBnzjgQbKH3s9yF6ya2rZOSvDtSgwHtEwXGKO+CwYx/oJ6Ub7dH7XdHtxEntuH5ospbFMPmZAszpWHHgC/y70MheR8xBTT12c=", "From": "\"Z.q. Hou\" <zhiqiang.hou@nxp.com>", "To": "\"u-boot@lists.denx.de\" <u-boot@lists.denx.de>, Prabhakar Kushwaha\n\t<prabhakar.kushwaha@nxp.com>, \"wd@denx.de\" <wd@denx.de>, Priyanka Jain\n\t<priyanka.jain@nxp.com>, Shengzhou Liu <shengzhou.liu@nxp.com>,\n\t\"bmeng.cn@gmail.com\" <bmeng.cn@gmail.com>", "Thread-Topic": "[PATCHv2 34/47] powerpc: corenet_ds: Disable legacy PCIe driver\n\twhen DM_PCI is enabled", "Thread-Index": "AQHVXMc8ULYr4klQlkOtL5pYg0Epwg==", "Date": "Tue, 27 Aug 2019 11:04:45 +0000", "Message-ID": "<20190827110440.11523-35-Zhiqiang.Hou@nxp.com>", "References": "<20190827110440.11523-1-Zhiqiang.Hou@nxp.com>", "In-Reply-To": "<20190827110440.11523-1-Zhiqiang.Hou@nxp.com>", "Accept-Language": "zh-CN, en-US", "Content-Language": "en-US", "X-MS-Has-Attach": "", "X-MS-TNEF-Correlator": "", "x-clientproxiedby": "HK0P153CA0039.APCP153.PROD.OUTLOOK.COM\n\t(2603:1096:203:17::27) To DB8PR04MB6747.eurprd04.prod.outlook.com\n\t(2603:10a6:10:10b::31)", "authentication-results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=nxp.com", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=nxp.com header.i=@nxp.com header.b=\"Lu8uVV9l\";\n\tdkim-atps=neutral", "spf=none (sender IP is )\n\tsmtp.mailfrom=zhiqiang.hou@nxp.com; " ], "x-ms-exchange-messagesentrepresentingtype": "1", "x-mailer": "git-send-email 2.17.1", "x-originating-ip": "[119.31.174.73]", "x-ms-publictraffictype": "Email", "x-ms-office365-filtering-correlation-id": "954e136c-3742-48e8-8f92-08d72ade5ec2", "x-ms-office365-filtering-ht": "Tenant", "x-microsoft-antispam": "BCL:0; PCL:0;\n\tRULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600166)(711020)(4605104)(1401327)(4618075)(2017052603328)(7193020);\n\tSRVR:DB8PR04MB5849; ", "x-ms-traffictypediagnostic": "DB8PR04MB5849:", "x-ms-exchange-transport-forked": "True", "x-microsoft-antispam-prvs": "<DB8PR04MB5849A7AF1D009E1117A5F10484A00@DB8PR04MB5849.eurprd04.prod.outlook.com>", "x-ms-oob-tlc-oobclassifiers": "OLM:1186;", "x-forefront-prvs": "0142F22657", "x-forefront-antispam-report": "SFV:NSPM;\n\tSFS:(10009020)(4636009)(366004)(376002)(396003)(346002)(39860400002)(136003)(189003)(199004)(102836004)(6436002)(2616005)(476003)(486006)(186003)(26005)(71200400001)(386003)(478600001)(305945005)(2906002)(8676002)(1076003)(66066001)(8936002)(446003)(81156014)(256004)(81166006)(2501003)(11346002)(7736002)(6486002)(5660300002)(14454004)(36756003)(52116002)(86362001)(53936002)(110136005)(76176011)(99286004)(3846002)(6116002)(66556008)(66476007)(66446008)(71190400001)(64756008)(66946007)(4326008)(25786009)(50226002)(316002)(6512007)(6506007);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:DB8PR04MB5849;\n\tH:DB8PR04MB6747.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en;\n\tPTR:InfoNoRecords; MX:1; A:1; ", "received-spf": "None (protection.outlook.com: nxp.com does not designate\n\tpermitted sender hosts)", "x-ms-exchange-senderadcheck": "1", "x-microsoft-antispam-message-info": "dFwY/smVDUSmRjmONl9uCRIBlhJIg5CYqylyG2JLsnlMNdw3W6yO85ScjjZQs4vf8nKmCFiCX3reJo2XXVTbH5YjKXQwtFn4RrJLGqqUUD32gVQZEIPk7+5RgrollXgaD2CYyDERfaFTrq8wlKI/76yQFzI20QRfvpBkTWPOxElgU9oaUgtt1Eqi5cCBJpG6DrymhC6eVirdxXxxa+YmTg0VuJi+yals8aliFYHvMuS+ynEQbl7xrHaqFQUjqPOQnrMTdC0knQX9sG0qR9/vU/HbDRjjjo5etaScMBC6+IE4VE19OPRmS5GsdXwndrcE8JdjOyCvHCEOX+geThvDFWYg+yySlKafFDFlcZFEnKZin5Kh4p1Yb7yxU56cD8Fd5zbCDsJOVecyN6Y/Y4b19EMmZIcVWY+bj88TBu5Q5sE=", "MIME-Version": "1.0", "X-OriginatorOrg": "nxp.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "954e136c-3742-48e8-8f92-08d72ade5ec2", "X-MS-Exchange-CrossTenant-originalarrivaltime": "27 Aug 2019 11:04:45.8798\n\t(UTC)", "X-MS-Exchange-CrossTenant-fromentityheader": "Hosted", "X-MS-Exchange-CrossTenant-id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-CrossTenant-mailboxtype": "HOSTED", "X-MS-Exchange-CrossTenant-userprincipalname": "1ZG3yevI/QcS7TgsFjHhs6X0luZY60Y5SxpfCZbpOwspYFbDoJ6y9QDzkcrBII0+9cuGl0LvywpX6lOnOdjGTw==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DB8PR04MB5849", "Cc": "\"Z.q. Hou\" <zhiqiang.hou@nxp.com>", "Subject": "[U-Boot] [PATCHv2 34/47] powerpc: corenet_ds: Disable legacy PCIe\n\tdriver when DM_PCI is enabled", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>\n\nDisable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.\n\nSigned-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>\nReviewed-by: Bin Meng <bmeng.cn@gmail.com>\n---\nV2:\n - Rebased the patch.\n\n include/configs/corenet_ds.h | 63 +++++++++++-------------------------\n 1 file changed, 19 insertions(+), 44 deletions(-)", "diff": "diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h\nindex e5c3a0c3f2..60e09c1939 100644\n--- a/include/configs/corenet_ds.h\n+++ b/include/configs/corenet_ds.h\n@@ -54,7 +54,6 @@\n #define CONFIG_SYS_NUM_CPC\t\tCONFIG_SYS_NUM_DDR_CTLRS\n #define CONFIG_PCIE1\t\t\t/* PCIE controller 1 */\n #define CONFIG_PCIE2\t\t\t/* PCIE controller 2 */\n-#define CONFIG_FSL_PCI_INIT\t\t/* Use common FSL init code */\n #define CONFIG_SYS_PCI_64BIT\t\t/* enable 64-bit PCI resources */\n \n #define CONFIG_ENV_OVERWRITE\n@@ -362,68 +361,25 @@\n \n /* controller 1, direct to uli, tgtid 3, Base address 20000 */\n #define CONFIG_SYS_PCIE1_MEM_VIRT\t0x80000000\n-#ifdef CONFIG_PHYS_64BIT\n-#define CONFIG_SYS_PCIE1_MEM_BUS\t0xe0000000\n #define CONFIG_SYS_PCIE1_MEM_PHYS\t0xc00000000ull\n-#else\n-#define CONFIG_SYS_PCIE1_MEM_BUS\t0x80000000\n-#define CONFIG_SYS_PCIE1_MEM_PHYS\t0x80000000\n-#endif\n-#define CONFIG_SYS_PCIE1_MEM_SIZE\t0x20000000\t/* 512M */\n #define CONFIG_SYS_PCIE1_IO_VIRT\t0xf8000000\n-#define CONFIG_SYS_PCIE1_IO_BUS\t\t0x00000000\n-#ifdef CONFIG_PHYS_64BIT\n #define CONFIG_SYS_PCIE1_IO_PHYS\t0xff8000000ull\n-#else\n-#define CONFIG_SYS_PCIE1_IO_PHYS\t0xf8000000\n-#endif\n-#define CONFIG_SYS_PCIE1_IO_SIZE\t0x00010000\t/* 64k */\n \n /* controller 2, Slot 2, tgtid 2, Base address 201000 */\n #define CONFIG_SYS_PCIE2_MEM_VIRT\t0xa0000000\n-#ifdef CONFIG_PHYS_64BIT\n-#define CONFIG_SYS_PCIE2_MEM_BUS\t0xe0000000\n #define CONFIG_SYS_PCIE2_MEM_PHYS\t0xc20000000ull\n-#else\n-#define CONFIG_SYS_PCIE2_MEM_BUS\t0xa0000000\n-#define CONFIG_SYS_PCIE2_MEM_PHYS\t0xa0000000\n-#endif\n-#define CONFIG_SYS_PCIE2_MEM_SIZE\t0x20000000\t/* 512M */\n #define CONFIG_SYS_PCIE2_IO_VIRT\t0xf8010000\n-#define CONFIG_SYS_PCIE2_IO_BUS\t\t0x00000000\n-#ifdef CONFIG_PHYS_64BIT\n #define CONFIG_SYS_PCIE2_IO_PHYS\t0xff8010000ull\n-#else\n-#define CONFIG_SYS_PCIE2_IO_PHYS\t0xf8010000\n-#endif\n-#define CONFIG_SYS_PCIE2_IO_SIZE\t0x00010000\t/* 64k */\n \n /* controller 3, Slot 1, tgtid 1, Base address 202000 */\n #define CONFIG_SYS_PCIE3_MEM_VIRT\t0xc0000000\n-#ifdef CONFIG_PHYS_64BIT\n-#define CONFIG_SYS_PCIE3_MEM_BUS\t0xe0000000\n #define CONFIG_SYS_PCIE3_MEM_PHYS\t0xc40000000ull\n-#else\n-#define CONFIG_SYS_PCIE3_MEM_BUS\t0xc0000000\n-#define CONFIG_SYS_PCIE3_MEM_PHYS\t0xc0000000\n-#endif\n-#define CONFIG_SYS_PCIE3_MEM_SIZE\t0x20000000\t/* 512M */\n #define CONFIG_SYS_PCIE3_IO_VIRT\t0xf8020000\n-#define CONFIG_SYS_PCIE3_IO_BUS\t\t0x00000000\n-#ifdef CONFIG_PHYS_64BIT\n #define CONFIG_SYS_PCIE3_IO_PHYS\t0xff8020000ull\n-#else\n-#define CONFIG_SYS_PCIE3_IO_PHYS\t0xf8020000\n-#endif\n-#define CONFIG_SYS_PCIE3_IO_SIZE\t0x00010000\t/* 64k */\n \n /* controller 4, Base address 203000 */\n-#define CONFIG_SYS_PCIE4_MEM_BUS\t0xe0000000\n #define CONFIG_SYS_PCIE4_MEM_PHYS\t0xc60000000ull\n-#define CONFIG_SYS_PCIE4_MEM_SIZE\t0x20000000\t/* 512M */\n-#define CONFIG_SYS_PCIE4_IO_BUS\t\t0x00000000\n #define CONFIG_SYS_PCIE4_IO_PHYS\t0xff8030000ull\n-#define CONFIG_SYS_PCIE4_IO_SIZE\t0x00010000\t/* 64k */\n \n /* Qman/Bman */\n #define CONFIG_SYS_BMAN_NUM_PORTALS\t10\n@@ -499,7 +455,26 @@\n #endif\n \n #ifdef CONFIG_PCI\n+#if !defined(CONFIG_DM_PCI)\n+#define CONFIG_FSL_PCI_INIT\t/* Use common FSL init code */\n #define CONFIG_PCI_INDIRECT_BRIDGE\n+#define CONFIG_SYS_PCIE1_MEM_BUS\t0xe0000000\n+#define CONFIG_SYS_PCIE1_MEM_SIZE\t0x20000000 /* 512M */\n+#define CONFIG_SYS_PCIE1_IO_BUS\t\t0x00000000\n+#define CONFIG_SYS_PCIE1_IO_SIZE\t0x00010000\t/* 64k */\n+#define CONFIG_SYS_PCIE2_MEM_BUS\t0xe0000000\n+#define CONFIG_SYS_PCIE2_MEM_SIZE\t0x20000000\t/* 512M */\n+#define CONFIG_SYS_PCIE2_IO_BUS\t\t0x00000000\n+#define CONFIG_SYS_PCIE2_IO_SIZE\t0x00010000\t/* 64k */\n+#define CONFIG_SYS_PCIE3_MEM_BUS\t0xe0000000\n+#define CONFIG_SYS_PCIE3_MEM_SIZE\t0x20000000\t/* 512M */\n+#define CONFIG_SYS_PCIE3_IO_BUS\t\t0x00000000\n+#define CONFIG_SYS_PCIE3_IO_SIZE\t0x00010000\t/* 64k */\n+#define CONFIG_SYS_PCIE4_MEM_BUS\t0xe0000000\n+#define CONFIG_SYS_PCIE4_MEM_SIZE\t0x20000000\t/* 512M */\n+#define CONFIG_SYS_PCIE4_IO_BUS\t\t0x00000000\n+#define CONFIG_SYS_PCIE4_IO_SIZE\t0x00010000\t/* 64k */\n+#endif\n \n #define CONFIG_PCI_SCAN_SHOW\t\t/* show pci devices on startup */\n #endif\t/* CONFIG_PCI */\n", "prefixes": [ "U-Boot", "PATCHv2", "34/47" ] }