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GET /api/patches/1153709/?format=api
{ "id": 1153709, "url": "http://patchwork.ozlabs.org/api/patches/1153709/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20190827101235.46371-2-Zhiqiang.Hou@nxp.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20190827101235.46371-2-Zhiqiang.Hou@nxp.com>", "list_archive_url": null, "date": "2019-08-27T10:13:48", "name": "[U-Boot,PATCHv3,1/3] dm: pcie_fsl: Convert IS_ENABLED() run-time checking to #ifdef", "commit_ref": "adc983b4d676e4ca958067f86bec1bb02cb17950", "pull_url": null, "state": "accepted", "archived": false, "hash": "8d1d15cc879f5a4fc0a36a3e5fdb5c8edff5556b", "submitter": { "id": 67929, "url": "http://patchwork.ozlabs.org/api/people/67929/?format=api", "name": "Z.Q. Hou", "email": "zhiqiang.hou@nxp.com" }, "delegate": { "id": 2467, "url": "http://patchwork.ozlabs.org/api/users/2467/?format=api", "username": "prabhu_kush", "first_name": "Prabhakar", "last_name": "Kushwaha", "email": "prabhakar@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20190827101235.46371-2-Zhiqiang.Hou@nxp.com/mbox/", "series": [ { "id": 127507, "url": "http://patchwork.ozlabs.org/api/series/127507/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=127507", "date": "2019-08-27T10:13:45", "name": "dm: pcie_fsl: Fix some issues", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/127507/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1153709/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1153709/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=nxp.com", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=nxp.com header.i=@nxp.com header.b=\"lK7+HVBd\";\n\tdkim-atps=neutral", "spf=none (sender IP is )\n\tsmtp.mailfrom=zhiqiang.hou@nxp.com; " ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 46Hl9S5C2bz9s00\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 27 Aug 2019 20:14:52 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 3B1B0C21FBA; Tue, 27 Aug 2019 10:14:02 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 39567C21C2F;\n\tTue, 27 Aug 2019 10:14:01 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid DDA4AC22014; Tue, 27 Aug 2019 10:13:52 +0000 (UTC)", "from EUR04-DB3-obe.outbound.protection.outlook.com\n\t(mail-eopbgr60076.outbound.protection.outlook.com [40.107.6.76])\n\tby lists.denx.de (Postfix) with ESMTPS id EB099C21F0B\n\tfor <u-boot@lists.denx.de>; Tue, 27 Aug 2019 10:13:49 +0000 (UTC)", "from DB8PR04MB6747.eurprd04.prod.outlook.com (20.179.250.159) by\n\tDB8PR04MB6538.eurprd04.prod.outlook.com (20.179.249.86) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n\t15.20.2199.19; Tue, 27 Aug 2019 10:13:49 +0000", "from DB8PR04MB6747.eurprd04.prod.outlook.com\n\t([fe80::7c8a:ab5d:dc27:be5f]) by\n\tDB8PR04MB6747.eurprd04.prod.outlook.com\n\t([fe80::7c8a:ab5d:dc27:be5f%6]) with mapi id 15.20.2199.021;\n\tTue, 27 Aug 2019 10:13:49 +0000" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=SPF_HELO_PASS, T_DKIM_INVALID\n\tautolearn=unavailable autolearn_force=no version=3.4.0", "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n\tb=aP1q34C4uzNvdRhjbU3o7F8lDBAgQ1esbMmZU6gmAnMsSN6mL6XZplvQ1TTIKYAMB38V3FpAjdaDQh6UoX7KY5BMI9bIlmDqYJycM1UEGb1fIa40ljdQ9xk/a10UOUwdO6EIMGhTcQPdIWd8WdvaXzG4jQKhePOrxwHf8QH3p5r/D2ULZnhRfjsxZO+H7NrG0DYKcXCGfvC4AzMfxWSMDcydJ/CqyNcyBJK2xHwUWkPNJ0HNv1IILV23Z7V7Y/TYYlD4shbqUZpcqWL6v+qvn3SGLC1P8P1Sty/FtXUmd181lZ46gE7/5GBOx887HkvMRYk/89DDa6k9lIZTSf7r/g==", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n\ts=arcselector9901;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n\tbh=7xxXbgd+Y3eHnZlWEy8FiYzLsGPuS5wxWgAMSi3k+Uc=;\n\tb=kMfiQeV7CUrVZ+3wavytmYGg9ALApn7Fwd3oRiip9lSRdlzfvPXEnmOmM0kTtXMGNvCLDlpdixoAqxRCFnUHckYzDBtMnGcJH+o4uYjtotDTn5G4YOQka+r7ABhA6LkBSBEEZdnwTu623CFhvZchZgHD7ePfCvatKI6KN4C1GCSVCPkiqHjy/DNrW8I4yxOT1f8/pnGfpucLC9iqYKmr2oNdyKb87M9JYV3QkyDaLqUWaJwd6RlxK+Bd+GFmF2CacG+dTU9qyZOLZiGDGqX1b5ADCgZWl2DskAlUWJEJcKXIvEmevFa/C2P3VzVeI9U4QL6sZNEE2d/FQCDO3oLkfg==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass\n\tsmtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com;\n\tdkim=pass header.d=nxp.com; arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n\tbh=7xxXbgd+Y3eHnZlWEy8FiYzLsGPuS5wxWgAMSi3k+Uc=;\n\tb=lK7+HVBdcFWnaCqxk5c0Oydq8nAm1/gqgizMx9oIOpuUxSlQDYG4mEMbVaDE7wTbWRXOjQlGHEsk2K6QH9babZvNgIcRhXuI1Vu8iTNc5TQ2STYpn5gyxeKCOZ8wtVpG9giSnU2w147x5InbbN2qbsbooMo/nusZ1/EKd3e1ScI=", "From": "\"Z.q. Hou\" <zhiqiang.hou@nxp.com>", "To": "\"u-boot@lists.denx.de\" <u-boot@lists.denx.de>, Prabhakar Kushwaha\n\t<prabhakar.kushwaha@nxp.com>, \"bmeng.cn@gmail.com\" <bmeng.cn@gmail.com>", "Thread-Topic": "[PATCHv3 1/3] dm: pcie_fsl: Convert IS_ENABLED() run-time\n\tchecking to #ifdef", "Thread-Index": "AQHVXMAex7vppWNkM0eUdj76p1C8Mw==", "Date": "Tue, 27 Aug 2019 10:13:48 +0000", "Message-ID": "<20190827101235.46371-2-Zhiqiang.Hou@nxp.com>", "References": "<20190827101235.46371-1-Zhiqiang.Hou@nxp.com>", "In-Reply-To": "<20190827101235.46371-1-Zhiqiang.Hou@nxp.com>", "Accept-Language": "zh-CN, en-US", "Content-Language": "en-US", "X-MS-Has-Attach": "", "X-MS-TNEF-Correlator": "", "x-clientproxiedby": "HK2PR0401CA0010.apcprd04.prod.outlook.com\n\t(2603:1096:202:2::20) To DB8PR04MB6747.eurprd04.prod.outlook.com\n\t(2603:10a6:10:10b::31)", "authentication-results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=nxp.com", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=nxp.com header.i=@nxp.com header.b=\"lK7+HVBd\";\n\tdkim-atps=neutral", "spf=none (sender IP is )\n\tsmtp.mailfrom=zhiqiang.hou@nxp.com; " ], "x-ms-exchange-messagesentrepresentingtype": "1", "x-mailer": "git-send-email 2.17.1", "x-originating-ip": "[119.31.174.73]", "x-ms-publictraffictype": "Email", "x-ms-office365-filtering-correlation-id": "29f8567c-0cdb-459c-9dab-08d72ad7406e", "x-ms-office365-filtering-ht": "Tenant", "x-microsoft-antispam": "BCL:0; PCL:0;\n\tRULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600166)(711020)(4605104)(1401327)(4618075)(2017052603328)(7193020);\n\tSRVR:DB8PR04MB6538; ", "x-ms-traffictypediagnostic": "DB8PR04MB6538:", "x-ms-exchange-transport-forked": "True", "x-microsoft-antispam-prvs": "<DB8PR04MB6538BA8DC2C020FB6B5D344F84A00@DB8PR04MB6538.eurprd04.prod.outlook.com>", "x-ms-oob-tlc-oobclassifiers": "OLM:4714;", "x-forefront-prvs": "0142F22657", "x-forefront-antispam-report": "SFV:NSPM;\n\tSFS:(10009020)(4636009)(136003)(396003)(366004)(39860400002)(346002)(376002)(199004)(189003)(53936002)(6436002)(2906002)(7736002)(478600001)(6116002)(3846002)(71200400001)(486006)(8936002)(5660300002)(81156014)(81166006)(50226002)(2501003)(36756003)(71190400001)(316002)(6486002)(66066001)(305945005)(14454004)(25786009)(256004)(4326008)(1076003)(446003)(2616005)(8676002)(66476007)(66556008)(64756008)(66446008)(476003)(66946007)(11346002)(99286004)(52116002)(76176011)(386003)(26005)(6512007)(6506007)(110136005)(86362001)(186003)(102836004);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:DB8PR04MB6538;\n\tH:DB8PR04MB6747.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en;\n\tPTR:InfoNoRecords; A:1; MX:1; ", "received-spf": "None (protection.outlook.com: nxp.com does not designate\n\tpermitted sender hosts)", "x-ms-exchange-senderadcheck": "1", "x-microsoft-antispam-message-info": "Ne650D+AZXFxwY4BAexSm8GD+ki3aKxJE3iECqAqKF8QpIszeqncFhO8etYYx1IZPHHjYgTmnF+P8HyCyadtP+VSCwpiLT9urdby7daLgljQrPeKNMYA5mAPpmkCr1pWhBHqTr2p2Yjhki6vXcGqQDBEWqiQaSXW3JRvrdBkmYqmnunW2//yphZ8J0E9lB5BLhXt7TaanvIzH9v/y7TXQa07rNibZT1Ui3PmwKM5MtzvL2TQ1mb2JNSGKk6Ep6d15HyNjN/ilZPO2xgfRIFRvNxKuycyhvC6CDhEKYA1Ive3IAncubv1Ig/P/vmfESrp/JEnfhamRbjF1l8NjrQg1gZmvOQbp5g+snh2GB8CnN8XIbXwJ0LzwR8OisUGDoj09AsTTGcAxGHN5f9GYCG6MYLYZjXA8LJCpi4GA0tsf1k=", "MIME-Version": "1.0", "X-OriginatorOrg": "nxp.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "29f8567c-0cdb-459c-9dab-08d72ad7406e", "X-MS-Exchange-CrossTenant-originalarrivaltime": "27 Aug 2019 10:13:48.8737\n\t(UTC)", "X-MS-Exchange-CrossTenant-fromentityheader": "Hosted", "X-MS-Exchange-CrossTenant-id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-CrossTenant-mailboxtype": "HOSTED", "X-MS-Exchange-CrossTenant-userprincipalname": "q0krfRPy0oqPTTQn/MewjWNYNY8PpK2pPP/KF5oH9XoTF4amy+75z7s39x9So/hCoizRHOhhrZZsd9DIwCoAgw==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DB8PR04MB6538", "Cc": "\"Z.q. Hou\" <zhiqiang.hou@nxp.com>", "Subject": "[U-Boot] [PATCHv3 1/3] dm: pcie_fsl: Convert IS_ENABLED() run-time\n\tchecking to #ifdef", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>\n\nThis can avoid build error:\nThe macro in brackets of the IS_ENABLED(CONFIG_FOO) is only\ndefined on the platforms that select the CONFIG_FOO, while\nit's not defined on platforms that do not select the\nCONFIG_FOO.\n\nSigned-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>\n---\nV3:\n - New patch, also fix the build error which the #1 of v2 fixed.\n\n drivers/pci/pcie_fsl.c | 69 ++++++++++++++++++++++--------------------\n 1 file changed, 36 insertions(+), 33 deletions(-)", "diff": "diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c\nindex 4d61a46cef..1879d8104c 100644\n--- a/drivers/pci/pcie_fsl.c\n+++ b/drivers/pci/pcie_fsl.c\n@@ -299,8 +299,9 @@ static int fsl_pcie_setup_inbound_win(struct fsl_pcie *pcie, int idx,\n \tout_be32(&pi->piwbear, 0);\n #endif\n \n-\tif (IS_ENABLED(CONFIG_SYS_FSL_ERRATUM_A005434))\n-\t\tflag = 0;\n+#ifdef CONFIG_SYS_FSL_ERRATUM_A005434\n+\tflag = 0;\n+#endif\n \n \tflag |= PIWAR_EN | PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP;\n \tif (pf)\n@@ -401,47 +402,47 @@ static int fsl_pcie_init_port(struct fsl_pcie *pcie)\n \n \tfsl_pcie_init_atmu(pcie);\n \n-\tif (IS_ENABLED(CONFIG_FSL_PCIE_DISABLE_ASPM)) {\n-\t\tval_32 = 0;\n-\t\tfsl_pcie_hose_read_config_dword(pcie, PCI_LCR, &val_32);\n-\t\tval_32 &= ~0x03;\n-\t\tfsl_pcie_hose_write_config_dword(pcie, PCI_LCR, val_32);\n-\t\tudelay(1);\n-\t}\n+#ifdef CONFIG_FSL_PCIE_DISABLE_ASPM\n+\tval_32 = 0;\n+\tfsl_pcie_hose_read_config_dword(pcie, PCI_LCR, &val_32);\n+\tval_32 &= ~0x03;\n+\tfsl_pcie_hose_write_config_dword(pcie, PCI_LCR, val_32);\n+\tudelay(1);\n+#endif\n \n-\tif (IS_ENABLED(CONFIG_FSL_PCIE_RESET)) {\n-\t\tu16 ltssm;\n-\t\tint i;\n+#ifdef CONFIG_FSL_PCIE_RESET\n+\tu16 ltssm;\n+\tint i;\n \n-\t\tif (pcie->block_rev >= PEX_IP_BLK_REV_3_0) {\n+\tif (pcie->block_rev >= PEX_IP_BLK_REV_3_0) {\n+\t\t/* assert PCIe reset */\n+\t\tsetbits_be32(®s->pdb_stat, 0x08000000);\n+\t\t(void)in_be32(®s->pdb_stat);\n+\t\tudelay(1000);\n+\t\t/* clear PCIe reset */\n+\t\tclrbits_be32(®s->pdb_stat, 0x08000000);\n+\t\tasm(\"sync;isync\");\n+\t\tfor (i = 0; i < 100 && !fsl_pcie_link_up(pcie); i++)\n+\t\t\tudelay(1000);\n+\t} else {\n+\t\tfsl_pcie_hose_read_config_word(pcie, PCI_LTSSM, <ssm);\n+\t\tif (ltssm == 1) {\n \t\t\t/* assert PCIe reset */\n \t\t\tsetbits_be32(®s->pdb_stat, 0x08000000);\n \t\t\t(void)in_be32(®s->pdb_stat);\n-\t\t\tudelay(1000);\n+\t\t\tudelay(100);\n \t\t\t/* clear PCIe reset */\n \t\t\tclrbits_be32(®s->pdb_stat, 0x08000000);\n \t\t\tasm(\"sync;isync\");\n-\t\t\tfor (i = 0; i < 100 && !fsl_pcie_link_up(pcie); i++)\n+\t\t\tfor (i = 0; i < 100 &&\n+\t\t\t !fsl_pcie_link_up(pcie); i++)\n \t\t\t\tudelay(1000);\n-\t\t} else {\n-\t\t\tfsl_pcie_hose_read_config_word(pcie, PCI_LTSSM, <ssm);\n-\t\t\tif (ltssm == 1) {\n-\t\t\t\t/* assert PCIe reset */\n-\t\t\t\tsetbits_be32(®s->pdb_stat, 0x08000000);\n-\t\t\t\t(void)in_be32(®s->pdb_stat);\n-\t\t\t\tudelay(100);\n-\t\t\t\t/* clear PCIe reset */\n-\t\t\t\tclrbits_be32(®s->pdb_stat, 0x08000000);\n-\t\t\t\tasm(\"sync;isync\");\n-\t\t\t\tfor (i = 0; i < 100 &&\n-\t\t\t\t !fsl_pcie_link_up(pcie); i++)\n-\t\t\t\t\tudelay(1000);\n-\t\t\t}\n \t\t}\n \t}\n+#endif\n \n-\tif (IS_ENABLED(CONFIG_SYS_P4080_ERRATUM_PCIE_A003) &&\n-\t !fsl_pcie_link_up(pcie)) {\n+#ifdef CONFIG_SYS_P4080_ERRATUM_PCIE_A003\n+\tif (!fsl_pcie_link_up(pcie)) {\n \t\tserdes_corenet_t *srds_regs;\n \n \t\tsrds_regs = (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;\n@@ -460,13 +461,15 @@ static int fsl_pcie_init_port(struct fsl_pcie *pcie)\n \t\t\t\tudelay(1000);\n \t\t}\n \t}\n+#endif\n \n \t/*\n \t * The Read-Only Write Enable bit defaults to 1 instead of 0.\n \t * Set to 0 to protect the read-only registers.\n \t */\n-\tif (IS_ENABLED(CONFIG_SYS_FSL_ERRATUM_A007815))\n-\t\tclrbits_be32(®s->dbi_ro_wr_en, 0x01);\n+#ifdef CONFIG_SYS_FSL_ERRATUM_A007815\n+\tclrbits_be32(®s->dbi_ro_wr_en, 0x01);\n+#endif\n \n \t/*\n \t * Enable All Error Interrupts except\n", "prefixes": [ "U-Boot", "PATCHv3", "1/3" ] }