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GET /api/patches/1150001/?format=api
{ "id": 1150001, "url": "http://patchwork.ozlabs.org/api/patches/1150001/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20190820093536.39407-15-Zhiqiang.Hou@nxp.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20190820093536.39407-15-Zhiqiang.Hou@nxp.com>", "list_archive_url": null, "date": "2019-08-20T09:35:36", "name": "[U-Boot,PATCHv2,14/14] powerpc: Enable device tree support for MPC8548CDS", "commit_ref": "f83c7788a71eb3a67571f80a7917f2404156df70", "pull_url": null, "state": "accepted", "archived": false, "hash": "39731010342b27e31372ad7d2adf54de4c53defc", "submitter": { "id": 67929, "url": "http://patchwork.ozlabs.org/api/people/67929/?format=api", "name": "Z.Q. Hou", "email": "zhiqiang.hou@nxp.com" }, "delegate": { "id": 2467, "url": "http://patchwork.ozlabs.org/api/users/2467/?format=api", "username": "prabhu_kush", "first_name": "Prabhakar", "last_name": "Kushwaha", "email": "prabhakar@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20190820093536.39407-15-Zhiqiang.Hou@nxp.com/mbox/", "series": [ { "id": 126154, "url": "http://patchwork.ozlabs.org/api/series/126154/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=126154", "date": "2019-08-20T09:35:22", "name": "powerpc: Enable device tree support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/126154/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1150001/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1150001/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=nxp.com" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 46CR3Z17Vcz9sBF\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 20 Aug 2019 19:54:50 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid DA1B8C21F97; Tue, 20 Aug 2019 09:52:34 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 8E715C21F91;\n\tTue, 20 Aug 2019 09:47:04 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 620D3C21F3C; Tue, 20 Aug 2019 09:46:08 +0000 (UTC)", "from inva021.nxp.com (inva021.nxp.com [92.121.34.21])\n\tby lists.denx.de (Postfix) with ESMTPS id E7490C21F29\n\tfor <u-boot@lists.denx.de>; Tue, 20 Aug 2019 09:46:05 +0000 (UTC)", "from inva021.nxp.com (localhost [127.0.0.1])\n\tby inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id B8F2B200035;\n\tTue, 20 Aug 2019 11:46:05 +0200 (CEST)", "from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com\n\t[165.114.16.14])\n\tby inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 415DE20020F;\n\tTue, 20 Aug 2019 11:45:59 +0200 (CEST)", "from titan.ap.freescale.net (TITAN.ap.freescale.net\n\t[10.192.208.233])\n\tby invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 557CE40319;\n\tTue, 20 Aug 2019 17:45:48 +0800 (SGT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=KHOP_BIG_TO_CC\n\tautolearn=unavailable autolearn_force=no version=3.4.0", "From": "Hou Zhiqiang <Zhiqiang.Hou@nxp.com>", "To": "u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de,\n\tShengzhou.Liu@nxp.com, priyanka.jain@nxp.com, sjg@chromium.org,\n\tmarek.vasut+renesas@gmail.com, sr@denx.de, jagdish.gediya@nxp.com,\n\tbmeng.cn@gmail.com, york.sun@nxp.com, Jiafei.Pan@nxp.com,\n\tXiaowei.Bao@nxp.com", "Date": "Tue, 20 Aug 2019 09:35:36 +0000", "Message-Id": "<20190820093536.39407-15-Zhiqiang.Hou@nxp.com>", "X-Mailer": "git-send-email 2.9.5", "In-Reply-To": "<20190820093536.39407-1-Zhiqiang.Hou@nxp.com>", "References": "<20190820093536.39407-1-Zhiqiang.Hou@nxp.com>", "X-Virus-Scanned": "ClamAV using ClamSMTP", "Cc": "Hou Zhiqiang <Zhiqiang.Hou@nxp.com>", "Subject": "[U-Boot] [PATCHv2 14/14] powerpc: Enable device tree support for\n\tMPC8548CDS", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "Add device tree for MPC8548CDS board and enable CONFIG_OF_CONTROL\nso that device tree can be compiled.\n\nSigned-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>\n---\nV2:\n - No change.\n\n arch/powerpc/dts/Makefile | 1 +\n arch/powerpc/dts/mpc8548-post.dtsi | 27 +++++++++++++++++++++++++++\n arch/powerpc/dts/mpc8548.dtsi | 27 +++++++++++++++++++++++++++\n arch/powerpc/dts/mpc8548cds.dts | 23 +++++++++++++++++++++++\n arch/powerpc/dts/mpc8548cds_36b.dts | 23 +++++++++++++++++++++++\n configs/MPC8548CDS_36BIT_defconfig | 3 +++\n configs/MPC8548CDS_defconfig | 3 +++\n configs/MPC8548CDS_legacy_defconfig | 3 +++\n 8 files changed, 110 insertions(+)\n create mode 100644 arch/powerpc/dts/mpc8548-post.dtsi\n create mode 100644 arch/powerpc/dts/mpc8548.dtsi\n create mode 100644 arch/powerpc/dts/mpc8548cds.dts\n create mode 100644 arch/powerpc/dts/mpc8548cds_36b.dts", "diff": "diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile\nindex 0e234cc..021c85f 100644\n--- a/arch/powerpc/dts/Makefile\n+++ b/arch/powerpc/dts/Makefile\n@@ -1,5 +1,6 @@\n # SPDX-License-Identifier: GPL-2.0+\n \n+dtb-$(CONFIG_TARGET_MPC8548CDS) += mpc8548cds.dtb mpc8548cds_36b.dtb\n dtb-$(CONFIG_TARGET_P1020RDB_PC) += p1020rdb-pc.dtb p1020rdb-pc_36b.dtb\n dtb-$(CONFIG_TARGET_P1020RDB_PD) += p1020rdb-pd.dtb\n dtb-$(CONFIG_TARGET_P2020RDB) += p2020rdb-pc.dtb p2020rdb-pc_36b.dtb\ndiff --git a/arch/powerpc/dts/mpc8548-post.dtsi b/arch/powerpc/dts/mpc8548-post.dtsi\nnew file mode 100644\nindex 0000000..5533a4b\n--- /dev/null\n+++ b/arch/powerpc/dts/mpc8548-post.dtsi\n@@ -0,0 +1,27 @@\n+// SPDX-License-Identifier: GPL-2.0+ OR X11\n+/*\n+ * MPC8548 Silicon/SoC Device Tree Source (post include)\n+ *\n+ * Copyright 2012 Freescale Semiconductor Inc.\n+ * Copyright 2019 NXP\n+ */\n+\n+&soc {\n+\t#address-cells = <1>;\n+\t#size-cells = <1>;\n+\tdevice_type = \"soc\";\n+\tcompatible = \"fsl,mpc8548-immr\", \"simple-bus\";\n+\tbus-frequency = <0x0>;\n+\n+\tmpic: pic@40000 {\n+\t\tinterrupt-controller;\n+\t\t#address-cells = <0>;\n+\t\t#interrupt-cells = <4>;\n+\t\treg = <0x40000 0x40000>;\n+\t\tcompatible = \"fsl,mpic\";\n+\t\tdevice_type = \"open-pic\";\n+\t\tbig-endian;\n+\t\tsingle-cpu-affinity;\n+\t\tlast-interrupt-source = <255>;\n+\t};\n+};\ndiff --git a/arch/powerpc/dts/mpc8548.dtsi b/arch/powerpc/dts/mpc8548.dtsi\nnew file mode 100644\nindex 0000000..b24567d\n--- /dev/null\n+++ b/arch/powerpc/dts/mpc8548.dtsi\n@@ -0,0 +1,27 @@\n+// SPDX-License-Identifier: GPL-2.0+ OR X11\n+/*\n+ * MPC8548CDS Silicon/SoC Device Tree Source (pre include)\n+ *\n+ * Copyright 2011 Freescale Semiconductor Inc.\n+ * Copyright 2019 NXP\n+ */\n+\n+/dts-v1/;\n+\n+/include/ \"e500v2_power_isa.dtsi\"\n+\n+/ {\n+\t#address-cells = <2>;\n+\t#size-cells = <2>;\n+\tinterrupt-parent = <&mpic>;\n+\n+\tcpus {\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\n+\t\tPowerPC,8548@0 {\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <0>;\n+\t\t};\n+\t};\n+};\ndiff --git a/arch/powerpc/dts/mpc8548cds.dts b/arch/powerpc/dts/mpc8548cds.dts\nnew file mode 100644\nindex 0000000..cceea34\n--- /dev/null\n+++ b/arch/powerpc/dts/mpc8548cds.dts\n@@ -0,0 +1,23 @@\n+// SPDX-License-Identifier: GPL-2.0+ OR X11\n+/*\n+ * MPC8548CDS Device Tree Source\n+ *\n+ * Copyright 2006 - 2012 Freescale Semiconductor Inc.\n+ * Copyright 2019 NXP\n+ */\n+\n+/include/ \"mpc8548.dtsi\"\n+\n+/ {\n+\tmodel = \"fsl,MPC8548CDS\";\n+\tcompatible = \"fsl,MPC8548CDS\";\n+\t#address-cells = <2>;\n+\t#size-cells = <2>;\n+\tinterrupt-parent = <&mpic>;\n+\n+\tsoc: soc8548@e0000000 {\n+\t\tranges = <0x0 0x0 0xe0000000 0x100000>;\n+\t};\n+};\n+\n+/include/ \"mpc8548-post.dtsi\"\ndiff --git a/arch/powerpc/dts/mpc8548cds_36b.dts b/arch/powerpc/dts/mpc8548cds_36b.dts\nnew file mode 100644\nindex 0000000..faff35c\n--- /dev/null\n+++ b/arch/powerpc/dts/mpc8548cds_36b.dts\n@@ -0,0 +1,23 @@\n+// SPDX-License-Identifier: GPL-2.0+ OR X11\n+/*\n+ * MPC8548CDS (36-bit address map) Device Tree Source\n+ *\n+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.\n+ * Copyright 2019 NXP\n+ */\n+\n+/include/ \"mpc8548.dtsi\"\n+\n+/ {\n+\tmodel = \"fsl,MPC8548CDS\";\n+\tcompatible = \"fsl,MPC8548CDS\";\n+\t#address-cells = <2>;\n+\t#size-cells = <2>;\n+\tinterrupt-parent = <&mpic>;\n+\n+\tsoc: soc8548@fe0000000 {\n+\t\tranges = <0x0 0xf 0xe0000000 0x100000>;\n+\t};\n+};\n+\n+/include/ \"mpc8548-post.dtsi\"\ndiff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig\nindex 672dc78..f259f19 100644\n--- a/configs/MPC8548CDS_36BIT_defconfig\n+++ b/configs/MPC8548CDS_36BIT_defconfig\n@@ -1,8 +1,11 @@\n CONFIG_PPC=y\n CONFIG_SYS_TEXT_BASE=0xFFF80000\n CONFIG_MPC85xx=y\n+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y\n # CONFIG_CMD_ERRATA is not set\n CONFIG_TARGET_MPC8548CDS=y\n+CONFIG_DEFAULT_DEVICE_TREE=\"mpc8548cds_36b\"\n+CONFIG_OF_CONTROL=y\n CONFIG_PHYS_64BIT=y\n CONFIG_OF_BOARD_SETUP=y\n CONFIG_OF_STDOUT_VIA_ALIAS=y\ndiff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig\nindex 09726d2..72239da 100644\n--- a/configs/MPC8548CDS_defconfig\n+++ b/configs/MPC8548CDS_defconfig\n@@ -1,8 +1,11 @@\n CONFIG_PPC=y\n CONFIG_SYS_TEXT_BASE=0xFFF80000\n CONFIG_MPC85xx=y\n+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y\n # CONFIG_CMD_ERRATA is not set\n CONFIG_TARGET_MPC8548CDS=y\n+CONFIG_DEFAULT_DEVICE_TREE=\"mpc8548cds\"\n+CONFIG_OF_CONTROL=y\n CONFIG_OF_BOARD_SETUP=y\n CONFIG_OF_STDOUT_VIA_ALIAS=y\n CONFIG_BOOTDELAY=10\ndiff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig\nindex 4a2d11f..f2420c3 100644\n--- a/configs/MPC8548CDS_legacy_defconfig\n+++ b/configs/MPC8548CDS_legacy_defconfig\n@@ -1,8 +1,11 @@\n CONFIG_PPC=y\n CONFIG_SYS_TEXT_BASE=0xFFF80000\n CONFIG_MPC85xx=y\n+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y\n # CONFIG_CMD_ERRATA is not set\n CONFIG_TARGET_MPC8548CDS=y\n+CONFIG_DEFAULT_DEVICE_TREE=\"mpc8548cds\"\n+CONFIG_OF_CONTROL=y\n CONFIG_OF_BOARD_SETUP=y\n CONFIG_OF_STDOUT_VIA_ALIAS=y\n CONFIG_SYS_EXTRA_OPTIONS=\"LEGACY\"\n", "prefixes": [ "U-Boot", "PATCHv2", "14/14" ] }