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GET /api/patches/1149978/?format=api
{ "id": 1149978, "url": "http://patchwork.ozlabs.org/api/patches/1149978/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20190820093536.39407-8-Zhiqiang.Hou@nxp.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20190820093536.39407-8-Zhiqiang.Hou@nxp.com>", "list_archive_url": null, "date": "2019-08-20T09:35:29", "name": "[U-Boot,PATCHv2,07/14] powerpc: Enable device tree support for P2020RDB", "commit_ref": null, "pull_url": null, "state": "awaiting-upstream", "archived": false, "hash": "4ed4bb374894f5bfb8cd471864f0ed5cf385aa20", "submitter": { "id": 67929, "url": "http://patchwork.ozlabs.org/api/people/67929/?format=api", "name": "Z.Q. Hou", "email": "zhiqiang.hou@nxp.com" }, "delegate": { "id": 2467, "url": "http://patchwork.ozlabs.org/api/users/2467/?format=api", "username": "prabhu_kush", "first_name": "Prabhakar", "last_name": "Kushwaha", "email": "prabhakar@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20190820093536.39407-8-Zhiqiang.Hou@nxp.com/mbox/", "series": [ { "id": 126154, "url": "http://patchwork.ozlabs.org/api/series/126154/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=126154", "date": "2019-08-20T09:35:22", "name": "powerpc: Enable device tree support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/126154/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1149978/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1149978/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=nxp.com" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 46CQyV5FYCz9s4Y\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 20 Aug 2019 19:50:26 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 66EEDC21FB7; Tue, 20 Aug 2019 09:48:06 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id ADF64C21F7D;\n\tTue, 20 Aug 2019 09:46:29 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 23AF2C21F1B; Tue, 20 Aug 2019 09:46:01 +0000 (UTC)", "from inva021.nxp.com (inva021.nxp.com [92.121.34.21])\n\tby lists.denx.de (Postfix) with ESMTPS id ECF40C21F7A\n\tfor <u-boot@lists.denx.de>; Tue, 20 Aug 2019 09:45:57 +0000 (UTC)", "from inva021.nxp.com (localhost [127.0.0.1])\n\tby inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id BE819200221;\n\tTue, 20 Aug 2019 11:45:57 +0200 (CEST)", "from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com\n\t[165.114.16.14])\n\tby inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 46B3F200100;\n\tTue, 20 Aug 2019 11:45:51 +0200 (CEST)", "from titan.ap.freescale.net (TITAN.ap.freescale.net\n\t[10.192.208.233])\n\tby invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 7EFF74031E;\n\tTue, 20 Aug 2019 17:45:38 +0800 (SGT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=KHOP_BIG_TO_CC\n\tautolearn=unavailable autolearn_force=no version=3.4.0", "From": "Hou Zhiqiang <Zhiqiang.Hou@nxp.com>", "To": "u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de,\n\tShengzhou.Liu@nxp.com, priyanka.jain@nxp.com, sjg@chromium.org,\n\tmarek.vasut+renesas@gmail.com, sr@denx.de, jagdish.gediya@nxp.com,\n\tbmeng.cn@gmail.com, york.sun@nxp.com, Jiafei.Pan@nxp.com,\n\tXiaowei.Bao@nxp.com", "Date": "Tue, 20 Aug 2019 09:35:29 +0000", "Message-Id": "<20190820093536.39407-8-Zhiqiang.Hou@nxp.com>", "X-Mailer": "git-send-email 2.9.5", "In-Reply-To": "<20190820093536.39407-1-Zhiqiang.Hou@nxp.com>", "References": "<20190820093536.39407-1-Zhiqiang.Hou@nxp.com>", "X-Virus-Scanned": "ClamAV using ClamSMTP", "Cc": "Hou Zhiqiang <Zhiqiang.Hou@nxp.com>", "Subject": "[U-Boot] [PATCHv2 07/14] powerpc: Enable device tree support for\n\tP2020RDB", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "Add device tree for P1020RDB boards and enable CONFIG_OF_CONTROL\nso that device tree can be compiled.\nUpdate board README for device tree usage.\n\nSigned-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>\n---\nV2:\n - No change.\n\n arch/powerpc/dts/Makefile | 1 +\n arch/powerpc/dts/p2020-post.dtsi | 27 ++++++++++++++++++++++++\n arch/powerpc/dts/p2020.dtsi | 31 ++++++++++++++++++++++++++++\n arch/powerpc/dts/p2020rdb-pc.dts | 23 +++++++++++++++++++++\n arch/powerpc/dts/p2020rdb-pc_36b.dts | 23 +++++++++++++++++++++\n board/freescale/p1_p2_rdb_pc/README | 2 +-\n configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 ++\n configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 2 ++\n configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 2 ++\n configs/P2020RDB-PC_36BIT_defconfig | 3 +++\n configs/P2020RDB-PC_NAND_defconfig | 2 ++\n configs/P2020RDB-PC_SDCARD_defconfig | 2 ++\n configs/P2020RDB-PC_SPIFLASH_defconfig | 2 ++\n configs/P2020RDB-PC_defconfig | 3 +++\n 14 files changed, 124 insertions(+), 1 deletion(-)\n create mode 100644 arch/powerpc/dts/p2020-post.dtsi\n create mode 100644 arch/powerpc/dts/p2020.dtsi\n create mode 100644 arch/powerpc/dts/p2020rdb-pc.dts\n create mode 100644 arch/powerpc/dts/p2020rdb-pc_36b.dts", "diff": "diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile\nindex 3a806bd..bee1e2d 100644\n--- a/arch/powerpc/dts/Makefile\n+++ b/arch/powerpc/dts/Makefile\n@@ -2,6 +2,7 @@\n \n dtb-$(CONFIG_TARGET_P1020RDB_PC) += p1020rdb-pc.dtb p1020rdb-pc_36b.dtb\n dtb-$(CONFIG_TARGET_P1020RDB_PD) += p1020rdb-pd.dtb\n+dtb-$(CONFIG_TARGET_P2020RDB) += p2020rdb-pc.dtb p2020rdb-pc_36b.dtb\n dtb-$(CONFIG_TARGET_T1024RDB) += t1024rdb.dtb\n dtb-$(CONFIG_TARGET_T1042D4RDB) += t1042d4rdb.dtb\n dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb\ndiff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi\nnew file mode 100644\nindex 0000000..f20d1fa\n--- /dev/null\n+++ b/arch/powerpc/dts/p2020-post.dtsi\n@@ -0,0 +1,27 @@\n+// SPDX-License-Identifier: GPL-2.0+ OR X11\n+/*\n+ * P2020 Silicon/SoC Device Tree Source (post include)\n+ *\n+ * Copyright 2013 Freescale Semiconductor Inc.\n+ * Copyright 2019 NXP\n+ */\n+\n+&soc {\n+\t#address-cells = <1>;\n+\t#size-cells = <1>;\n+\tdevice_type = \"soc\";\n+\tcompatible = \"fsl,p2020-immr\", \"simple-bus\";\n+\tbus-frequency = <0x0>;\n+\n+\tmpic: pic@40000 {\n+\t\tinterrupt-controller;\n+\t\t#address-cells = <0>;\n+\t\t#interrupt-cells = <4>;\n+\t\treg = <0x40000 0x40000>;\n+\t\tcompatible = \"fsl,mpic\";\n+\t\tdevice_type = \"open-pic\";\n+\t\tbig-endian;\n+\t\tsingle-cpu-affinity;\n+\t\tlast-interrupt-source = <255>;\n+\t};\n+};\ndiff --git a/arch/powerpc/dts/p2020.dtsi b/arch/powerpc/dts/p2020.dtsi\nnew file mode 100644\nindex 0000000..7c4c206\n--- /dev/null\n+++ b/arch/powerpc/dts/p2020.dtsi\n@@ -0,0 +1,31 @@\n+// SPDX-License-Identifier: GPL-2.0+ OR X11\n+/*\n+ * P2020 Silicon/SoC Device Tree Source (pre include)\n+ *\n+ * Copyright 2013 Freescale Semiconductor Inc.\n+ * Copyright 2019 NXP\n+ */\n+\n+/dts-v1/;\n+\n+/include/ \"e500v2_power_isa.dtsi\"\n+\n+/ {\n+\t#address-cells = <2>;\n+\t#size-cells = <2>;\n+\tinterrupt-parent = <&mpic>;\n+\n+\tcpus {\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\n+\t\tcpu0: PowerPC,P2020@0 {\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <0>;\n+\t\t};\n+\t\tcpu1: PowerPC,P2020@1 {\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <1>;\n+\t\t};\n+\t};\n+};\ndiff --git a/arch/powerpc/dts/p2020rdb-pc.dts b/arch/powerpc/dts/p2020rdb-pc.dts\nnew file mode 100644\nindex 0000000..4800b76\n--- /dev/null\n+++ b/arch/powerpc/dts/p2020rdb-pc.dts\n@@ -0,0 +1,23 @@\n+// SPDX-License-Identifier: GPL-2.0+ OR X11\n+/*\n+ * P2020RDB-PC Device Tree Source\n+ *\n+ * Copyright 2013 - 2015 Freescale Semiconductor Inc.\n+ * Copyright 2019 NXP\n+ */\n+\n+/include/ \"p2020.dtsi\"\n+\n+/ {\n+\tmodel = \"fsl,P2020RDB-PC\";\n+\tcompatible = \"fsl,P2020RDB-PC\";\n+\t#address-cells = <2>;\n+\t#size-cells = <2>;\n+\tinterrupt-parent = <&mpic>;\n+\n+\tsoc: soc@ffe00000 {\n+\t\tranges = <0x0 0x0 0xffe00000 0x100000>;\n+\t};\n+};\n+\n+/include/ \"p2020-post.dtsi\"\ndiff --git a/arch/powerpc/dts/p2020rdb-pc_36b.dts b/arch/powerpc/dts/p2020rdb-pc_36b.dts\nnew file mode 100644\nindex 0000000..8323b90\n--- /dev/null\n+++ b/arch/powerpc/dts/p2020rdb-pc_36b.dts\n@@ -0,0 +1,23 @@\n+// SPDX-License-Identifier: GPL-2.0+ OR X11\n+/*\n+ * P2020RDB-PC (36-bit address map) Device Tree Source\n+ *\n+ * Copyright 2013 - 2015 Freescale Semiconductor Inc.\n+ * Copyright 2019 NXP\n+ */\n+\n+/include/ \"p2020.dtsi\"\n+\n+/ {\n+\tmodel = \"fsl,P2020RDB-PC\";\n+\tcompatible = \"fsl,P2020RDB-PC\";\n+\t#address-cells = <2>;\n+\t#size-cells = <2>;\n+\tinterrupt-parent = <&mpic>;\n+\n+\tsoc: soc@fffe00000 {\n+\t\tranges = <0x0 0xf 0xffe00000 0x100000>;\n+\t};\n+};\n+\n+/include/ \"p2020-post.dtsi\"\ndiff --git a/board/freescale/p1_p2_rdb_pc/README b/board/freescale/p1_p2_rdb_pc/README\nindex 26902de..b85cf02 100644\n--- a/board/freescale/p1_p2_rdb_pc/README\n+++ b/board/freescale/p1_p2_rdb_pc/README\n@@ -48,7 +48,7 @@ enable QE-TDM for linux kernel, set \"qe;tdm\" in hwconfig. Syntax is as below\n \n Device tree support and how to enable it for different configs\n --------------------------------------------------------------\n-Device tree support is available for p1020rdb for below mentioned boot,\n+Device tree support is available for p1020rdb and p2020rdb for below mentioned boot,\n 1. NOR Boot\n 2. NAND Boot\n 3. SD Boot\ndiff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig\nindex 4865a0e..d8c04e2 100644\n--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig\n+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig\n@@ -7,6 +7,8 @@ CONFIG_SPL=y\n CONFIG_MPC85xx=y\n # CONFIG_CMD_ERRATA is not set\n CONFIG_TARGET_P2020RDB=y\n+CONFIG_DEFAULT_DEVICE_TREE=\"p2020rdb-pc_36b\"\n+CONFIG_OF_CONTROL=y\n CONFIG_PHYS_64BIT=y\n CONFIG_FIT=y\n CONFIG_FIT_VERBOSE=y\ndiff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig\nindex 59764df..7c45996 100644\n--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig\n+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig\n@@ -8,6 +8,8 @@ CONFIG_SPL=y\n CONFIG_MPC85xx=y\n # CONFIG_CMD_ERRATA is not set\n CONFIG_TARGET_P2020RDB=y\n+CONFIG_DEFAULT_DEVICE_TREE=\"p2020rdb-pc_36b\"\n+CONFIG_OF_CONTROL=y\n CONFIG_PHYS_64BIT=y\n CONFIG_FIT=y\n CONFIG_FIT_VERBOSE=y\ndiff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig\nindex 664eec0..5372d98 100644\n--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig\n+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig\n@@ -9,6 +9,8 @@ CONFIG_SPL_SPI_SUPPORT=y\n CONFIG_MPC85xx=y\n # CONFIG_CMD_ERRATA is not set\n CONFIG_TARGET_P2020RDB=y\n+CONFIG_DEFAULT_DEVICE_TREE=\"p2020rdb-pc_36b\"\n+CONFIG_OF_CONTROL=y\n CONFIG_PHYS_64BIT=y\n CONFIG_FIT=y\n CONFIG_FIT_VERBOSE=y\ndiff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig\nindex a9c21fb..79f4f3c 100644\n--- a/configs/P2020RDB-PC_36BIT_defconfig\n+++ b/configs/P2020RDB-PC_36BIT_defconfig\n@@ -1,8 +1,11 @@\n CONFIG_PPC=y\n CONFIG_SYS_TEXT_BASE=0xEFF40000\n CONFIG_MPC85xx=y\n+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y\n # CONFIG_CMD_ERRATA is not set\n CONFIG_TARGET_P2020RDB=y\n+CONFIG_DEFAULT_DEVICE_TREE=\"p2020rdb-pc_36b\"\n+CONFIG_OF_CONTROL=y\n CONFIG_PHYS_64BIT=y\n CONFIG_FIT=y\n CONFIG_FIT_VERBOSE=y\ndiff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig\nindex a5cfd10..2f91691 100644\n--- a/configs/P2020RDB-PC_NAND_defconfig\n+++ b/configs/P2020RDB-PC_NAND_defconfig\n@@ -7,6 +7,8 @@ CONFIG_SPL=y\n CONFIG_MPC85xx=y\n # CONFIG_CMD_ERRATA is not set\n CONFIG_TARGET_P2020RDB=y\n+CONFIG_DEFAULT_DEVICE_TREE=\"p2020rdb-pc\"\n+CONFIG_OF_CONTROL=y\n CONFIG_FIT=y\n CONFIG_FIT_VERBOSE=y\n CONFIG_OF_BOARD_SETUP=y\ndiff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig\nindex f8f727e..a5cee06 100644\n--- a/configs/P2020RDB-PC_SDCARD_defconfig\n+++ b/configs/P2020RDB-PC_SDCARD_defconfig\n@@ -8,6 +8,8 @@ CONFIG_SPL=y\n CONFIG_MPC85xx=y\n # CONFIG_CMD_ERRATA is not set\n CONFIG_TARGET_P2020RDB=y\n+CONFIG_DEFAULT_DEVICE_TREE=\"p2020rdb-pc\"\n+CONFIG_OF_CONTROL=y\n CONFIG_FIT=y\n CONFIG_FIT_VERBOSE=y\n CONFIG_OF_BOARD_SETUP=y\ndiff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig\nindex 6f18acf..a2f9d87 100644\n--- a/configs/P2020RDB-PC_SPIFLASH_defconfig\n+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig\n@@ -9,6 +9,8 @@ CONFIG_SPL_SPI_SUPPORT=y\n CONFIG_MPC85xx=y\n # CONFIG_CMD_ERRATA is not set\n CONFIG_TARGET_P2020RDB=y\n+CONFIG_DEFAULT_DEVICE_TREE=\"p2020rdb-pc\"\n+CONFIG_OF_CONTROL=y\n CONFIG_FIT=y\n CONFIG_FIT_VERBOSE=y\n CONFIG_OF_BOARD_SETUP=y\ndiff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig\nindex 706a27d..4000459 100644\n--- a/configs/P2020RDB-PC_defconfig\n+++ b/configs/P2020RDB-PC_defconfig\n@@ -1,8 +1,11 @@\n CONFIG_PPC=y\n CONFIG_SYS_TEXT_BASE=0xEFF40000\n CONFIG_MPC85xx=y\n+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y\n # CONFIG_CMD_ERRATA is not set\n CONFIG_TARGET_P2020RDB=y\n+CONFIG_DEFAULT_DEVICE_TREE=\"p2020rdb-pc\"\n+CONFIG_OF_CONTROL=y\n CONFIG_FIT=y\n CONFIG_FIT_VERBOSE=y\n CONFIG_OF_BOARD_SETUP=y\n", "prefixes": [ "U-Boot", "PATCHv2", "07/14" ] }