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GET /api/patches/1149976/?format=api
{ "id": 1149976, "url": "http://patchwork.ozlabs.org/api/patches/1149976/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20190820093536.39407-4-Zhiqiang.Hou@nxp.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20190820093536.39407-4-Zhiqiang.Hou@nxp.com>", "list_archive_url": null, "date": "2019-08-20T09:35:25", "name": "[U-Boot,PATCHv2,03/14] powerpc: Enable device tree support for T4240RDB", "commit_ref": null, "pull_url": null, "state": "awaiting-upstream", "archived": false, "hash": "7e6a337b51cceb57e6ab8becfa57aab56a7ef789", "submitter": { "id": 67929, "url": "http://patchwork.ozlabs.org/api/people/67929/?format=api", "name": "Z.Q. Hou", "email": "zhiqiang.hou@nxp.com" }, "delegate": { "id": 2467, "url": "http://patchwork.ozlabs.org/api/users/2467/?format=api", "username": "prabhu_kush", "first_name": "Prabhakar", "last_name": "Kushwaha", "email": "prabhakar@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20190820093536.39407-4-Zhiqiang.Hou@nxp.com/mbox/", "series": [ { "id": 126154, "url": "http://patchwork.ozlabs.org/api/series/126154/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=126154", "date": "2019-08-20T09:35:22", "name": "powerpc: Enable device tree support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/126154/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1149976/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1149976/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=nxp.com" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 46CQxB37kTz9s4Y\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 20 Aug 2019 19:49:18 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 0C925C21FA3; Tue, 20 Aug 2019 09:47:06 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id E3074C21F7A;\n\tTue, 20 Aug 2019 09:46:03 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid F1B0BC21F71; Tue, 20 Aug 2019 09:45:51 +0000 (UTC)", "from inva021.nxp.com (inva021.nxp.com [92.121.34.21])\n\tby lists.denx.de (Postfix) with ESMTPS id 95C79C21F77\n\tfor <u-boot@lists.denx.de>; Tue, 20 Aug 2019 09:45:47 +0000 (UTC)", "from inva021.nxp.com (localhost [127.0.0.1])\n\tby inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 683B8200058;\n\tTue, 20 Aug 2019 11:45:47 +0200 (CEST)", "from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com\n\t[165.114.16.14])\n\tby inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id E684020028C;\n\tTue, 20 Aug 2019 11:45:40 +0200 (CEST)", "from titan.ap.freescale.net (TITAN.ap.freescale.net\n\t[10.192.208.233])\n\tby invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 0039340319;\n\tTue, 20 Aug 2019 17:45:32 +0800 (SGT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=KHOP_BIG_TO_CC\n\tautolearn=unavailable autolearn_force=no version=3.4.0", "From": "Hou Zhiqiang <Zhiqiang.Hou@nxp.com>", "To": "u-boot@lists.denx.de, prabhakar.kushwaha@nxp.com, wd@denx.de,\n\tShengzhou.Liu@nxp.com, priyanka.jain@nxp.com, sjg@chromium.org,\n\tmarek.vasut+renesas@gmail.com, sr@denx.de, jagdish.gediya@nxp.com,\n\tbmeng.cn@gmail.com, york.sun@nxp.com, Jiafei.Pan@nxp.com,\n\tXiaowei.Bao@nxp.com", "Date": "Tue, 20 Aug 2019 09:35:25 +0000", "Message-Id": "<20190820093536.39407-4-Zhiqiang.Hou@nxp.com>", "X-Mailer": "git-send-email 2.9.5", "In-Reply-To": "<20190820093536.39407-1-Zhiqiang.Hou@nxp.com>", "References": "<20190820093536.39407-1-Zhiqiang.Hou@nxp.com>", "X-Virus-Scanned": "ClamAV using ClamSMTP", "Cc": "Hou Zhiqiang <Zhiqiang.Hou@nxp.com>", "Subject": "[U-Boot] [PATCHv2 03/14] powerpc: Enable device tree support for\n\tT4240RDB", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "Add device tree for T4240RDB board and enable CONFIG_OF_CONTROL\nso that device tree can be compiled.\n\nSigned-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>\n---\nV2:\n - No change.\n\n arch/powerpc/dts/Makefile | 1 +\n arch/powerpc/dts/t4240.dtsi | 102 ++++++++++++++++++++++++++++++++++++++\n arch/powerpc/dts/t4240rdb.dts | 17 +++++++\n configs/T4240RDB_SDCARD_defconfig | 2 +\n configs/T4240RDB_defconfig | 3 ++\n 5 files changed, 125 insertions(+)\n create mode 100644 arch/powerpc/dts/t4240.dtsi\n create mode 100644 arch/powerpc/dts/t4240rdb.dts", "diff": "diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile\nindex 388a4b2..9002393 100644\n--- a/arch/powerpc/dts/Makefile\n+++ b/arch/powerpc/dts/Makefile\n@@ -2,6 +2,7 @@\n \n dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb\n dtb-$(CONFIG_TARGET_T2080RDB) += t2080rdb.dtb\n+dtb-$(CONFIG_TARGET_T4240RDB) += t4240rdb.dtb\n dtb-$(CONFIG_TARGET_MCR3000) += mcr3000.dtb\n dtb-$(CONFIG_TARGET_GAZERBEAM) += gazerbeam.dtb\n \ndiff --git a/arch/powerpc/dts/t4240.dtsi b/arch/powerpc/dts/t4240.dtsi\nnew file mode 100644\nindex 0000000..4d8fc71\n--- /dev/null\n+++ b/arch/powerpc/dts/t4240.dtsi\n@@ -0,0 +1,102 @@\n+// SPDX-License-Identifier: GPL-2.0+ OR X11\n+/*\n+ * T4240 Silicon/SoC Device Tree Source (pre include)\n+ *\n+ * Copyright 2013 Freescale Semiconductor Inc.\n+ * Copyright 2019 NXP\n+ */\n+\n+/dts-v1/;\n+\n+/include/ \"e6500_power_isa.dtsi\"\n+\n+/ {\n+\t#address-cells = <2>;\n+\t#size-cells = <2>;\n+\tinterrupt-parent = <&mpic>;\n+\n+\tcpus {\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\n+\t\tcpu0: PowerPC,e6500@0 {\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <0 1>;\n+\t\t\tfsl,portid-mapping = <0x80000000>;\n+\t\t};\n+\t\tcpu1: PowerPC,e6500@2 {\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <2 3>;\n+\t\t\tfsl,portid-mapping = <0x80000000>;\n+\t\t};\n+\t\tcpu2: PowerPC,e6500@4 {\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <4 5>;\n+\t\t\tfsl,portid-mapping = <0x80000000>;\n+\t\t};\n+\t\tcpu3: PowerPC,e6500@6 {\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <6 7>;\n+\t\t\tfsl,portid-mapping = <0x80000000>;\n+\t\t};\n+\t\tcpu4: PowerPC,e6500@8 {\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <8 9>;\n+\t\t\tfsl,portid-mapping = <0x80000000>;\n+\t\t};\n+\t\tcpu5: PowerPC,e6500@10 {\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <10 11>;\n+\t\t\tfsl,portid-mapping = <0x80000000>;\n+\t\t};\n+\t\tcpu6: PowerPC,e6500@12 {\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <12 13>;\n+\t\t\tfsl,portid-mapping = <0x80000000>;\n+\t\t};\n+\t\tcpu7: PowerPC,e6500@14 {\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <14 15>;\n+\t\t\tfsl,portid-mapping = <0x80000000>;\n+\t\t};\n+\t\tcpu8: PowerPC,e6500@16 {\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <16 17>;\n+\t\t\tfsl,portid-mapping = <0x80000000>;\n+\t\t};\n+\t\tcpu9: PowerPC,e6500@18 {\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <18 19>;\n+\t\t\tfsl,portid-mapping = <0x80000000>;\n+\t\t};\n+\t\tcpu10: PowerPC,e6500@20 {\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <20 21>;\n+\t\t\tfsl,portid-mapping = <0x80000000>;\n+\t\t};\n+\t\tcpu11: PowerPC,e6500@22 {\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <22 23>;\n+\t\t\tfsl,portid-mapping = <0x80000000>;\n+\t\t};\n+\t};\n+\n+\tsoc: soc@ffe000000 {\n+\t\tranges = <0x00000000 0xf 0xfe000000 0x1000000>;\n+\t\treg = <0xf 0xfe000000 0 0x00001000>;\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <1>;\n+\t\tdevice_type = \"soc\";\n+\t\tcompatible = \"simple-bus\";\n+\n+\t\tmpic: pic@40000 {\n+\t\t\tinterrupt-controller;\n+\t\t\t#address-cells = <0>;\n+\t\t\t#interrupt-cells = <4>;\n+\t\t\treg = <0x40000 0x40000>;\n+\t\t\tcompatible = \"fsl,mpic\";\n+\t\t\tdevice_type = \"open-pic\";\n+\t\t\tclock-frequency = <0x0>;\n+\t\t};\n+\t};\n+};\ndiff --git a/arch/powerpc/dts/t4240rdb.dts b/arch/powerpc/dts/t4240rdb.dts\nnew file mode 100644\nindex 0000000..f67d7ce\n--- /dev/null\n+++ b/arch/powerpc/dts/t4240rdb.dts\n@@ -0,0 +1,17 @@\n+// SPDX-License-Identifier: GPL-2.0+ OR X11\n+/*\n+ * T4240RDB Device Tree Source\n+ *\n+ * Copyright 2013 - 2015 Freescale Semiconductor Inc.\n+ * Copyright 2019 NXP\n+ */\n+\n+/include/ \"t4240.dtsi\"\n+\n+/ {\n+\tmodel = \"fsl,T4240RDB\";\n+\tcompatible = \"fsl,T4240RDB\";\n+\t#address-cells = <2>;\n+\t#size-cells = <2>;\n+\tinterrupt-parent = <&mpic>;\n+};\ndiff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig\nindex eeab2ec..a70c237 100644\n--- a/configs/T4240RDB_SDCARD_defconfig\n+++ b/configs/T4240RDB_SDCARD_defconfig\n@@ -33,6 +33,8 @@ CONFIG_CMD_PING=y\n CONFIG_MP=y\n CONFIG_CMD_EXT2=y\n CONFIG_CMD_FAT=y\n+CONFIG_DEFAULT_DEVICE_TREE=\"t4240rdb\"\n+CONFIG_OF_CONTROL=y\n CONFIG_ENV_IS_IN_MMC=y\n CONFIG_FSL_CAAM=y\n CONFIG_FSL_ESDHC=y\ndiff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig\nindex ef26e7c..d4ce176 100644\n--- a/configs/T4240RDB_defconfig\n+++ b/configs/T4240RDB_defconfig\n@@ -1,6 +1,7 @@\n CONFIG_PPC=y\n CONFIG_SYS_TEXT_BASE=0xEFF40000\n CONFIG_MPC85xx=y\n+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y\n CONFIG_TARGET_T4240RDB=y\n CONFIG_FIT=y\n CONFIG_FIT_VERBOSE=y\n@@ -21,6 +22,8 @@ CONFIG_CMD_PING=y\n CONFIG_MP=y\n CONFIG_CMD_EXT2=y\n CONFIG_CMD_FAT=y\n+CONFIG_DEFAULT_DEVICE_TREE=\"t4240rdb\"\n+CONFIG_OF_CONTROL=y\n CONFIG_ENV_IS_IN_FLASH=y\n CONFIG_FSL_CAAM=y\n CONFIG_FSL_ESDHC=y\n", "prefixes": [ "U-Boot", "PATCHv2", "03/14" ] }