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GET /api/patches/1143839/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 1143839,
    "url": "http://patchwork.ozlabs.org/api/patches/1143839/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20190808061223.42725-1-sasha.neftin@intel.com/",
    "project": {
        "id": 46,
        "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api",
        "name": "Intel Wired Ethernet development",
        "link_name": "intel-wired-lan",
        "list_id": "intel-wired-lan.osuosl.org",
        "list_email": "intel-wired-lan@osuosl.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20190808061223.42725-1-sasha.neftin@intel.com>",
    "list_archive_url": null,
    "date": "2019-08-08T06:12:23",
    "name": "[v1] igc: Add tx_csum offload functionality",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": false,
    "hash": "c9488ce1ca548c4e5aae5e624e16fddf91fa489f",
    "submitter": {
        "id": 69860,
        "url": "http://patchwork.ozlabs.org/api/people/69860/?format=api",
        "name": "Sasha Neftin",
        "email": "sasha.neftin@intel.com"
    },
    "delegate": {
        "id": 68,
        "url": "http://patchwork.ozlabs.org/api/users/68/?format=api",
        "username": "jtkirshe",
        "first_name": "Jeff",
        "last_name": "Kirsher",
        "email": "jeffrey.t.kirsher@intel.com"
    },
    "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20190808061223.42725-1-sasha.neftin@intel.com/mbox/",
    "series": [
        {
            "id": 123929,
            "url": "http://patchwork.ozlabs.org/api/series/123929/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=123929",
            "date": "2019-08-08T06:12:23",
            "name": "[v1] igc: Add tx_csum offload functionality",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/123929/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/1143839/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/1143839/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<intel-wired-lan-bounces@osuosl.org>",
        "X-Original-To": [
            "incoming@patchwork.ozlabs.org",
            "intel-wired-lan@lists.osuosl.org"
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        "Delivered-To": [
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            "intel-wired-lan@lists.osuosl.org"
        ],
        "Authentication-Results": [
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            "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id E753D86C12;\n\tThu,  8 Aug 2019 06:12:29 +0000 (UTC)",
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            "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 99DC785A96\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu,  8 Aug 2019 06:12:26 +0000 (UTC)",
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            "from orsmga006.jf.intel.com ([10.7.209.51])\n\tby orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t07 Aug 2019 23:12:25 -0700",
            "from ccdlinuxdev08.iil.intel.com ([143.185.161.150])\n\tby orsmga006.jf.intel.com with ESMTP; 07 Aug 2019 23:12:24 -0700"
        ],
        "X-Virus-Scanned": [
            "amavisd-new at osuosl.org",
            "amavisd-new at osuosl.org"
        ],
        "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6",
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.64,360,1559545200\"; d=\"scan'208\";a=\"179741423\"",
        "From": "Sasha Neftin <sasha.neftin@intel.com>",
        "To": "intel-wired-lan@lists.osuosl.org",
        "Date": "Thu,  8 Aug 2019 09:12:23 +0300",
        "Message-Id": "<20190808061223.42725-1-sasha.neftin@intel.com>",
        "X-Mailer": "git-send-email 2.11.0",
        "Subject": "[Intel-wired-lan] [PATCH v1] igc: Add tx_csum offload functionality",
        "X-BeenThere": "intel-wired-lan@osuosl.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>",
        "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>",
        "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>",
        "List-Post": "<mailto:intel-wired-lan@osuosl.org>",
        "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>",
        "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain; charset=\"us-ascii\"",
        "Content-Transfer-Encoding": "7bit",
        "Errors-To": "intel-wired-lan-bounces@osuosl.org",
        "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>"
    },
    "content": "Add ip generic TX checksum offload functionality.\n\nSigned-off-by: Sasha Neftin <sasha.neftin@intel.com>\n---\n drivers/net/ethernet/intel/igc/igc.h         |  4 ++\n drivers/net/ethernet/intel/igc/igc_base.h    |  8 +++\n drivers/net/ethernet/intel/igc/igc_defines.h |  5 ++\n drivers/net/ethernet/intel/igc/igc_main.c    | 97 ++++++++++++++++++++++++++++\n 4 files changed, 114 insertions(+)",
    "diff": "diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/intel/igc/igc.h\nindex 0f5534ce27b0..7e16345d836e 100644\n--- a/drivers/net/ethernet/intel/igc/igc.h\n+++ b/drivers/net/ethernet/intel/igc/igc.h\n@@ -135,6 +135,9 @@ extern char igc_driver_version[];\n /* How many Rx Buffers do we bundle into one write to the hardware ? */\n #define IGC_RX_BUFFER_WRITE\t16 /* Must be power of 2 */\n \n+/* VLAN info */\n+#define IGC_TX_FLAGS_VLAN_MASK\t0xffff0000\n+\n /* igc_test_staterr - tests bits within Rx descriptor status and error fields */\n static inline __le32 igc_test_staterr(union igc_adv_rx_desc *rx_desc,\n \t\t\t\t      const u32 stat_err_bits)\n@@ -254,6 +257,7 @@ struct igc_ring {\n \tu16 count;                      /* number of desc. in the ring */\n \tu8 queue_index;                 /* logical index of the ring*/\n \tu8 reg_idx;                     /* physical index of the ring */\n+\tbool launchtime_enable;\t\t/* true if LaunchTime is enabled */\n \n \t/* everything past this point are written often */\n \tu16 next_to_clean;\ndiff --git a/drivers/net/ethernet/intel/igc/igc_base.h b/drivers/net/ethernet/intel/igc/igc_base.h\nindex 58d1109d7f3f..ea627ce52525 100644\n--- a/drivers/net/ethernet/intel/igc/igc_base.h\n+++ b/drivers/net/ethernet/intel/igc/igc_base.h\n@@ -22,6 +22,14 @@ union igc_adv_tx_desc {\n \t} wb;\n };\n \n+/* Context descriptors */\n+struct igc_adv_tx_context_desc {\n+\t__le32 vlan_macip_lens;\n+\t__le32 launch_time;\n+\t__le32 type_tucmd_mlhl;\n+\t__le32 mss_l4len_idx;\n+};\n+\n /* Adv Transmit Descriptor Config Masks */\n #define IGC_ADVTXD_MAC_TSTAMP\t0x00080000 /* IEEE1588 Timestamp packet */\n #define IGC_ADVTXD_DTYP_CTXT\t0x00200000 /* Advanced Context Descriptor */\ndiff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h\nindex 549134ecd105..f3f2325fe567 100644\n--- a/drivers/net/ethernet/intel/igc/igc_defines.h\n+++ b/drivers/net/ethernet/intel/igc/igc_defines.h\n@@ -397,4 +397,9 @@\n #define IGC_VLAPQF_P_VALID(_n)\t(0x1 << (3 + (_n) * 4))\n #define IGC_VLAPQF_QUEUE_MASK\t0x03\n \n+#define IGC_ADVTXD_MACLEN_SHIFT\t\t9  /* Adv ctxt desc mac len shift */\n+#define IGC_ADVTXD_TUCMD_IPV4\t\t0x00000400  /* IP Packet Type:1=IPv4 */\n+#define IGC_ADVTXD_TUCMD_L4T_TCP\t0x00000800  /* L4 Packet Type of TCP */\n+#define IGC_ADVTXD_TUCMD_L4T_SCTP\t0x00001000 /* L4 packet TYPE of SCTP */\n+\n #endif /* _IGC_DEFINES_H_ */\ndiff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c\nindex c855d9cbe431..c5b62991284d 100644\n--- a/drivers/net/ethernet/intel/igc/igc_main.c\n+++ b/drivers/net/ethernet/intel/igc/igc_main.c\n@@ -5,6 +5,11 @@\n #include <linux/types.h>\n #include <linux/if_vlan.h>\n #include <linux/aer.h>\n+#include <linux/tcp.h>\n+#include <linux/udp.h>\n+#include <linux/ip.h>\n+\n+#include <net/ipv6.h>\n \n #include \"igc.h\"\n #include \"igc_hw.h\"\n@@ -791,8 +796,96 @@ static int igc_set_mac(struct net_device *netdev, void *p)\n \treturn 0;\n }\n \n+static void igc_tx_ctxtdesc(struct igc_ring *tx_ring,\n+\t\t\t    struct igc_tx_buffer *first,\n+\t\t\t    u32 vlan_macip_lens, u32 type_tucmd,\n+\t\t\t    u32 mss_l4len_idx)\n+{\n+\tstruct igc_adv_tx_context_desc *context_desc;\n+\tu16 i = tx_ring->next_to_use;\n+\tstruct timespec64 ts;\n+\n+\tcontext_desc = IGC_TX_CTXTDESC(tx_ring, i);\n+\n+\ti++;\n+\ttx_ring->next_to_use = (i < tx_ring->count) ? i : 0;\n+\n+\t/* set bits to identify this as an advanced context descriptor */\n+\ttype_tucmd |= IGC_TXD_CMD_DEXT | IGC_ADVTXD_DTYP_CTXT;\n+\n+\t/* For 82575, context index must be unique per ring. */\n+\tif (test_bit(IGC_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))\n+\t\tmss_l4len_idx |= tx_ring->reg_idx << 4;\n+\n+\tcontext_desc->vlan_macip_lens\t= cpu_to_le32(vlan_macip_lens);\n+\tcontext_desc->type_tucmd_mlhl\t= cpu_to_le32(type_tucmd);\n+\tcontext_desc->mss_l4len_idx\t= cpu_to_le32(mss_l4len_idx);\n+\n+\t/* We assume there is always a valid tx time available. Invalid times\n+\t * should have been handled by the upper layers.\n+\t */\n+\tif (tx_ring->launchtime_enable) {\n+\t\tts = ns_to_timespec64(first->skb->tstamp);\n+\t\tfirst->skb->tstamp = 0;\n+\t\tcontext_desc->launch_time = cpu_to_le32(ts.tv_nsec / 32);\n+\t} else {\n+\t\tcontext_desc->launch_time = 0;\n+\t}\n+}\n+\n+static inline bool igc_ipv6_csum_is_sctp(struct sk_buff *skb)\n+{\n+\tunsigned int offset = 0;\n+\n+\tipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);\n+\n+\treturn offset == skb_checksum_start_offset(skb);\n+}\n+\n static void igc_tx_csum(struct igc_ring *tx_ring, struct igc_tx_buffer *first)\n {\n+\tstruct sk_buff *skb = first->skb;\n+\tu32 vlan_macip_lens = 0;\n+\tu32 type_tucmd = 0;\n+\n+\tif (skb->ip_summed != CHECKSUM_PARTIAL) {\n+csum_failed:\n+\t\tif (!(first->tx_flags & IGC_TX_FLAGS_VLAN) &&\n+\t\t    !tx_ring->launchtime_enable)\n+\t\t\treturn;\n+\t\tgoto no_csum;\n+\t}\n+\n+\tswitch (skb->csum_offset) {\n+\tcase offsetof(struct tcphdr, check):\n+\t\ttype_tucmd = IGC_ADVTXD_TUCMD_L4T_TCP;\n+\t\t/* fall through */\n+\tcase offsetof(struct udphdr, check):\n+\t\tbreak;\n+\tcase offsetof(struct sctphdr, checksum):\n+\t\t/* validate that this is actually an SCTP request */\n+\t\tif ((first->protocol == htons(ETH_P_IP) &&\n+\t\t     (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||\n+\t\t    (first->protocol == htons(ETH_P_IPV6) &&\n+\t\t     igc_ipv6_csum_is_sctp(skb))) {\n+\t\t\ttype_tucmd = IGC_ADVTXD_TUCMD_L4T_SCTP;\n+\t\t\tbreak;\n+\t\t}\n+\t\t/* fall through */\n+\tdefault:\n+\t\tskb_checksum_help(skb);\n+\t\tgoto csum_failed;\n+\t}\n+\n+\t/* update TX checksum flag */\n+\tfirst->tx_flags |= IGC_TX_FLAGS_CSUM;\n+\tvlan_macip_lens = skb_checksum_start_offset(skb) -\n+\t\t\t  skb_network_offset(skb);\n+no_csum:\n+\tvlan_macip_lens |= skb_network_offset(skb) << IGC_ADVTXD_MACLEN_SHIFT;\n+\tvlan_macip_lens |= first->tx_flags & IGC_TX_FLAGS_VLAN_MASK;\n+\n+\tigc_tx_ctxtdesc(tx_ring, first, vlan_macip_lens, type_tucmd, 0);\n }\n \n static int __igc_maybe_stop_tx(struct igc_ring *tx_ring, const u16 size)\n@@ -4117,6 +4210,9 @@ static int igc_probe(struct pci_dev *pdev,\n \tif (err)\n \t\tgoto err_sw_init;\n \n+\t/* Add supported features to the features list*/\n+\tnetdev->features |= NETIF_F_HW_CSUM;\n+\n \t/* setup the private structure */\n \terr = igc_sw_init(adapter);\n \tif (err)\n@@ -4124,6 +4220,7 @@ static int igc_probe(struct pci_dev *pdev,\n \n \t/* copy netdev features into list of user selectable features */\n \tnetdev->hw_features |= NETIF_F_NTUPLE;\n+\tnetdev->hw_features |= netdev->features;\n \n \t/* MTU range: 68 - 9216 */\n \tnetdev->min_mtu = ETH_MIN_MTU;\n",
    "prefixes": [
        "v1"
    ]
}