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GET /api/patches/1139008/?format=api
{ "id": 1139008, "url": "http://patchwork.ozlabs.org/api/patches/1139008/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20190730142959.8467-3-laurentiu.tudor@nxp.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20190730142959.8467-3-laurentiu.tudor@nxp.com>", "list_archive_url": null, "date": "2019-07-30T14:29:57", "name": "[U-Boot,3/5] armv8: fsl-layerscape: make icid setup endianness aware", "commit_ref": "aef654a2ed386d8bd53053383f6bf15ba016a79c", "pull_url": null, "state": "accepted", "archived": false, "hash": "bdbdae86c55bfaf9a6e47847b7ea0c08e38032a6", "submitter": { "id": 71003, "url": "http://patchwork.ozlabs.org/api/people/71003/?format=api", "name": "Laurentiu Tudor", "email": "laurentiu.tudor@nxp.com" }, "delegate": { "id": 2467, "url": "http://patchwork.ozlabs.org/api/users/2467/?format=api", "username": "prabhu_kush", "first_name": "Prabhakar", "last_name": "Kushwaha", "email": "prabhakar@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20190730142959.8467-3-laurentiu.tudor@nxp.com/mbox/", "series": [ { "id": 122243, "url": "http://patchwork.ozlabs.org/api/series/122243/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=122243", "date": "2019-07-30T14:29:55", "name": "[U-Boot,1/5] armv8: fsl-layerscape: add missing sec jr base address defines", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/122243/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1139008/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1139008/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=nxp.com" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 45yfCR4y1Zz9s00\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 31 Jul 2019 00:32:19 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 21D64C21EA8; Tue, 30 Jul 2019 14:30:43 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 3A714C21E57;\n\tTue, 30 Jul 2019 14:30:08 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 825C0C21DD7; Tue, 30 Jul 2019 14:30:05 +0000 (UTC)", "from inva021.nxp.com (inva021.nxp.com [92.121.34.21])\n\tby lists.denx.de (Postfix) with ESMTPS id 1A67FC21DD7\n\tfor <u-boot@lists.denx.de>; Tue, 30 Jul 2019 14:30:05 +0000 (UTC)", "from inva021.nxp.com (localhost [127.0.0.1])\n\tby inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 97738200709;\n\tTue, 30 Jul 2019 16:30:04 +0200 (CEST)", "from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com\n\t[134.27.226.22])\n\tby inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 8AC732006FA;\n\tTue, 30 Jul 2019 16:30:04 +0200 (CEST)", "from fsr-ub1864-101.ea.freescale.net\n\t(fsr-ub1864-101.ea.freescale.net [10.171.82.13])\n\tby inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id 4074F204D6;\n\tTue, 30 Jul 2019 16:30:04 +0200 (CEST)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=none autolearn=unavailable\n\tautolearn_force=no version=3.4.0", "From": "laurentiu.tudor@nxp.com", "To": "u-boot@lists.denx.de,\n\tprabhakar.kushwaha@nxp.com", "Date": "Tue, 30 Jul 2019 17:29:57 +0300", "Message-Id": "<20190730142959.8467-3-laurentiu.tudor@nxp.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20190730142959.8467-1-laurentiu.tudor@nxp.com>", "References": "<20190730142959.8467-1-laurentiu.tudor@nxp.com>", "X-Virus-Scanned": "ClamAV using ClamSMTP", "Subject": "[U-Boot] [PATCH 3/5] armv8: fsl-layerscape: make icid setup\n\tendianness aware", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "From: Laurentiu Tudor <laurentiu.tudor@nxp.com>\n\nThe current implementation assumes that the registers holding the ICIDs\nare universally big endian. That's no longer the case on newer\nplatforms so update the code to take into account the endianness of\neach register.\n\nSigned-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>\n---\n arch/arm/cpu/armv8/fsl-layerscape/icid.c | 5 ++-\n .../asm/arch-fsl-layerscape/fsl_icid.h | 34 +++++++++++++------\n 2 files changed, 28 insertions(+), 11 deletions(-)", "diff": "diff --git a/arch/arm/cpu/armv8/fsl-layerscape/icid.c b/arch/arm/cpu/armv8/fsl-layerscape/icid.c\nindex b1a950e7f9..82c5a8b123 100644\n--- a/arch/arm/cpu/armv8/fsl-layerscape/icid.c\n+++ b/arch/arm/cpu/armv8/fsl-layerscape/icid.c\n@@ -17,7 +17,10 @@ static void set_icid(struct icid_id_table *tbl, int size)\n \tint i;\n \n \tfor (i = 0; i < size; i++)\n-\t\tout_be32((u32 *)(tbl[i].reg_addr), tbl[i].reg);\n+\t\tif (tbl[i].le)\n+\t\t\tout_le32((u32 *)(tbl[i].reg_addr), tbl[i].reg);\n+\t\telse\n+\t\t\tout_be32((u32 *)(tbl[i].reg_addr), tbl[i].reg);\n }\n \n #ifdef CONFIG_SYS_DPAA_FMAN\ndiff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h\nindex f971af8d26..435ffb04fa 100644\n--- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h\n+++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h\n@@ -17,6 +17,7 @@ struct icid_id_table {\n \tu32 reg;\n \tphys_addr_t compat_addr;\n \tphys_addr_t reg_addr;\n+\tbool le;\n };\n \n struct fman_icid_id_table {\n@@ -30,18 +31,25 @@ int fdt_set_iommu_prop(void *blob, int off, int smmu_ph, u32 *ids, int num_ids);\n void set_icids(void);\n void fdt_fixup_icid(void *blob);\n \n-#define SET_ICID_ENTRY(name, idA, regA, addr, compataddr) \\\n+#define SET_ICID_ENTRY(name, idA, regA, addr, compataddr, _le) \\\n \t{ .compat = name, \\\n \t .id = idA, \\\n \t .reg = regA, \\\n \t .compat_addr = compataddr, \\\n \t .reg_addr = addr, \\\n+\t .le = _le \\\n \t}\n \n+#ifdef CONFIG_SYS_FSL_CCSR_SCFG_LE\n+#define SCFG_IS_LE true\n+#elif defined(CONFIG_SYS_FSL_CCSR_SCFG_BE)\n+#define SCFG_IS_LE false\n+#endif\n+\n #define SET_SCFG_ICID(compat, streamid, name, compataddr) \\\n \tSET_ICID_ENTRY(compat, streamid, (((streamid) << 24) | (1 << 23)), \\\n \t\toffsetof(struct ccsr_scfg, name) + CONFIG_SYS_FSL_SCFG_ADDR, \\\n-\t\tcompataddr)\n+\t\tcompataddr, SCFG_IS_LE)\n \n #define SET_USB_ICID(usb_num, compat, streamid) \\\n \tSET_SCFG_ICID(compat, streamid, usb##usb_num##_icid,\\\n@@ -58,10 +66,10 @@ void fdt_fixup_icid(void *blob);\n #define SET_QDMA_ICID(compat, streamid) \\\n \tSET_ICID_ENTRY(compat, streamid, (1 << 31) | (streamid), \\\n \t\tQDMA_BASE_ADDR + QMAN_CQSIDR_REG, \\\n-\t\tQDMA_BASE_ADDR), \\\n+\t\tQDMA_BASE_ADDR, false), \\\n \tSET_ICID_ENTRY(NULL, streamid, (1 << 31) | (streamid), \\\n \t\tQDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \\\n-\t\tQDMA_BASE_ADDR)\n+\t\tQDMA_BASE_ADDR, false)\n \n #define SET_EDMA_ICID(streamid) \\\n \tSET_SCFG_ICID(\"fsl,vf610-edma\", streamid, edma_icid,\\\n@@ -81,22 +89,28 @@ void fdt_fixup_icid(void *blob);\n \tSET_ICID_ENTRY(\"fsl,qman\", streamid, streamid, \\\n \t\toffsetof(struct ccsr_qman, liodnr) + \\\n \t\tCONFIG_SYS_FSL_QMAN_ADDR, \\\n-\t\tCONFIG_SYS_FSL_QMAN_ADDR)\n+\t\tCONFIG_SYS_FSL_QMAN_ADDR, false)\n \n #define SET_BMAN_ICID(streamid) \\\n \tSET_ICID_ENTRY(\"fsl,bman\", streamid, streamid, \\\n \t\toffsetof(struct ccsr_bman, liodnr) + \\\n \t\tCONFIG_SYS_FSL_BMAN_ADDR, \\\n-\t\tCONFIG_SYS_FSL_BMAN_ADDR)\n+\t\tCONFIG_SYS_FSL_BMAN_ADDR, false)\n \n #define SET_FMAN_ICID_ENTRY(_port_id, streamid) \\\n \t{ .port_id = (_port_id), .icid = (streamid) }\n \n+#ifdef CONFIG_SYS_FSL_SEC_LE\n+#define SEC_IS_LE true\n+#elif defined(CONFIG_SYS_FSL_SEC_BE)\n+#define SEC_IS_LE false\n+#endif\n+\n #define SET_SEC_QI_ICID(streamid) \\\n \tSET_ICID_ENTRY(\"fsl,sec-v4.0\", streamid, \\\n \t\t0, offsetof(ccsr_sec_t, qilcr_ls) + \\\n \t\tCONFIG_SYS_FSL_SEC_ADDR, \\\n-\t\tCONFIG_SYS_FSL_SEC_ADDR)\n+\t\tCONFIG_SYS_FSL_SEC_ADDR, SEC_IS_LE)\n \n #define SET_SEC_JR_ICID_ENTRY(jr_num, streamid) \\\n \tSET_ICID_ENTRY( \\\n@@ -109,17 +123,17 @@ void fdt_fixup_icid(void *blob);\n \t\t(((streamid) << 16) | (streamid)), \\\n \t\toffsetof(ccsr_sec_t, jrliodnr[jr_num].ls) + \\\n \t\tCONFIG_SYS_FSL_SEC_ADDR, \\\n-\t\tFSL_SEC_JR##jr_num##_BASE_ADDR)\n+\t\tFSL_SEC_JR##jr_num##_BASE_ADDR, SEC_IS_LE)\n \n #define SET_SEC_DECO_ICID_ENTRY(deco_num, streamid) \\\n \tSET_ICID_ENTRY(NULL, streamid, (((streamid) << 16) | (streamid)), \\\n \t\toffsetof(ccsr_sec_t, decoliodnr[deco_num].ls) + \\\n-\t\tCONFIG_SYS_FSL_SEC_ADDR, 0)\n+\t\tCONFIG_SYS_FSL_SEC_ADDR, 0, SEC_IS_LE)\n \n #define SET_SEC_RTIC_ICID_ENTRY(rtic_num, streamid) \\\n \tSET_ICID_ENTRY(NULL, streamid, (((streamid) << 16) | (streamid)), \\\n \t\toffsetof(ccsr_sec_t, rticliodnr[rtic_num].ls) + \\\n-\t\tCONFIG_SYS_FSL_SEC_ADDR, 0)\n+\t\tCONFIG_SYS_FSL_SEC_ADDR, 0, SEC_IS_LE)\n \n extern struct icid_id_table icid_tbl[];\n extern struct fman_icid_id_table fman_icid_tbl[];\n", "prefixes": [ "U-Boot", "3/5" ] }