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GET /api/patches/1135575/?format=api
{ "id": 1135575, "url": "http://patchwork.ozlabs.org/api/patches/1135575/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20190723104315.45829-1-chuanhua.han@nxp.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20190723104315.45829-1-chuanhua.han@nxp.com>", "list_archive_url": null, "date": "2019-07-23T10:43:11", "name": "[U-Boot,v3,1/5] armv8: ls1088a: The ls1088a platform supports the I2C driver model.", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "3aa65b4866fb9375f39618c149361635f865b4db", "submitter": { "id": 74737, "url": "http://patchwork.ozlabs.org/api/people/74737/?format=api", "name": "Chuanhua Han", "email": "chuanhua.han@nxp.com" }, "delegate": { "id": 2467, "url": "http://patchwork.ozlabs.org/api/users/2467/?format=api", "username": "prabhu_kush", "first_name": "Prabhakar", "last_name": "Kushwaha", "email": "prabhakar@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20190723104315.45829-1-chuanhua.han@nxp.com/mbox/", "series": [ { "id": 120936, "url": "http://patchwork.ozlabs.org/api/series/120936/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=120936", "date": "2019-07-23T10:43:11", "name": "[U-Boot,v3,1/5] armv8: ls1088a: The ls1088a platform supports the I2C driver model.", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/120936/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1135575/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1135575/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=nxp.com" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 45tFgm3qpSz9sBt\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 23 Jul 2019 20:53:08 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 378FEC21C27; Tue, 23 Jul 2019 10:53:03 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id F0C77C21C38;\n\tTue, 23 Jul 2019 10:53:00 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid D1D4EC21C2F; Tue, 23 Jul 2019 10:52:59 +0000 (UTC)", "from inva021.nxp.com (inva021.nxp.com [92.121.34.21])\n\tby lists.denx.de (Postfix) with ESMTPS id 6A891C21C27\n\tfor <u-boot@lists.denx.de>; Tue, 23 Jul 2019 10:52:59 +0000 (UTC)", "from inva021.nxp.com (localhost [127.0.0.1])\n\tby inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 3321D2002CC;\n\tTue, 23 Jul 2019 12:52:59 +0200 (CEST)", "from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com\n\t[165.114.16.14])\n\tby inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 7F8C0200070;\n\tTue, 23 Jul 2019 12:52:55 +0200 (CEST)", "from titan.ap.freescale.net (TITAN.ap.freescale.net\n\t[10.192.208.233])\n\tby invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id D6286402B4;\n\tTue, 23 Jul 2019 18:52:50 +0800 (SGT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=none autolearn=unavailable\n\tautolearn_force=no version=3.4.0", "From": "Chuanhua Han <chuanhua.han@nxp.com>", "To": "rabhakar.kushwaha@nxp.com, albert.u.boot@aribaud.net,\n\tAshish.Kumar@nxp.com, rajesh.bhagat@nxp.com", "Date": "Tue, 23 Jul 2019 18:43:11 +0800", "Message-Id": "<20190723104315.45829-1-chuanhua.han@nxp.com>", "X-Mailer": "git-send-email 2.9.5", "X-Virus-Scanned": "ClamAV using ClamSMTP", "Cc": "u-boot@lists.denx.de, Chuanhua Han <chuanhua.han@nxp.com>", "Subject": "[U-Boot] [PATCH v3 1/5] armv8: ls1088a: The ls1088a platform\n\tsupports the I2C driver model.", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "DM_I2C_COMPAT is a compatibility layer that allows using the non-DM\nI2C API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for\ncompilation, a compilation error will be generated. This patch\nsolves the problem that the i2c-related api of the ls1088a platform\ndoes not support dm.\n\nSigned-off-by: Chuanhua Han <chuanhua.han@nxp.com>\n---\ndepends on:\n\t- http://patchwork.ozlabs.org/project/uboot/list/?series=110856\n\t- http://patchwork.ozlabs.org/project/uboot/list/?series=109459\n\nChanges in v3:\n\t- Change the Kconfig file to !TFABOOT.\n\t- Define the use of CONFIG_SYS_I2C for non-dm.\nChanges in v2:\n\t- No change.\n\n arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 8 +-\n board/freescale/ls1088a/ls1088a.c | 148 ++++++++++++++++++++++++++++++\n include/configs/ls1088a_common.h | 3 +\n include/configs/ls1088ardb.h | 2 -\n 4 files changed, 155 insertions(+), 6 deletions(-)", "diff": "diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig\nindex ffda02a..b2768ed 100644\n--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig\n+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig\n@@ -155,10 +155,10 @@ config ARCH_LS1088A\n \tselect ARCH_EARLY_INIT_R\n \tselect BOARD_EARLY_INIT_F\n \tselect SYS_I2C_MXC\n-\tselect SYS_I2C_MXC_I2C1\n-\tselect SYS_I2C_MXC_I2C2\n-\tselect SYS_I2C_MXC_I2C3\n-\tselect SYS_I2C_MXC_I2C4\n+\tselect SYS_I2C_MXC_I2C1 if !TFABOOT\n+\tselect SYS_I2C_MXC_I2C2 if !TFABOOT\n+\tselect SYS_I2C_MXC_I2C3 if !TFABOOT\n+\tselect SYS_I2C_MXC_I2C4 if !TFABOOT\n \timply SCSI\n \timply PANIC_HANG\n \ndiff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c\nindex 6d11a13..2bac070 100644\n--- a/board/freescale/ls1088a/ls1088a.c\n+++ b/board/freescale/ls1088a/ls1088a.c\n@@ -373,7 +373,15 @@ int select_i2c_ch_pca9547(u8 ch)\n {\n \tint ret;\n \n+#ifndef CONFIG_DM_I2C\n \tret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);\n+#else\n+\tstruct udevice *dev;\n+\n+\tret = i2c_get_chip_for_busnum(0, I2C_MUX_PCA_ADDR_PRI, 1, &dev);\n+\tif (!ret)\n+\t\tret = dm_i2c_write(dev, 0, &ch, 1);\n+#endif\n \tif (ret) {\n \t\tputs(\"PCA: failed to select proper channel\\n\");\n \t\treturn ret;\n@@ -392,38 +400,89 @@ void board_retimer_init(void)\n \n \t/* Access to Control/Shared register */\n \treg = 0x0;\n+#ifndef CONFIG_DM_I2C\n \ti2c_write(I2C_RETIMER_ADDR, 0xff, 1, ®, 1);\n+#else\n+\tstruct udevice *dev;\n+\n+\ti2c_get_chip_for_busnum(0, I2C_RETIMER_ADDR, 1, &dev);\n+\tdm_i2c_write(dev, 0xff, ®, 1);\n+#endif\n \n \t/* Read device revision and ID */\n+#ifndef CONFIG_DM_I2C\n \ti2c_read(I2C_RETIMER_ADDR, 1, 1, ®, 1);\n+#else\n+\tdm_i2c_read(dev, 1, ®, 1);\n+#endif\n \tdebug(\"Retimer version id = 0x%x\\n\", reg);\n \n \t/* Enable Broadcast. All writes target all channel register sets */\n \treg = 0x0c;\n+#ifndef CONFIG_DM_I2C\n \ti2c_write(I2C_RETIMER_ADDR, 0xff, 1, ®, 1);\n+#else\n+\tdm_i2c_write(dev, 0xff, ®, 1);\n+#endif\n \n \t/* Reset Channel Registers */\n+#ifndef CONFIG_DM_I2C\n \ti2c_read(I2C_RETIMER_ADDR, 0, 1, ®, 1);\n+#else\n+\tdm_i2c_read(dev, 0, ®, 1);\n+#endif\n \treg |= 0x4;\n+#ifndef CONFIG_DM_I2C\n \ti2c_write(I2C_RETIMER_ADDR, 0, 1, ®, 1);\n+#else\n+\tdm_i2c_write(dev, 0, ®, 1);\n+#endif\n \n \t/* Set data rate as 10.3125 Gbps */\n \treg = 0x90;\n+#ifndef CONFIG_DM_I2C\n \ti2c_write(I2C_RETIMER_ADDR, 0x60, 1, ®, 1);\n+#else\n+\tdm_i2c_write(dev, 0x60, ®, 1);\n+#endif\n \treg = 0xb3;\n+#ifndef CONFIG_DM_I2C\n \ti2c_write(I2C_RETIMER_ADDR, 0x61, 1, ®, 1);\n+#else\n+\tdm_i2c_write(dev, 0x61, ®, 1);\n+#endif\n \treg = 0x90;\n+#ifndef CONFIG_DM_I2C\n \ti2c_write(I2C_RETIMER_ADDR, 0x62, 1, ®, 1);\n+#else\n+\tdm_i2c_write(dev, 0x62, ®, 1);\n+#endif\n \treg = 0xb3;\n+#ifndef CONFIG_DM_I2C\n \ti2c_write(I2C_RETIMER_ADDR, 0x63, 1, ®, 1);\n+#else\n+\tdm_i2c_write(dev, 0x63, ®, 1);\n+#endif\n \treg = 0xcd;\n+#ifndef CONFIG_DM_I2C\n \ti2c_write(I2C_RETIMER_ADDR, 0x64, 1, ®, 1);\n+#else\n+\tdm_i2c_write(dev, 0x64, ®, 1);\n+#endif\n \n \t/* Select VCO Divider to full rate (000) */\n+#ifndef CONFIG_DM_I2C\n \ti2c_read(I2C_RETIMER_ADDR, 0x2F, 1, ®, 1);\n+#else\n+\tdm_i2c_read(dev, 0x2F, ®, 1);\n+#endif\n \treg &= 0x0f;\n \treg |= 0x70;\n+#ifndef CONFIG_DM_I2C\n \ti2c_write(I2C_RETIMER_ADDR, 0x2F, 1, ®, 1);\n+#else\n+\tdm_i2c_write(dev, 0x2F, ®, 1);\n+#endif\n \n #ifdef\tCONFIG_TARGET_LS1088AQDS\n \t/* Retimer is connected to I2C1_CH5 */\n@@ -431,38 +490,88 @@ void board_retimer_init(void)\n \n \t/* Access to Control/Shared register */\n \treg = 0x0;\n+#ifndef CONFIG_DM_I2C\n \ti2c_write(I2C_RETIMER_ADDR2, 0xff, 1, ®, 1);\n+#else\n+\ti2c_get_chip_for_busnum(0, I2C_RETIMER_ADDR2, 1, &dev);\n+\tdm_i2c_write(dev, 0xff, ®, 1);\n+#endif\n \n \t/* Read device revision and ID */\n+#ifndef CONFIG_DM_I2C\n \ti2c_read(I2C_RETIMER_ADDR2, 1, 1, ®, 1);\n+#else\n+\tdm_i2c_read(dev, 1, ®, 1);\n+#endif\n \tdebug(\"Retimer version id = 0x%x\\n\", reg);\n \n \t/* Enable Broadcast. All writes target all channel register sets */\n \treg = 0x0c;\n+#ifndef CONFIG_DM_I2C\n \ti2c_write(I2C_RETIMER_ADDR2, 0xff, 1, ®, 1);\n+#else\n+\tdm_i2c_write(dev, 0xff, ®, 1);\n+#endif\n \n \t/* Reset Channel Registers */\n+#ifndef CONFIG_DM_I2C\n \ti2c_read(I2C_RETIMER_ADDR2, 0, 1, ®, 1);\n+#else\n+\tdm_i2c_read(dev, 0, ®, 1);\n+#endif\n \treg |= 0x4;\n+#ifndef CONFIG_DM_I2C\n \ti2c_write(I2C_RETIMER_ADDR2, 0, 1, ®, 1);\n+#else\n+\tdm_i2c_write(dev, 0, ®, 1);\n+#endif\n \n \t/* Set data rate as 10.3125 Gbps */\n \treg = 0x90;\n+#ifndef CONFIG_DM_I2C\n \ti2c_write(I2C_RETIMER_ADDR2, 0x60, 1, ®, 1);\n+#else\n+\tdm_i2c_write(dev, 0x60, ®, 1);\n+#endif\n \treg = 0xb3;\n+#ifndef CONFIG_DM_I2C\n \ti2c_write(I2C_RETIMER_ADDR2, 0x61, 1, ®, 1);\n+#else\n+\tdm_i2c_write(dev, 0x61, ®, 1);\n+#endif\n \treg = 0x90;\n+#ifndef CONFIG_DM_I2C\n \ti2c_write(I2C_RETIMER_ADDR2, 0x62, 1, ®, 1);\n+#else\n+\tdm_i2c_write(dev, 0x62, ®, 1);\n+#endif\n \treg = 0xb3;\n+#ifndef CONFIG_DM_I2C\n \ti2c_write(I2C_RETIMER_ADDR2, 0x63, 1, ®, 1);\n+#else\n+\tdm_i2c_write(dev, 0x63, ®, 1);\n+#endif\n \treg = 0xcd;\n+#ifndef CONFIG_DM_I2C\n \ti2c_write(I2C_RETIMER_ADDR2, 0x64, 1, ®, 1);\n+#else\n+\tdm_i2c_write(dev, 0x64, ®, 1);\n+#endif\n \n \t/* Select VCO Divider to full rate (000) */\n+#ifndef CONFIG_DM_I2C\n \ti2c_read(I2C_RETIMER_ADDR2, 0x2F, 1, ®, 1);\n+#else\n+\tdm_i2c_read(dev, 0x2F, ®, 1);\n+#endif\n \treg &= 0x0f;\n \treg |= 0x70;\n+#ifndef CONFIG_DM_I2C\n \ti2c_write(I2C_RETIMER_ADDR2, 0x2F, 1, ®, 1);\n+#else\n+\tdm_i2c_write(dev, 0x2F, ®, 1);\n+#endif\n+\n #endif\n \t/*return the default channel*/\n \tselect_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);\n@@ -499,16 +608,30 @@ int get_serdes_volt(void)\n \tu8 chan = PWM_CHANNEL0;\n \n \t/* Select the PAGE 0 using PMBus commands PAGE for VDD */\n+#ifndef CONFIG_DM_I2C\n \tret = i2c_write(I2C_SVDD_MONITOR_ADDR,\n \t\t\tPMBUS_CMD_PAGE, 1, &chan, 1);\n+#else\n+\tstruct udevice *dev;\n+\n+\tret = i2c_get_chip_for_busnum(0, I2C_SVDD_MONITOR_ADDR, 1, &dev);\n+\tif (!ret)\n+\t\tret = dm_i2c_write(dev, PMBUS_CMD_PAGE,\n+\t\t\t\t &chan, 1);\n+#endif\n+\n \tif (ret) {\n \t\tprintf(\"VID: failed to select VDD Page 0\\n\");\n \t\treturn ret;\n \t}\n \n \t/* Read the output voltage using PMBus command READ_VOUT */\n+#ifndef CONFIG_DM_I2C\n \tret = i2c_read(I2C_SVDD_MONITOR_ADDR,\n \t\t PMBUS_CMD_READ_VOUT, 1, (void *)&vcode, 2);\n+#else\n+\tdm_i2c_read(dev, PMBUS_CMD_READ_VOUT, (void *)&vcode, 2);\n+#endif\n \tif (ret) {\n \t\tprintf(\"VID: failed to read the volatge\\n\");\n \t\treturn ret;\n@@ -524,8 +647,17 @@ int set_serdes_volt(int svdd)\n \t\t\tsvdd & 0xFF, (svdd & 0xFF00) >> 8};\n \n \t/* Write the desired voltage code to the SVDD regulator */\n+#ifndef CONFIG_DM_I2C\n \tret = i2c_write(I2C_SVDD_MONITOR_ADDR,\n \t\t\tPMBUS_CMD_PAGE_PLUS_WRITE, 1, (void *)&buff, 5);\n+#else\n+\tstruct udevice *dev;\n+\n+\tret = i2c_get_chip_for_busnum(0, I2C_SVDD_MONITOR_ADDR, 1, &dev);\n+\tif (!ret)\n+\t\tret = dm_i2c_write(dev, PMBUS_CMD_PAGE_PLUS_WRITE,\n+\t\t\t\t (void *)&buff, 5);\n+#endif\n \tif (ret) {\n \t\tprintf(\"VID: I2C failed to write to the volatge regulator\\n\");\n \t\treturn -1;\n@@ -556,8 +688,18 @@ int set_serdes_volt(int svdd)\n \tprintf(\"SVDD changing of RDB\\n\");\n \n \t/* Read the BRDCFG54 via CLPD */\n+#ifndef CONFIG_DM_I2C\n \tret = i2c_read(CONFIG_SYS_I2C_FPGA_ADDR,\n \t\t QIXIS_BRDCFG4_OFFSET, 1, (void *)&brdcfg4, 1);\n+#else\n+\tstruct udevice *dev;\n+\n+\tret = i2c_get_chip_for_busnum(0, CONFIG_SYS_I2C_FPGA_ADDR, 1, &dev);\n+\tif (!ret)\n+\t\tret = dm_i2c_read(dev, QIXIS_BRDCFG4_OFFSET,\n+\t\t\t\t (void *)&brdcfg4, 1);\n+#endif\n+\n \tif (ret) {\n \t\tprintf(\"VID: I2C failed to read the CPLD BRDCFG4\\n\");\n \t\treturn -1;\n@@ -566,8 +708,14 @@ int set_serdes_volt(int svdd)\n \tbrdcfg4 = brdcfg4 | 0x08;\n \n \t/* Write to the BRDCFG4 */\n+#ifndef CONFIG_DM_I2C\n \tret = i2c_write(CONFIG_SYS_I2C_FPGA_ADDR,\n \t\t\tQIXIS_BRDCFG4_OFFSET, 1, (void *)&brdcfg4, 1);\n+#else\n+\tret = dm_i2c_write(dev, QIXIS_BRDCFG4_OFFSET,\n+\t\t\t (void *)&brdcfg4, 1);\n+#endif\n+\n \tif (ret) {\n \t\tdebug(\"VID: I2C failed to set the SVDD CPLD BRDCFG4\\n\");\n \t\treturn -1;\ndiff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h\nindex e8e1dc2..6f04dba 100644\n--- a/include/configs/ls1088a_common.h\n+++ b/include/configs/ls1088a_common.h\n@@ -67,7 +67,10 @@\n #define CONFIG_SYS_MALLOC_LEN\t\t(CONFIG_ENV_SIZE + 2048 * 1024)\n \n /* I2C */\n+#ifndef CONFIG_DM_I2C\n #define CONFIG_SYS_I2C\n+#endif\n+\n \n /* Serial Port */\n #define CONFIG_SYS_NS16550_SERIAL\ndiff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h\nindex 322adb5..b71f704 100644\n--- a/include/configs/ls1088ardb.h\n+++ b/include/configs/ls1088ardb.h\n@@ -269,9 +269,7 @@\n * RTC configuration\n */\n #define RTC\n-#define CONFIG_RTC_PCF8563 1\n #define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/\n-#define CONFIG_CMD_DATE\n #endif\n \n /* EEPROM */\n", "prefixes": [ "U-Boot", "v3", "1/5" ] }