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GET /api/patches/1132752/?format=api
{ "id": 1132752, "url": "http://patchwork.ozlabs.org/api/patches/1132752/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20190716123539.3224-1-sasha.neftin@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20190716123539.3224-1-sasha.neftin@intel.com>", "list_archive_url": null, "date": "2019-07-16T12:35:39", "name": "[v1] igc: Remove useless forward declaration", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "c32bd34222bcae4c5675d4bc12761b018c16d0f1", "submitter": { "id": 69860, "url": "http://patchwork.ozlabs.org/api/people/69860/?format=api", "name": "Sasha Neftin", "email": "sasha.neftin@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20190716123539.3224-1-sasha.neftin@intel.com/mbox/", "series": [ { "id": 119768, "url": "http://patchwork.ozlabs.org/api/series/119768/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=119768", "date": "2019-07-16T12:35:39", "name": "[v1] igc: Remove useless forward declaration", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/119768/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1132752/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1132752/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.138; helo=whitealder.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 45p0HW13mWz9s3l\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 16 Jul 2019 22:35:48 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 8E94286B33;\n\tTue, 16 Jul 2019 12:35:46 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 9RqCkGUCF+LW; Tue, 16 Jul 2019 12:35:44 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 4E92E869EA;\n\tTue, 16 Jul 2019 12:35:44 +0000 (UTC)", "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ash.osuosl.org (Postfix) with ESMTP id A9B2A1BF3FC\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 16 Jul 2019 12:35:43 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id A1A2287C41\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 16 Jul 2019 12:35:43 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id kDFQt0r7wdUd for <intel-wired-lan@lists.osuosl.org>;\n\tTue, 16 Jul 2019 12:35:41 +0000 (UTC)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n\tby hemlock.osuosl.org (Postfix) with ESMTPS id 8826E8733D\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 16 Jul 2019 12:35:41 +0000 (UTC)", "from orsmga004.jf.intel.com ([10.7.209.38])\n\tby fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t16 Jul 2019 05:35:40 -0700", "from ccdlinuxdev08.iil.intel.com ([143.185.161.150])\n\tby orsmga004.jf.intel.com with ESMTP; 16 Jul 2019 05:35:39 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.63,498,1557212400\"; d=\"scan'208\";a=\"318980827\"", "From": "Sasha Neftin <sasha.neftin@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Tue, 16 Jul 2019 15:35:39 +0300", "Message-Id": "<20190716123539.3224-1-sasha.neftin@intel.com>", "X-Mailer": "git-send-email 2.11.0", "Subject": "[Intel-wired-lan] [PATCH v1] igc: Remove useless forward declaration", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "Move igc_phy_setup_autoneg,igc_wait_autoneg and igc_set_fc_watermarks\nup to avoid forward declaration.\nIt is not necessary to forward declare these static methods.\n\nSigned-off-by: Sasha Neftin <sasha.neftin@intel.com>\n---\n drivers/net/ethernet/intel/igc/igc_mac.c | 73 ++++++------\n drivers/net/ethernet/intel/igc/igc_phy.c | 192 +++++++++++++++----------------\n 2 files changed, 129 insertions(+), 136 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/igc/igc_mac.c b/drivers/net/ethernet/intel/igc/igc_mac.c\nindex ba4646737288..5eeb4c8caf4a 100644\n--- a/drivers/net/ethernet/intel/igc/igc_mac.c\n+++ b/drivers/net/ethernet/intel/igc/igc_mac.c\n@@ -7,9 +7,6 @@\n #include \"igc_mac.h\"\n #include \"igc_hw.h\"\n \n-/* forward declaration */\n-static s32 igc_set_fc_watermarks(struct igc_hw *hw);\n-\n /**\n * igc_disable_pcie_master - Disables PCI-express master access\n * @hw: pointer to the HW structure\n@@ -75,6 +72,41 @@ void igc_init_rx_addrs(struct igc_hw *hw, u16 rar_count)\n }\n \n /**\n+ * igc_set_fc_watermarks - Set flow control high/low watermarks\n+ * @hw: pointer to the HW structure\n+ *\n+ * Sets the flow control high/low threshold (watermark) registers. If\n+ * flow control XON frame transmission is enabled, then set XON frame\n+ * transmission as well.\n+ */\n+static s32 igc_set_fc_watermarks(struct igc_hw *hw)\n+{\n+\tu32 fcrtl = 0, fcrth = 0;\n+\n+\t/* Set the flow control receive threshold registers. Normally,\n+\t * these registers will be set to a default threshold that may be\n+\t * adjusted later by the driver's runtime code. However, if the\n+\t * ability to transmit pause frames is not enabled, then these\n+\t * registers will be set to 0.\n+\t */\n+\tif (hw->fc.current_mode & igc_fc_tx_pause) {\n+\t\t/* We need to set up the Receive Threshold high and low water\n+\t\t * marks as well as (optionally) enabling the transmission of\n+\t\t * XON frames.\n+\t\t */\n+\t\tfcrtl = hw->fc.low_water;\n+\t\tif (hw->fc.send_xon)\n+\t\t\tfcrtl |= IGC_FCRTL_XONE;\n+\n+\t\tfcrth = hw->fc.high_water;\n+\t}\n+\twr32(IGC_FCRTL, fcrtl);\n+\twr32(IGC_FCRTH, fcrth);\n+\n+\treturn 0;\n+}\n+\n+/**\n * igc_setup_link - Setup flow control and link settings\n * @hw: pointer to the HW structure\n *\n@@ -195,41 +227,6 @@ s32 igc_force_mac_fc(struct igc_hw *hw)\n }\n \n /**\n- * igc_set_fc_watermarks - Set flow control high/low watermarks\n- * @hw: pointer to the HW structure\n- *\n- * Sets the flow control high/low threshold (watermark) registers. If\n- * flow control XON frame transmission is enabled, then set XON frame\n- * transmission as well.\n- */\n-static s32 igc_set_fc_watermarks(struct igc_hw *hw)\n-{\n-\tu32 fcrtl = 0, fcrth = 0;\n-\n-\t/* Set the flow control receive threshold registers. Normally,\n-\t * these registers will be set to a default threshold that may be\n-\t * adjusted later by the driver's runtime code. However, if the\n-\t * ability to transmit pause frames is not enabled, then these\n-\t * registers will be set to 0.\n-\t */\n-\tif (hw->fc.current_mode & igc_fc_tx_pause) {\n-\t\t/* We need to set up the Receive Threshold high and low water\n-\t\t * marks as well as (optionally) enabling the transmission of\n-\t\t * XON frames.\n-\t\t */\n-\t\tfcrtl = hw->fc.low_water;\n-\t\tif (hw->fc.send_xon)\n-\t\t\tfcrtl |= IGC_FCRTL_XONE;\n-\n-\t\tfcrth = hw->fc.high_water;\n-\t}\n-\twr32(IGC_FCRTL, fcrtl);\n-\twr32(IGC_FCRTH, fcrth);\n-\n-\treturn 0;\n-}\n-\n-/**\n * igc_clear_hw_cntrs_base - Clear base hardware counters\n * @hw: pointer to the HW structure\n *\ndiff --git a/drivers/net/ethernet/intel/igc/igc_phy.c b/drivers/net/ethernet/intel/igc/igc_phy.c\nindex 4c8f96a9a148..f4b05af0dd2f 100644\n--- a/drivers/net/ethernet/intel/igc/igc_phy.c\n+++ b/drivers/net/ethernet/intel/igc/igc_phy.c\n@@ -3,10 +3,6 @@\n \n #include \"igc_phy.h\"\n \n-/* forward declaration */\n-static s32 igc_phy_setup_autoneg(struct igc_hw *hw);\n-static s32 igc_wait_autoneg(struct igc_hw *hw);\n-\n /**\n * igc_check_reset_block - Check if PHY reset is blocked\n * @hw: pointer to the HW structure\n@@ -208,100 +204,6 @@ s32 igc_phy_hw_reset(struct igc_hw *hw)\n }\n \n /**\n- * igc_copper_link_autoneg - Setup/Enable autoneg for copper link\n- * @hw: pointer to the HW structure\n- *\n- * Performs initial bounds checking on autoneg advertisement parameter, then\n- * configure to advertise the full capability. Setup the PHY to autoneg\n- * and restart the negotiation process between the link partner. If\n- * autoneg_wait_to_complete, then wait for autoneg to complete before exiting.\n- */\n-static s32 igc_copper_link_autoneg(struct igc_hw *hw)\n-{\n-\tstruct igc_phy_info *phy = &hw->phy;\n-\tu16 phy_ctrl;\n-\ts32 ret_val;\n-\n-\t/* Perform some bounds checking on the autoneg advertisement\n-\t * parameter.\n-\t */\n-\tphy->autoneg_advertised &= phy->autoneg_mask;\n-\n-\t/* If autoneg_advertised is zero, we assume it was not defaulted\n-\t * by the calling code so we set to advertise full capability.\n-\t */\n-\tif (phy->autoneg_advertised == 0)\n-\t\tphy->autoneg_advertised = phy->autoneg_mask;\n-\n-\thw_dbg(\"Reconfiguring auto-neg advertisement params\\n\");\n-\tret_val = igc_phy_setup_autoneg(hw);\n-\tif (ret_val) {\n-\t\thw_dbg(\"Error Setting up Auto-Negotiation\\n\");\n-\t\tgoto out;\n-\t}\n-\thw_dbg(\"Restarting Auto-Neg\\n\");\n-\n-\t/* Restart auto-negotiation by setting the Auto Neg Enable bit and\n-\t * the Auto Neg Restart bit in the PHY control register.\n-\t */\n-\tret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl);\n-\tif (ret_val)\n-\t\tgoto out;\n-\n-\tphy_ctrl |= (MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG);\n-\tret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl);\n-\tif (ret_val)\n-\t\tgoto out;\n-\n-\t/* Does the user want to wait for Auto-Neg to complete here, or\n-\t * check at a later time (for example, callback routine).\n-\t */\n-\tif (phy->autoneg_wait_to_complete) {\n-\t\tret_val = igc_wait_autoneg(hw);\n-\t\tif (ret_val) {\n-\t\t\thw_dbg(\"Error while waiting for autoneg to complete\\n\");\n-\t\t\tgoto out;\n-\t\t}\n-\t}\n-\n-\thw->mac.get_link_status = true;\n-\n-out:\n-\treturn ret_val;\n-}\n-\n-/**\n- * igc_wait_autoneg - Wait for auto-neg completion\n- * @hw: pointer to the HW structure\n- *\n- * Waits for auto-negotiation to complete or for the auto-negotiation time\n- * limit to expire, which ever happens first.\n- */\n-static s32 igc_wait_autoneg(struct igc_hw *hw)\n-{\n-\tu16 i, phy_status;\n-\ts32 ret_val = 0;\n-\n-\t/* Break after autoneg completes or PHY_AUTO_NEG_LIMIT expires. */\n-\tfor (i = PHY_AUTO_NEG_LIMIT; i > 0; i--) {\n-\t\tret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);\n-\t\tif (ret_val)\n-\t\t\tbreak;\n-\t\tret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);\n-\t\tif (ret_val)\n-\t\t\tbreak;\n-\t\tif (phy_status & MII_SR_AUTONEG_COMPLETE)\n-\t\t\tbreak;\n-\t\tmsleep(100);\n-\t}\n-\n-\t/* PHY_AUTO_NEG_TIME expiration doesn't guarantee auto-negotiation\n-\t * has completed.\n-\t */\n-\treturn ret_val;\n-}\n-\n-/**\n * igc_phy_setup_autoneg - Configure PHY for auto-negotiation\n * @hw: pointer to the HW structure\n *\n@@ -486,6 +388,100 @@ static s32 igc_phy_setup_autoneg(struct igc_hw *hw)\n }\n \n /**\n+ * igc_wait_autoneg - Wait for auto-neg completion\n+ * @hw: pointer to the HW structure\n+ *\n+ * Waits for auto-negotiation to complete or for the auto-negotiation time\n+ * limit to expire, which ever happens first.\n+ */\n+static s32 igc_wait_autoneg(struct igc_hw *hw)\n+{\n+\tu16 i, phy_status;\n+\ts32 ret_val = 0;\n+\n+\t/* Break after autoneg completes or PHY_AUTO_NEG_LIMIT expires. */\n+\tfor (i = PHY_AUTO_NEG_LIMIT; i > 0; i--) {\n+\t\tret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);\n+\t\tif (ret_val)\n+\t\t\tbreak;\n+\t\tret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);\n+\t\tif (ret_val)\n+\t\t\tbreak;\n+\t\tif (phy_status & MII_SR_AUTONEG_COMPLETE)\n+\t\t\tbreak;\n+\t\tmsleep(100);\n+\t}\n+\n+\t/* PHY_AUTO_NEG_TIME expiration doesn't guarantee auto-negotiation\n+\t * has completed.\n+\t */\n+\treturn ret_val;\n+}\n+\n+/**\n+ * igc_copper_link_autoneg - Setup/Enable autoneg for copper link\n+ * @hw: pointer to the HW structure\n+ *\n+ * Performs initial bounds checking on autoneg advertisement parameter, then\n+ * configure to advertise the full capability. Setup the PHY to autoneg\n+ * and restart the negotiation process between the link partner. If\n+ * autoneg_wait_to_complete, then wait for autoneg to complete before exiting.\n+ */\n+static s32 igc_copper_link_autoneg(struct igc_hw *hw)\n+{\n+\tstruct igc_phy_info *phy = &hw->phy;\n+\tu16 phy_ctrl;\n+\ts32 ret_val;\n+\n+\t/* Perform some bounds checking on the autoneg advertisement\n+\t * parameter.\n+\t */\n+\tphy->autoneg_advertised &= phy->autoneg_mask;\n+\n+\t/* If autoneg_advertised is zero, we assume it was not defaulted\n+\t * by the calling code so we set to advertise full capability.\n+\t */\n+\tif (phy->autoneg_advertised == 0)\n+\t\tphy->autoneg_advertised = phy->autoneg_mask;\n+\n+\thw_dbg(\"Reconfiguring auto-neg advertisement params\\n\");\n+\tret_val = igc_phy_setup_autoneg(hw);\n+\tif (ret_val) {\n+\t\thw_dbg(\"Error Setting up Auto-Negotiation\\n\");\n+\t\tgoto out;\n+\t}\n+\thw_dbg(\"Restarting Auto-Neg\\n\");\n+\n+\t/* Restart auto-negotiation by setting the Auto Neg Enable bit and\n+\t * the Auto Neg Restart bit in the PHY control register.\n+\t */\n+\tret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl);\n+\tif (ret_val)\n+\t\tgoto out;\n+\n+\tphy_ctrl |= (MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG);\n+\tret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl);\n+\tif (ret_val)\n+\t\tgoto out;\n+\n+\t/* Does the user want to wait for Auto-Neg to complete here, or\n+\t * check at a later time (for example, callback routine).\n+\t */\n+\tif (phy->autoneg_wait_to_complete) {\n+\t\tret_val = igc_wait_autoneg(hw);\n+\t\tif (ret_val) {\n+\t\t\thw_dbg(\"Error while waiting for autoneg to complete\\n\");\n+\t\t\tgoto out;\n+\t\t}\n+\t}\n+\n+\thw->mac.get_link_status = true;\n+\n+out:\n+\treturn ret_val;\n+}\n+\n+/**\n * igc_setup_copper_link - Configure copper link settings\n * @hw: pointer to the HW structure\n *\n", "prefixes": [ "v1" ] }