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GET /api/patches/1132735/?format=api
{ "id": 1132735, "url": "http://patchwork.ozlabs.org/api/patches/1132735/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20190716115745.12585-24-jagan@amarulasolutions.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20190716115745.12585-24-jagan@amarulasolutions.com>", "list_archive_url": null, "date": "2019-07-16T11:57:11", "name": "[U-Boot,v3,23/57] ram: rk3399: Move mode_sel assignment", "commit_ref": "6cbd2426b34e7430b0733ab9a912d378c027b647", "pull_url": null, "state": "accepted", "archived": false, "hash": "6012b0d798e95833940ca5337f2c4b5cf89fedd9", "submitter": { "id": 69820, "url": "http://patchwork.ozlabs.org/api/people/69820/?format=api", "name": "Jagan Teki", "email": "jagan@amarulasolutions.com" }, "delegate": { "id": 93623, "url": "http://patchwork.ozlabs.org/api/users/93623/?format=api", "username": "kevery", "first_name": "Kever", "last_name": "Yang", "email": "ykai007@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20190716115745.12585-24-jagan@amarulasolutions.com/mbox/", "series": [ { "id": 119754, "url": "http://patchwork.ozlabs.org/api/series/119754/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=119754", "date": "2019-07-16T11:56:48", "name": "ram: rk3399: Add LPDDR4 support", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/119754/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1132735/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1132735/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dmarc=none (p=none dis=none)\n\theader.from=amarulasolutions.com", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=amarulasolutions.com\n\theader.i=@amarulasolutions.com header.b=\"eMdikiLI\"; \n\tdkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 45p06G5p7zz9s3l\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 16 Jul 2019 22:27:50 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 6BCFBC21DC1; Tue, 16 Jul 2019 12:08:17 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 66129C21E29;\n\tTue, 16 Jul 2019 12:05:30 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 002C2C21E0B; Tue, 16 Jul 2019 11:59:23 +0000 (UTC)", "from mail-pg1-f195.google.com (mail-pg1-f195.google.com\n\t[209.85.215.195])\n\tby lists.denx.de (Postfix) with ESMTPS id 7590AC21E26\n\tfor <u-boot@lists.denx.de>; Tue, 16 Jul 2019 11:59:19 +0000 (UTC)", "by mail-pg1-f195.google.com with SMTP id t132so9327557pgb.9\n\tfor <u-boot@lists.denx.de>; Tue, 16 Jul 2019 04:59:19 -0700 (PDT)", "from localhost.localdomain ([49.206.201.107])\n\tby smtp.gmail.com with ESMTPSA id\n\tz24sm36269566pfr.51.2019.07.16.04.59.14\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tTue, 16 Jul 2019 04:59:17 -0700 (PDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=T_DKIM_INVALID\n\tautolearn=unavailable autolearn_force=no version=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=amarulasolutions.com; s=google;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references\n\t:mime-version:content-transfer-encoding;\n\tbh=Xv7hs5BBvaJWXNOawbd4P577U6W22vvaUZK7CZedUbs=;\n\tb=eMdikiLI0sCNzHKqLym4XzYliprSkaE1qDvGsFO8YpX4xIjs7bM+95btiHFeTfZnup\n\t9sjVhXHeQrwKTDttEuELV8n1uEhxbpaUf/YW8O1VjZ+tgrTjRbkgFCl6MhDTHhk5Glw2\n\tHtx3qxxAznepKz0WpfT0tiTJFgtWGbJfR9wNE=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:mime-version:content-transfer-encoding;\n\tbh=Xv7hs5BBvaJWXNOawbd4P577U6W22vvaUZK7CZedUbs=;\n\tb=QMy5QL2Py0lYWLgkUqhnv2V1JtIwU0zhkPVJqg87fZLZXSAbWwytUYqb1U/M7iQ5r8\n\t3Hxbo4Z40BIw6xEtVER8Jae2xbw7oJOarxqk/3WJy9Mzb4mh3qAx9NFv5tr6jBaV0Yzc\n\tfSNvDFnhMJMUH1SVJtgHQD9u19cHHf3NYbK7wlRlpXmRmVjlketftmEtuXrSv3SjSExd\n\tUIqX0MpMYchuhARmEybqE9UwWB1uzlFnIC9AJThGadAVarFz80CNdl3BKbyoukUJpPlx\n\tHwJLbD/yFK3Y9RnQ7rVyOm5RlOEatp3qNbpPnbRDDzoSHOcZsQzsdeZmxy7UFpNQJ33o\n\t+t8g==", "X-Gm-Message-State": "APjAAAX8x5GD3nXFHoOQ1aExyD5yykafq/nTF1iFhfR0phte5doUsgQl\n\t8WV0JIEep3AaKBSjNY5bpuLybCK4sijK5g==", "X-Google-Smtp-Source": "APXvYqwiNgS79eLrVHX/KgasnRf0ew42WqGOg+JpXyn8ILO3pllsxOaIOi3qbspkZF9EYwqjmkXmYw==", "X-Received": "by 2002:a17:90a:d814:: with SMTP id\n\ta20mr35839248pjv.48.1563278358060; \n\tTue, 16 Jul 2019 04:59:18 -0700 (PDT)", "From": "Jagan Teki <jagan@amarulasolutions.com>", "To": "Simon Glass <sjg@chromium.org>,\n\tPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>,\n\tKever Yang <kever.yang@rock-chips.com>,\n\tYouMin Chen <cym@rock-chips.com>, u-boot@lists.denx.de", "Date": "Tue, 16 Jul 2019 17:27:11 +0530", "Message-Id": "<20190716115745.12585-24-jagan@amarulasolutions.com>", "X-Mailer": "git-send-email 2.18.0.321.gffc6fa0e3", "In-Reply-To": "<20190716115745.12585-1-jagan@amarulasolutions.com>", "References": "<20190716115745.12585-1-jagan@amarulasolutions.com>", "MIME-Version": "1.0", "Cc": "linux-rockchip@lists.infradead.org, gajjar04akash@gmail.com,\n\tlinux-amarula@amarulasolutions.com,\n\tManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>", "Subject": "[U-Boot] [PATCH v3 23/57] ram: rk3399: Move mode_sel assignment", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "mode_sel assignment is based on dram type.\n\nIn phy_io_config, already have vref setting based\non the dram type, so move this mode_sel assignment\non vref setting area.\n\nNo functionality change.\n\nSigned-off-by: Jagan Teki <jagan@amarulasolutions.com>\n---\n drivers/ram/rockchip/sdram_rk3399.c | 12 +++---------\n 1 file changed, 3 insertions(+), 9 deletions(-)", "diff": "diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c\nindex 711477188e..88fbfa440d 100644\n--- a/drivers/ram/rockchip/sdram_rk3399.c\n+++ b/drivers/ram/rockchip/sdram_rk3399.c\n@@ -205,6 +205,7 @@ static int phy_io_config(const struct chan_info *chan,\n \t\tvref_value_dq = 0x1f;\n \t\tvref_mode_ac = 0x6;\n \t\tvref_value_ac = 0x1f;\n+\t\tmode_sel = 0x6;\n \t} else if (params->base.dramtype == LPDDR3) {\n \t\tif (params->base.odt == 1) {\n \t\t\tvref_mode_dq = 0x5; /* LPDDR3 ODT */\n@@ -265,12 +266,14 @@ static int phy_io_config(const struct chan_info *chan,\n \t\t}\n \t\tvref_mode_ac = 0x2;\n \t\tvref_value_ac = 0x1f;\n+\t\tmode_sel = 0x0;\n \t} else if (params->base.dramtype == DDR3) {\n \t\t/* DDR3L */\n \t\tvref_mode_dq = 0x1;\n \t\tvref_value_dq = 0x1f;\n \t\tvref_mode_ac = 0x1;\n \t\tvref_value_ac = 0x1f;\n+\t\tmode_sel = 0x1;\n \t} else {\n \t\tdebug(\"Unknown DRAM type.\\n\");\n \t\treturn -EINVAL;\n@@ -292,15 +295,6 @@ static int phy_io_config(const struct chan_info *chan,\n \t/* PHY_915 PHY_PAD_VREF_CTRL_AC 12bits offset_16 */\n \tclrsetbits_le32(&denali_phy[915], 0xfff << 16, reg_value << 16);\n \n-\tif (params->base.dramtype == LPDDR4)\n-\t\tmode_sel = 0x6;\n-\telse if (params->base.dramtype == LPDDR3)\n-\t\tmode_sel = 0x0;\n-\telse if (params->base.dramtype == DDR3)\n-\t\tmode_sel = 0x1;\n-\telse\n-\t\treturn -EINVAL;\n-\n \t/* PHY_924 PHY_PAD_FDBK_DRIVE */\n \tclrsetbits_le32(&denali_phy[924], 0x7 << 15, mode_sel << 15);\n \t/* PHY_926 PHY_PAD_DATA_DRIVE */\n", "prefixes": [ "U-Boot", "v3", "23/57" ] }