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GET /api/patches/1132734/?format=api
{ "id": 1132734, "url": "http://patchwork.ozlabs.org/api/patches/1132734/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20190716115745.12585-52-jagan@amarulasolutions.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20190716115745.12585-52-jagan@amarulasolutions.com>", "list_archive_url": null, "date": "2019-07-16T11:57:39", "name": "[U-Boot,v3,51/57] ram: rk3399: Add set_rate sdram rk3399 ops", "commit_ref": "1dd1cb6253c3a4326284f4f2a141297d06103e69", "pull_url": null, "state": "accepted", "archived": false, "hash": "1af35fabbb4dcae5b29e1d2a48e71e10983cae33", "submitter": { "id": 69820, "url": "http://patchwork.ozlabs.org/api/people/69820/?format=api", "name": "Jagan Teki", "email": "jagan@amarulasolutions.com" }, "delegate": { "id": 93623, "url": "http://patchwork.ozlabs.org/api/users/93623/?format=api", "username": "kevery", "first_name": "Kever", "last_name": "Yang", "email": "ykai007@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20190716115745.12585-52-jagan@amarulasolutions.com/mbox/", "series": [ { "id": 119754, "url": "http://patchwork.ozlabs.org/api/series/119754/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=119754", "date": "2019-07-16T11:56:48", "name": "ram: rk3399: Add LPDDR4 support", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/119754/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1132734/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1132734/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dmarc=none (p=none dis=none)\n\theader.from=amarulasolutions.com", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=amarulasolutions.com\n\theader.i=@amarulasolutions.com header.b=\"di7gqCHb\"; \n\tdkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 45p05z1drgz9s8m\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 16 Jul 2019 22:27:34 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 52D10C21DA1; Tue, 16 Jul 2019 12:09:53 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id A46DFC21E90;\n\tTue, 16 Jul 2019 12:06:47 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 2DA1BC21E85; Tue, 16 Jul 2019 12:01:23 +0000 (UTC)", "from mail-pf1-f195.google.com (mail-pf1-f195.google.com\n\t[209.85.210.195])\n\tby lists.denx.de (Postfix) with ESMTPS id 8A170C21E50\n\tfor <u-boot@lists.denx.de>; Tue, 16 Jul 2019 12:01:00 +0000 (UTC)", "by mail-pf1-f195.google.com with SMTP id i189so9009013pfg.10\n\tfor <u-boot@lists.denx.de>; Tue, 16 Jul 2019 05:01:00 -0700 (PDT)", "from localhost.localdomain ([49.206.201.107])\n\tby smtp.gmail.com with ESMTPSA id\n\tz24sm36269566pfr.51.2019.07.16.05.00.55\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tTue, 16 Jul 2019 05:00:58 -0700 (PDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3,\n\tRCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID autolearn=unavailable autolearn_force=no\n\tversion=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=amarulasolutions.com; s=google;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references\n\t:mime-version:content-transfer-encoding;\n\tbh=tLU23iC3mbZxkYNZeu/wIpO3JnN1O59AxLAw5YnqE/U=;\n\tb=di7gqCHbGhi/zS1uY01ze9iUubTRINxTXqE3y0SDT6MUqh6ZICkyGO2S9ykvl4zI+8\n\te+OChOZfmG/p9L2DIS3+P+vBhArN2hRCGtWlikLZefdmrtR1Ol7v1uIwdWoNKCZJXxfX\n\tgPqeHFl8UJEu6cqrvRJzJHgvixglZvg97UYq8=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:mime-version:content-transfer-encoding;\n\tbh=tLU23iC3mbZxkYNZeu/wIpO3JnN1O59AxLAw5YnqE/U=;\n\tb=dnT1F4YGgs+ae9CoEf8nyYdW4CJvvqe41xzxD1Hv6MM6+TIAVfVFBSa6UFPCSK11rM\n\t+9bBo+mAUBEozZobYLmqCcOrt6BRy0tJM5DE3wMHEB8WAq/n4u9XT39QUhKYeCDCMGC6\n\tvnLJrJ/3SkyWXlRjubeOGbrGkHUNOfAXCVq+PJdnGJsAU7T5rm4RulDFKTPII0PxDieS\n\tCH+hOhjpGTEyoHzZEJTu6wbWSG4yDuKNjBxso7h0HD/gcyKBuaTgKmT65Jmh110fra+b\n\tVHHnO+c6rWXJCv1McMYDE6CA+cdMpe9YQI/098WPO5weWQa7Hf1LcNR5xPKDrJ8WxPlz\n\t3blw==", "X-Gm-Message-State": "APjAAAXaRdRuHgKKfVPRcFpnV6dsZUKaVCJIqTYQrraTIcFjz5D9fTOk\n\tB/ZN3Df3lJiX4r/yAFZF4vlR2A==", "X-Google-Smtp-Source": "APXvYqwtXNg2GS/4hyKLKEI390eRvinkr+noEmBktjXeB/w7AWGvyLvhvCDi1g8AUKCjlBQk9L1azg==", "X-Received": "by 2002:a17:90a:fa07:: with SMTP id\n\tcm7mr34723259pjb.138.1563278459147; \n\tTue, 16 Jul 2019 05:00:59 -0700 (PDT)", "From": "Jagan Teki <jagan@amarulasolutions.com>", "To": "Simon Glass <sjg@chromium.org>,\n\tPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>,\n\tKever Yang <kever.yang@rock-chips.com>,\n\tYouMin Chen <cym@rock-chips.com>, u-boot@lists.denx.de", "Date": "Tue, 16 Jul 2019 17:27:39 +0530", "Message-Id": "<20190716115745.12585-52-jagan@amarulasolutions.com>", "X-Mailer": "git-send-email 2.18.0.321.gffc6fa0e3", "In-Reply-To": "<20190716115745.12585-1-jagan@amarulasolutions.com>", "References": "<20190716115745.12585-1-jagan@amarulasolutions.com>", "MIME-Version": "1.0", "Cc": "linux-rockchip@lists.infradead.org, gajjar04akash@gmail.com,\n\tlinux-amarula@amarulasolutions.com,\n\tManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>", "Subject": "[U-Boot] [PATCH v3 51/57] ram: rk3399: Add set_rate sdram rk3399 ops", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "DDR set rate can be even required for lpddr4 and we\nneed to keep the lpddr4 code to compile only for relevant\nboards which do support lpddr4.\n\nFor this requirement, and for code readability handle\ndata training via sdram_rk3399_ops with .set_rate and\nsame will update in future while supporting lpddr4 code.\n\nSigned-off-by: Jagan Teki <jagan@amarulasolutions.com>\n---\n drivers/ram/rockchip/sdram_rk3399.c | 11 ++++++++---\n 1 file changed, 8 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c\nindex 623685e3c5..c3d7665ea2 100644\n--- a/drivers/ram/rockchip/sdram_rk3399.c\n+++ b/drivers/ram/rockchip/sdram_rk3399.c\n@@ -74,6 +74,8 @@ struct dram_info {\n struct sdram_rk3399_ops {\n \tint (*data_training)(struct dram_info *dram, u32 channel, u8 rank,\n \t\t\t struct rk3399_sdram_params *sdram);\n+\tint (*set_rate)(struct dram_info *dram,\n+\t\t\tconst struct rk3399_sdram_params *params);\n };\n \n #if defined(CONFIG_TPL_BUILD) || \\\n@@ -948,6 +950,7 @@ static int pctl_cfg(struct dram_info *dram, const struct chan_info *chan,\n \treturn 0;\n }\n \n+#if !defined(CONFIG_RAM_RK3399_LPDDR4)\n static void select_per_cs_training_index(const struct chan_info *chan,\n \t\t\t\t\t u32 rank)\n {\n@@ -1368,6 +1371,7 @@ static int data_training(struct dram_info *dram, u32 channel,\n \n \treturn 0;\n }\n+#endif\n \n static void set_ddrconfig(const struct chan_info *chan,\n \t\t\t const struct rk3399_sdram_params *params,\n@@ -1487,7 +1491,6 @@ static int default_data_training(struct dram_info *dram, u32 channel, u8 rank,\n \n \treturn data_training(dram, channel, params, training_flag);\n }\n-#endif\n \n static int switch_to_phy_index1(struct dram_info *dram,\n \t\t\t\tconst struct rk3399_sdram_params *params)\n@@ -1534,7 +1537,8 @@ static int switch_to_phy_index1(struct dram_info *dram,\n \treturn 0;\n }\n \n-#if defined(CONFIG_RAM_RK3399_LPDDR4)\n+#else\n+\n static u32 get_ddr_stride(struct rk3399_pmusgrf_regs *pmusgrf)\n {\n \treturn ((readl(&pmusgrf->soc_con4) >> 10) & 0x1F);\n@@ -1938,7 +1942,7 @@ static int sdram_init(struct dram_info *dram,\n \n \tparams->base.stride = calculate_stride(params);\n \tdram_all_config(dram, params);\n-\tswitch_to_phy_index1(dram, params);\n+\tdram->ops->set_rate(dram, params);\n \n \tdebug(\"Finish SDRAM initialization...\\n\");\n \treturn 0;\n@@ -1986,6 +1990,7 @@ static int conv_of_platdata(struct udevice *dev)\n static const struct sdram_rk3399_ops rk3399_ops = {\n #if !defined(CONFIG_RAM_RK3399_LPDDR4)\n \t.data_training = default_data_training,\n+\t.set_rate = switch_to_phy_index1,\n #else\n \t.data_training = lpddr4_mr_detect,\n #endif\n", "prefixes": [ "U-Boot", "v3", "51/57" ] }