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GET /api/patches/1132719/?format=api
{ "id": 1132719, "url": "http://patchwork.ozlabs.org/api/patches/1132719/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20190716115745.12585-28-jagan@amarulasolutions.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20190716115745.12585-28-jagan@amarulasolutions.com>", "list_archive_url": null, "date": "2019-07-16T11:57:15", "name": "[U-Boot,v3,27/57] ram: rk3399: Configure BOOSTP_EN, BOOSTN_EN for lpddr4", "commit_ref": "881860fd34bea88929a5849f7550d70b0a9d6099", "pull_url": null, "state": "accepted", "archived": false, "hash": "95bf055f9e601d21cb44a0135fb9c60377b7743c", "submitter": { "id": 69820, "url": "http://patchwork.ozlabs.org/api/people/69820/?format=api", "name": "Jagan Teki", "email": "jagan@amarulasolutions.com" }, "delegate": { "id": 93623, "url": "http://patchwork.ozlabs.org/api/users/93623/?format=api", "username": "kevery", "first_name": "Kever", "last_name": "Yang", "email": "ykai007@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20190716115745.12585-28-jagan@amarulasolutions.com/mbox/", "series": [ { "id": 119754, "url": "http://patchwork.ozlabs.org/api/series/119754/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=119754", "date": "2019-07-16T11:56:48", "name": "ram: rk3399: Add LPDDR4 support", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/119754/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1132719/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1132719/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dmarc=none (p=none dis=none)\n\theader.from=amarulasolutions.com", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=amarulasolutions.com\n\theader.i=@amarulasolutions.com header.b=\"phtH2Y5z\"; \n\tdkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 45nzzt5VSnz9s3l\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 16 Jul 2019 22:22:18 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 6EDE3C21E36; Tue, 16 Jul 2019 12:04:20 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id C6839C21E49;\n\tTue, 16 Jul 2019 12:01:47 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 88029C21D65; Tue, 16 Jul 2019 11:59:37 +0000 (UTC)", "from mail-pf1-f196.google.com (mail-pf1-f196.google.com\n\t[209.85.210.196])\n\tby lists.denx.de (Postfix) with ESMTPS id A9EE4C21D8A\n\tfor <u-boot@lists.denx.de>; Tue, 16 Jul 2019 11:59:33 +0000 (UTC)", "by mail-pf1-f196.google.com with SMTP id i189so9006969pfg.10\n\tfor <u-boot@lists.denx.de>; Tue, 16 Jul 2019 04:59:33 -0700 (PDT)", "from localhost.localdomain ([49.206.201.107])\n\tby smtp.gmail.com with ESMTPSA id\n\tz24sm36269566pfr.51.2019.07.16.04.59.28\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tTue, 16 Jul 2019 04:59:31 -0700 (PDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3,\n\tRCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID autolearn=unavailable autolearn_force=no\n\tversion=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=amarulasolutions.com; s=google;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references\n\t:mime-version:content-transfer-encoding;\n\tbh=ZHqXR/rfvXNWUhdf9JppdKSegbEAyVwI+s7vLkLDNcY=;\n\tb=phtH2Y5zMPxNjiH9+HMLN4HYGjWfjfQhkD3PJepl6KmUf3DxW2XmdCc38s+yF4PlzV\n\tyLlzjUkr5wqwKnOqE8CpNlzFX6bN02dgB8h7zZCtZFKoIfgyqSLxvg4hzzEQw5G3YN4l\n\tYSc9YoAWNrwwfDP6gSbn0tkYRHY9GFz1IDG3o=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:mime-version:content-transfer-encoding;\n\tbh=ZHqXR/rfvXNWUhdf9JppdKSegbEAyVwI+s7vLkLDNcY=;\n\tb=JSacR3BGThEI9ym+BHv8s/GYh12TGsKZLvAbW1sg390eJfUwsGA/2RRwFMCZKM6lVi\n\twfZig6ZFSW1yK/4IFOIILYGgnKgFGzDEl4gflc4bekMQvCqMahNY11kJ5bDHTFv5DO2w\n\tWT1LdQftmhRt+WH/DvwQbBgzeVIc9yfbBLBUtYzaDHIomSj41ra9i/mHt850nFNbR6g6\n\tr4U4eJgBClX4c5wnublBdFvfho2wiEeQaEuGl7NPEzSyPhFNxy59x5O/NXiB8+eJbcAk\n\tyWv1MoZ4fLebIRNRETrJt8S0rNGeNGuCVku1YvpVbn1HBvlLuFA6FXGIgumUe8r0KUSY\n\tZwfw==", "X-Gm-Message-State": "APjAAAVBcuDUv2ZiL5XRjD6c+RuSVBFCsXAPSNfnej4SZYJtjHQWRKut\n\tQFdsYeKhh7gxrmTIG3doAHtx0BiaLbrQLQ==", "X-Google-Smtp-Source": "APXvYqw/sWIvRBFm08Hgfby/JdJh/Ik+/iANlv76p0W0vcQcsbI3K6paNDsi5inNvNLhWI4Irc+5XA==", "X-Received": "by 2002:a65:500a:: with SMTP id\n\tf10mr2100018pgo.105.1563278372279; \n\tTue, 16 Jul 2019 04:59:32 -0700 (PDT)", "From": "Jagan Teki <jagan@amarulasolutions.com>", "To": "Simon Glass <sjg@chromium.org>,\n\tPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>,\n\tKever Yang <kever.yang@rock-chips.com>,\n\tYouMin Chen <cym@rock-chips.com>, u-boot@lists.denx.de", "Date": "Tue, 16 Jul 2019 17:27:15 +0530", "Message-Id": "<20190716115745.12585-28-jagan@amarulasolutions.com>", "X-Mailer": "git-send-email 2.18.0.321.gffc6fa0e3", "In-Reply-To": "<20190716115745.12585-1-jagan@amarulasolutions.com>", "References": "<20190716115745.12585-1-jagan@amarulasolutions.com>", "MIME-Version": "1.0", "Cc": "linux-rockchip@lists.infradead.org, gajjar04akash@gmail.com,\n\tlinux-amarula@amarulasolutions.com,\n\tManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>", "Subject": "[U-Boot] [PATCH v3 27/57] ram: rk3399: Configure BOOSTP_EN,\n\tBOOSTN_EN for lpddr4", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "Configure BOOSTP_EN, BOOSTN_EN for lpddr4 during phy IO config.\n\nSigned-off-by: Jagan Teki <jagan@amarulasolutions.com>\nSigned-off-by: YouMin Chen <cym@rock-chips.com>\n---\n drivers/ram/rockchip/sdram_rk3399.c | 24 ++++++++++++++++++++++++\n 1 file changed, 24 insertions(+)", "diff": "diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c\nindex 7625506458..a9e092c39f 100644\n--- a/drivers/ram/rockchip/sdram_rk3399.c\n+++ b/drivers/ram/rockchip/sdram_rk3399.c\n@@ -35,6 +35,9 @@\n #define PHY_DRV_ODT_40\t\t0xe\n #define PHY_DRV_ODT_34_3\t0xf\n \n+#define PHY_BOOSTP_EN\t\t0x1\n+#define PHY_BOOSTN_EN\t\t0x1\n+\n #define CRU_SFTRST_DDR_CTRL(ch, n)\t((0x1 << (8 + 16 + (ch) * 4)) | \\\n \t\t\t\t\t((n) << (8 + (ch) * 4)))\n #define CRU_SFTRST_DDR_PHY(ch, n)\t((0x1 << (9 + 16 + (ch) * 4)) | \\\n@@ -312,6 +315,27 @@ static int phy_io_config(const struct chan_info *chan,\n \t/* PHY_939 PHY_PAD_CS_DRIVE */\n \tclrsetbits_le32(&denali_phy[939], 0x7 << 14, mode_sel << 14);\n \n+\tif (IS_ENABLED(CONFIG_RAM_RK3399_LPDDR4)) {\n+\t\t/* BOOSTP_EN & BOOSTN_EN */\n+\t\treg_value = ((PHY_BOOSTP_EN << 4) | PHY_BOOSTN_EN);\n+\t\t/* PHY_925 PHY_PAD_FDBK_DRIVE2 */\n+\t\tclrsetbits_le32(&denali_phy[925], 0xff << 8, reg_value << 8);\n+\t\t/* PHY_926 PHY_PAD_DATA_DRIVE */\n+\t\tclrsetbits_le32(&denali_phy[926], 0xff << 12, reg_value << 12);\n+\t\t/* PHY_927 PHY_PAD_DQS_DRIVE */\n+\t\tclrsetbits_le32(&denali_phy[927], 0xff << 14, reg_value << 14);\n+\t\t/* PHY_928 PHY_PAD_ADDR_DRIVE */\n+\t\tclrsetbits_le32(&denali_phy[928], 0xff << 20, reg_value << 20);\n+\t\t/* PHY_929 PHY_PAD_CLK_DRIVE */\n+\t\tclrsetbits_le32(&denali_phy[929], 0xff << 22, reg_value << 22);\n+\t\t/* PHY_935 PHY_PAD_CKE_DRIVE */\n+\t\tclrsetbits_le32(&denali_phy[935], 0xff << 20, reg_value << 20);\n+\t\t/* PHY_937 PHY_PAD_RST_DRIVE */\n+\t\tclrsetbits_le32(&denali_phy[937], 0xff << 20, reg_value << 20);\n+\t\t/* PHY_939 PHY_PAD_CS_DRIVE */\n+\t\tclrsetbits_le32(&denali_phy[939], 0xff << 20, reg_value << 20);\n+\t}\n+\n \t/* speed setting */\n \tif (params->base.ddr_freq < 400)\n \t\tspeed = 0x0;\n", "prefixes": [ "U-Boot", "v3", "27/57" ] }