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GET /api/patches/1132712/?format=api
{ "id": 1132712, "url": "http://patchwork.ozlabs.org/api/patches/1132712/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20190716115745.12585-45-jagan@amarulasolutions.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20190716115745.12585-45-jagan@amarulasolutions.com>", "list_archive_url": null, "date": "2019-07-16T11:57:32", "name": "[U-Boot,v3,44/57] arm: include: rockchip: Add rk3399 pmu file", "commit_ref": "614d8ca438886fa1262d7dd34e1a68df76455dcf", "pull_url": null, "state": "accepted", "archived": false, "hash": "f04132014ce4c19c5a71c7ce4c3d579aef3dbbe4", "submitter": { "id": 69820, "url": "http://patchwork.ozlabs.org/api/people/69820/?format=api", "name": "Jagan Teki", "email": "jagan@amarulasolutions.com" }, "delegate": { "id": 93623, "url": "http://patchwork.ozlabs.org/api/users/93623/?format=api", "username": "kevery", "first_name": "Kever", "last_name": "Yang", "email": "ykai007@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20190716115745.12585-45-jagan@amarulasolutions.com/mbox/", "series": [ { "id": 119754, "url": "http://patchwork.ozlabs.org/api/series/119754/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=119754", "date": "2019-07-16T11:56:48", "name": "ram: rk3399: Add LPDDR4 support", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/119754/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1132712/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1132712/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dmarc=none (p=none dis=none)\n\theader.from=amarulasolutions.com", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=amarulasolutions.com\n\theader.i=@amarulasolutions.com header.b=\"INi12PAP\"; \n\tdkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 45nzvZ2cbbz9s3l\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 16 Jul 2019 22:18:34 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 12069C21E4F; Tue, 16 Jul 2019 12:06:26 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 95E0EC21E7D;\n\tTue, 16 Jul 2019 12:03:17 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 2AB71C21E3A; Tue, 16 Jul 2019 12:00:39 +0000 (UTC)", "from mail-pg1-f196.google.com (mail-pg1-f196.google.com\n\t[209.85.215.196])\n\tby lists.denx.de (Postfix) with ESMTPS id 194FAC21D65\n\tfor <u-boot@lists.denx.de>; Tue, 16 Jul 2019 12:00:35 +0000 (UTC)", "by mail-pg1-f196.google.com with SMTP id i18so9331962pgl.11\n\tfor <u-boot@lists.denx.de>; Tue, 16 Jul 2019 05:00:35 -0700 (PDT)", "from localhost.localdomain ([49.206.201.107])\n\tby smtp.gmail.com with ESMTPSA id\n\tz24sm36269566pfr.51.2019.07.16.05.00.30\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tTue, 16 Jul 2019 05:00:33 -0700 (PDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3,\n\tRCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID autolearn=unavailable autolearn_force=no\n\tversion=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=amarulasolutions.com; s=google;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references\n\t:mime-version:content-transfer-encoding;\n\tbh=3scj5tpu65v2n66++2cTbZLzQWWaAK5Y+ewcl6Aa8Eo=;\n\tb=INi12PAPn0SwjXtqbFxY1GyAm6jWoQGMm71Cglu9MLnpWaxmDSsW0hkOZ1DBI2vLNj\n\t2eSKjMP7C5G7t7B68PNqNpw4u76FmaZpJPzMpNOhMFPj5cjuUqW4SqIu1HMQngqXvlNb\n\t7E0/Lusxjl4rBD/Nr859grPP5W2sdjV48+A6w=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:mime-version:content-transfer-encoding;\n\tbh=3scj5tpu65v2n66++2cTbZLzQWWaAK5Y+ewcl6Aa8Eo=;\n\tb=nWL2SZIt9aWu6gl2eDlZMuYVaCDRIrb5pKECZuXvxBgcMPLDgAeVMUEo0uTMqWqd3A\n\tA39rXcomTV+52HbxVIoWQeVDz9Oc+a1d6NE5atq9cDIxAcq43WE/JzDUvG5VgimFIVPs\n\tLVXeg8NowIz5KPkIAeorgbTL05SVAgre1/W9WqrlP981zn0ulzhOO4LW0eluV8PDpLm1\n\tjreTZPu2c31p5SvVXuByfvkqe9fXcATbP0kMbJ9G+MRArAfHsFY1alBrDXh+9VnsY2RX\n\t/p1DsSdui4SPKAHjUUpOF/bQ7vNKpJ+cFbvJFU0NFGOeQt6Wp+NHqhR2d+hV5+x3AQPU\n\tsBvg==", "X-Gm-Message-State": "APjAAAWHB6z+G6wxhTy6gZv09XLzL0h/ujqTT/z/lfrOkCdvITRr6Jjf\n\tMRb4DzKMouElQbbTgHcJTdWlzA==", "X-Google-Smtp-Source": "APXvYqxJLQUd0DZtHRXWZYRWb1wVAkulv2TR5WdRBzqOTfDMgyyaf26FgIjoWGgsjUQlmthhN3N+IQ==", "X-Received": "by 2002:a63:5765:: with SMTP id\n\th37mr1332189pgm.183.1563278433373; \n\tTue, 16 Jul 2019 05:00:33 -0700 (PDT)", "From": "Jagan Teki <jagan@amarulasolutions.com>", "To": "Simon Glass <sjg@chromium.org>,\n\tPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>,\n\tKever Yang <kever.yang@rock-chips.com>,\n\tYouMin Chen <cym@rock-chips.com>, u-boot@lists.denx.de", "Date": "Tue, 16 Jul 2019 17:27:32 +0530", "Message-Id": "<20190716115745.12585-45-jagan@amarulasolutions.com>", "X-Mailer": "git-send-email 2.18.0.321.gffc6fa0e3", "In-Reply-To": "<20190716115745.12585-1-jagan@amarulasolutions.com>", "References": "<20190716115745.12585-1-jagan@amarulasolutions.com>", "MIME-Version": "1.0", "Cc": "linux-rockchip@lists.infradead.org, gajjar04akash@gmail.com,\n\tlinux-amarula@amarulasolutions.com,\n\tManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>", "Subject": "[U-Boot] [PATCH v3 44/57] arm: include: rockchip: Add rk3399 pmu\n\tfile", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "Add pmu header file for rk3399 SoC, this will help\nto configure pmu in sdram driver.\n\nSigned-off-by: Jagan Teki <jagan@amarulasolutions.com>\nSigned-off-by: YouMin Chen <cym@rock-chips.com>\n---\n .../include/asm/arch-rockchip/pmu_rk3399.h | 72 +++++++++++++++++++\n 1 file changed, 72 insertions(+)\n create mode 100644 arch/arm/include/asm/arch-rockchip/pmu_rk3399.h", "diff": "diff --git a/arch/arm/include/asm/arch-rockchip/pmu_rk3399.h b/arch/arm/include/asm/arch-rockchip/pmu_rk3399.h\nnew file mode 100644\nindex 0000000000..f1096dccce\n--- /dev/null\n+++ b/arch/arm/include/asm/arch-rockchip/pmu_rk3399.h\n@@ -0,0 +1,72 @@\n+/* SPDX-License-Identifier: GPL-2.0+ */\n+/*\n+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.\n+ *\n+ */\n+\n+#ifndef __SOC_ROCKCHIP_RK3399_PMU_H__\n+#define __SOC_ROCKCHIP_RK3399_PMU_H__\n+\n+struct rk3399_pmu_regs {\n+\tu32 pmu_wakeup_cfg[5];\n+\tu32 pmu_pwrdn_con;\n+\tu32 pmu_pwrdn_st;\n+\tu32 pmu_pll_con;\n+\tu32 pmu_pwrmode_con;\n+\tu32 pmu_sft_con;\n+\tu32 pmu_int_con;\n+\tu32 pmu_int_st;\n+\tu32 pmu_gpio0_pos_int_con;\n+\tu32 pmu_gpio0_net_int_con;\n+\tu32 pmu_gpio1_pos_int_con;\n+\tu32 pmu_gpio1_net_int_con;\n+\tu32 pmu_gpio0_pos_int_st;\n+\tu32 pmu_gpio0_net_int_st;\n+\tu32 pmu_gpio1_pos_int_st;\n+\tu32 pmu_gpio1_net_int_st;\n+\tu32 pmu_pwrdn_inten;\n+\tu32 pmu_pwrdn_status;\n+\tu32 pmu_wakeup_status;\n+\tu32 pmu_bus_clr;\n+\tu32 pmu_bus_idle_req;\n+\tu32 pmu_bus_idle_st;\n+\tu32 pmu_bus_idle_ack;\n+\tu32 pmu_cci500_con;\n+\tu32 pmu_adb400_con;\n+\tu32 pmu_adb400_st;\n+\tu32 pmu_power_st;\n+\tu32 pmu_core_pwr_st;\n+\tu32 pmu_osc_cnt;\n+\tu32 pmu_plllock_cnt;\n+\tu32 pmu_pllrst_cnt;\n+\tu32 pmu_stable_cnt;\n+\tu32 pmu_ddrio_pwron_cnt;\n+\tu32 pmu_wakeup_rst_clr_cnt;\n+\tu32 pmu_ddr_sref_st;\n+\tu32 pmu_scu_l_pwrdn_cnt;\n+\tu32 pmu_scu_l_pwrup_cnt;\n+\tu32 pmu_scu_b_pwrdn_cnt;\n+\tu32 pmu_scu_b_pwrup_cnt;\n+\tu32 pmu_gpu_pwrdn_cnt;\n+\tu32 pmu_gpu_pwrup_cnt;\n+\tu32 pmu_center_pwrdn_cnt;\n+\tu32 pmu_center_pwrup_cnt;\n+\tu32 pmu_timeout_cnt;\n+\tu32 pmu_cpu0apm_con;\n+\tu32 pmu_cpu1apm_con;\n+\tu32 pmu_cpu2apm_con;\n+\tu32 pmu_cpu3apm_con;\n+\tu32 pmu_cpu0bpm_con;\n+\tu32 pmu_cpu1bpm_con;\n+\tu32 pmu_noc_auto_ena;\n+\tu32 pmu_pwrdn_con1;\n+\tu32 reserved0[0x4];\n+\tu32 pmu_sys_reg_reg0;\n+\tu32 pmu_sys_reg_reg1;\n+\tu32 pmu_sys_reg_reg2;\n+\tu32 pmu_sys_reg_reg3;\n+};\n+\n+check_member(rk3399_pmu_regs, pmu_sys_reg_reg3, 0xfc);\n+\n+#endif\t/* __SOC_ROCKCHIP_RK3399_PMU_H__ */\n", "prefixes": [ "U-Boot", "v3", "44/57" ] }