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GET /api/patches/1132188/?format=api
{ "id": 1132188, "url": "http://patchwork.ozlabs.org/api/patches/1132188/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20190715182856.21688-2-jagan@amarulasolutions.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20190715182856.21688-2-jagan@amarulasolutions.com>", "list_archive_url": null, "date": "2019-07-15T18:28:39", "name": "[U-Boot,v3,01/18] ram: rk3399: Handle data training return types", "commit_ref": "02fad6f9eda4165db33710c7c65353babf1d4455", "pull_url": null, "state": "accepted", "archived": false, "hash": "b4453fe9780fc31a59e15a61fb24aa6a74401dd0", "submitter": { "id": 69820, "url": "http://patchwork.ozlabs.org/api/people/69820/?format=api", "name": "Jagan Teki", "email": "jagan@amarulasolutions.com" }, "delegate": { "id": 93623, "url": "http://patchwork.ozlabs.org/api/users/93623/?format=api", "username": "kevery", "first_name": "Kever", "last_name": "Yang", "email": "ykai007@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20190715182856.21688-2-jagan@amarulasolutions.com/mbox/", "series": [ { "id": 119574, "url": "http://patchwork.ozlabs.org/api/series/119574/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=119574", "date": "2019-07-15T18:28:43", "name": "ram: rk3399: Add rank detection", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/119574/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1132188/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1132188/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dmarc=none (p=none dis=none)\n\theader.from=amarulasolutions.com", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=amarulasolutions.com\n\theader.i=@amarulasolutions.com header.b=\"Lk3c/LzC\"; \n\tdkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 45nXJG0SXwz9s4Y\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 16 Jul 2019 04:34:53 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid A3D52C21F93; Mon, 15 Jul 2019 18:30:56 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 92084C21FC6;\n\tMon, 15 Jul 2019 18:29:49 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 9026CC21F98; Mon, 15 Jul 2019 18:29:14 +0000 (UTC)", "from mail-pl1-f195.google.com (mail-pl1-f195.google.com\n\t[209.85.214.195])\n\tby lists.denx.de (Postfix) with ESMTPS id 1003EC21FD0\n\tfor <u-boot@lists.denx.de>; Mon, 15 Jul 2019 18:29:14 +0000 (UTC)", "by mail-pl1-f195.google.com with SMTP id y8so8709929plr.12\n\tfor <u-boot@lists.denx.de>; Mon, 15 Jul 2019 11:29:13 -0700 (PDT)", "from localhost.localdomain ([49.206.201.107])\n\tby smtp.gmail.com with ESMTPSA id\n\ty133sm20250075pfb.28.2019.07.15.11.29.09\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tMon, 15 Jul 2019 11:29:12 -0700 (PDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3,\n\tRCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID autolearn=unavailable autolearn_force=no\n\tversion=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=amarulasolutions.com; s=google;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references\n\t:mime-version:content-transfer-encoding;\n\tbh=wYr3H4NqDFc/O2LGsyHmfdZ6Y7oIQaZKfQb5LA2PnRg=;\n\tb=Lk3c/LzCKc4U2NcRRSH/eCMs0cFQKEMCiEqh35Xr/Y69FxHFfpkw7WUQ4No+WaAOVP\n\tdN793jB2U85HAcAj7ObgyIvNm6T4RawEJRZ9pkXYIGmKOnbCpcki6CLdJgeByCrEA7GD\n\tdqBdHUjbOf+kKYeFGPPrXAidIaat8qfW1kDZE=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:mime-version:content-transfer-encoding;\n\tbh=wYr3H4NqDFc/O2LGsyHmfdZ6Y7oIQaZKfQb5LA2PnRg=;\n\tb=nRFXtEI5UbPgHeCuL1zei+pOlIiH+/DJWhZbmHIa+hGkw0ok+TwKtj4s+1VDU23Ioz\n\tzYcyLVZ7r163Z+dRjKitSQPvt2RiUCeVfRghHwc9dKySt7qBMiuYo1Rm5hoCWpGwp0Hp\n\tcNqLi7jYfAMMj+fCuDfKoDDLW5C0y0KzLnPrNwEjkKkyd7mocb4ssMhRj5iZSJizpbXI\n\tynI4TQ7mY0JkHFRvDiAiflagB8OVaqBsgBM3c4BVQjxI15uLhTPw3JrblBff1L39PYQl\n\tOHtJ8duUWdTbirdoj4uI3K4yGbZbWzWbTIcMXCxNK6zGtA/4F7Zqq5du3qz0PjQg0QOL\n\t8M1w==", "X-Gm-Message-State": "APjAAAV2zIWSEgLaDD+cVFRQ3PAlXmc423Wh7ITSRd7S3mujnSWfHYD/\n\tbzZVV/DWJXGYIh/W+bz7Uz8Wvw==", "X-Google-Smtp-Source": "APXvYqx3I/yUJQRHxlghHMPEX3Qm5lxr6ux/TMUHHh0t1nkEM/e2gBKbcVIn9Y5YBVtHNdkOLtCclA==", "X-Received": "by 2002:a17:902:6ac6:: with SMTP id\n\ti6mr30109616plt.233.1563215352628; \n\tMon, 15 Jul 2019 11:29:12 -0700 (PDT)", "From": "Jagan Teki <jagan@amarulasolutions.com>", "To": "Simon Glass <sjg@chromium.org>,\n\tPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>,\n\tKever Yang <kever.yang@rock-chips.com>,\n\tYouMin Chen <cym@rock-chips.com>, u-boot@lists.denx.de", "Date": "Mon, 15 Jul 2019 23:58:39 +0530", "Message-Id": "<20190715182856.21688-2-jagan@amarulasolutions.com>", "X-Mailer": "git-send-email 2.18.0.321.gffc6fa0e3", "In-Reply-To": "<20190715182856.21688-1-jagan@amarulasolutions.com>", "References": "<20190715182856.21688-1-jagan@amarulasolutions.com>", "MIME-Version": "1.0", "Cc": "linux-rockchip@lists.infradead.org, gajjar04akash@gmail.com,\n\tlinux-amarula@amarulasolutions.com,\n\tManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>", "Subject": "[U-Boot] [PATCH v3 01/18] ram: rk3399: Handle data training return\n\ttypes", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "data trainings calls like ca, wl, rg, rl, wdql have proper\nreturn types with -EIO and the return type missed to handle\nin data_training function.\n\nThis patch, add proper return type checks along with useful\ndebug statement on each data training calls.\n\nIncidentally this would help to prevent the sdram initialization\nhang for single channel dram and when the code is trying to\ninitialize second channel with proper return type of relevant\ndata training call might failed.\n\nSigned-off-by: Jagan Teki <jagan@amarulasolutions.com>\n---\n drivers/ram/rockchip/sdram_rk3399.c | 50 ++++++++++++++++++++++-------\n 1 file changed, 38 insertions(+), 12 deletions(-)", "diff": "diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c\nindex 492b0975dd..e9c0fdf2d4 100644\n--- a/drivers/ram/rockchip/sdram_rk3399.c\n+++ b/drivers/ram/rockchip/sdram_rk3399.c\n@@ -887,6 +887,7 @@ static int data_training(const struct chan_info *chan, u32 channel,\n \t\t\t u32 training_flag)\n {\n \tu32 *denali_phy = chan->publ->denali_phy;\n+\tint ret;\n \n \t/* PHY_927 PHY_PAD_DQS_DRIVE RPULL offset_22 */\n \tsetbits_le32(&denali_phy[927], (1 << 22));\n@@ -907,24 +908,49 @@ static int data_training(const struct chan_info *chan, u32 channel,\n \t}\n \n \t/* ca training(LPDDR4,LPDDR3 support) */\n-\tif ((training_flag & PI_CA_TRAINING) == PI_CA_TRAINING)\n-\t\tdata_training_ca(chan, channel, params);\n+\tif ((training_flag & PI_CA_TRAINING) == PI_CA_TRAINING) {\n+\t\tret = data_training_ca(chan, channel, params);\n+\t\tif (ret < 0) {\n+\t\t\tdebug(\"%s: data training ca failed\\n\", __func__);\n+\t\t\treturn ret;\n+\t\t}\n+\t}\n \n \t/* write leveling(LPDDR4,LPDDR3,DDR3 support) */\n-\tif ((training_flag & PI_WRITE_LEVELING) == PI_WRITE_LEVELING)\n-\t\tdata_training_wl(chan, channel, params);\n+\tif ((training_flag & PI_WRITE_LEVELING) == PI_WRITE_LEVELING) {\n+\t\tret = data_training_wl(chan, channel, params);\n+\t\tif (ret < 0) {\n+\t\t\tdebug(\"%s: data training wl failed\\n\", __func__);\n+\t\t\treturn ret;\n+\t\t}\n+\t}\n \n \t/* read gate training(LPDDR4,LPDDR3,DDR3 support) */\n-\tif ((training_flag & PI_READ_GATE_TRAINING) == PI_READ_GATE_TRAINING)\n-\t\tdata_training_rg(chan, channel, params);\n+\tif ((training_flag & PI_READ_GATE_TRAINING) == PI_READ_GATE_TRAINING) {\n+\t\tret = data_training_rg(chan, channel, params);\n+\t\tif (ret < 0) {\n+\t\t\tdebug(\"%s: data training rg failed\\n\", __func__);\n+\t\t\treturn ret;\n+\t\t}\n+\t}\n \n \t/* read leveling(LPDDR4,LPDDR3,DDR3 support) */\n-\tif ((training_flag & PI_READ_LEVELING) == PI_READ_LEVELING)\n-\t\tdata_training_rl(chan, channel, params);\n+\tif ((training_flag & PI_READ_LEVELING) == PI_READ_LEVELING) {\n+\t\tret = data_training_rl(chan, channel, params);\n+\t\tif (ret < 0) {\n+\t\t\tdebug(\"%s: data training rl failed\\n\", __func__);\n+\t\t\treturn ret;\n+\t\t}\n+\t}\n \n \t/* wdq leveling(LPDDR4 support) */\n-\tif ((training_flag & PI_WDQ_LEVELING) == PI_WDQ_LEVELING)\n-\t\tdata_training_wdql(chan, channel, params);\n+\tif ((training_flag & PI_WDQ_LEVELING) == PI_WDQ_LEVELING) {\n+\t\tret = data_training_wdql(chan, channel, params);\n+\t\tif (ret < 0) {\n+\t\t\tdebug(\"%s: data training wdql failed\\n\", __func__);\n+\t\t\treturn ret;\n+\t\t}\n+\t}\n \n \t/* PHY_927 PHY_PAD_DQS_DRIVE RPULL offset_22 */\n \tclrbits_le32(&denali_phy[927], (1 << 22));\n@@ -1062,7 +1088,7 @@ static int switch_to_phy_index1(struct dram_info *dram,\n \t\tclrsetbits_le32(&denali_phy[896], (0x3 << 8) | 1, 1 << 8);\n \t\tret = data_training(&dram->chan[channel], channel,\n \t\t\t\t params, PI_FULL_TRAINING);\n-\t\tif (ret) {\n+\t\tif (ret < 0) {\n \t\t\tdebug(\"index1 training failed\\n\");\n \t\t\treturn ret;\n \t\t}\n@@ -1108,7 +1134,7 @@ static int sdram_init(struct dram_info *dram,\n \t\t\tudelay(10);\n \n \t\tif (data_training(chan, channel, params, PI_FULL_TRAINING)) {\n-\t\t\tprintf(\"SDRAM initialization failed, reset\\n\");\n+\t\t\tprintf(\"%s: data training failed\\n\", __func__);\n \t\t\treturn -EIO;\n \t\t}\n \n", "prefixes": [ "U-Boot", "v3", "01/18" ] }